c42b6a3560
Change the interface to ef10_nic_get_port_mode_bandwidth() so more NIC information can be used to infer bandwidth requirements. Huntington calculations separated out completely. Submitted by: Richard Houldsworth <rhouldsworth at solarflare.com> Sponsored by: Solarflare Communications, Inc. Differential Revision: https://reviews.freebsd.org/D18278
185 lines
5.5 KiB
C
185 lines
5.5 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2015-2018 Solarflare Communications Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* The views and conclusions contained in the software and documentation are
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* those of the authors and should not be interpreted as representing official
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* policies, either expressed or implied, of the FreeBSD Project.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "efx.h"
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#include "efx_impl.h"
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#if EFSYS_OPT_MEDFORD2
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static __checkReturn efx_rc_t
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medford2_nic_get_required_pcie_bandwidth(
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__in efx_nic_t *enp,
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__out uint32_t *bandwidth_mbpsp)
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{
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uint32_t bandwidth;
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efx_rc_t rc;
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/* FIXME: support new Medford2 dynamic port modes */
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if ((rc = ef10_nic_get_port_mode_bandwidth(enp,
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&bandwidth)) != 0)
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goto fail1;
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*bandwidth_mbpsp = bandwidth;
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return (0);
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fail1:
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EFSYS_PROBE1(fail1, efx_rc_t, rc);
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return (rc);
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}
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__checkReturn efx_rc_t
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medford2_board_cfg(
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__in efx_nic_t *enp)
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{
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efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
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uint32_t sysclk, dpcpu_clk;
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uint32_t end_padding;
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uint32_t bandwidth;
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efx_rc_t rc;
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/*
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* Enable firmware workarounds for hardware errata.
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* Expected responses are:
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* - 0 (zero):
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* Success: workaround enabled or disabled as requested.
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* - MC_CMD_ERR_ENOSYS (reported as ENOTSUP):
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* Firmware does not support the MC_CMD_WORKAROUND request.
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* (assume that the workaround is not supported).
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* - MC_CMD_ERR_ENOENT (reported as ENOENT):
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* Firmware does not support the requested workaround.
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* - MC_CMD_ERR_EPERM (reported as EACCES):
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* Unprivileged function cannot enable/disable workarounds.
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*
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* See efx_mcdi_request_errcode() for MCDI error translations.
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*/
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if (EFX_PCI_FUNCTION_IS_VF(encp)) {
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/*
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* Interrupt testing does not work for VFs on Medford2.
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* See bug50084 and bug71432 comment 21.
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*/
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encp->enc_bug41750_workaround = B_TRUE;
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}
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/* Chained multicast is always enabled on Medford2 */
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encp->enc_bug26807_workaround = B_TRUE;
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/*
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* If the bug61265 workaround is enabled, then interrupt holdoff timers
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* cannot be controlled by timer table writes, so MCDI must be used
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* (timer table writes can still be used for wakeup timers).
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*/
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rc = efx_mcdi_set_workaround(enp, MC_CMD_WORKAROUND_BUG61265, B_TRUE,
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NULL);
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if ((rc == 0) || (rc == EACCES))
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encp->enc_bug61265_workaround = B_TRUE;
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else if ((rc == ENOTSUP) || (rc == ENOENT))
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encp->enc_bug61265_workaround = B_FALSE;
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else
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goto fail1;
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/* Checksums for TSO sends should always be correct on Medford2. */
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encp->enc_bug61297_workaround = B_FALSE;
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/* Get clock frequencies (in MHz). */
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if ((rc = efx_mcdi_get_clock(enp, &sysclk, &dpcpu_clk)) != 0)
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goto fail2;
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/*
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* The Medford2 timer quantum is 1536 dpcpu_clk cycles, documented for
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* the EV_TMR_VAL field of EV_TIMER_TBL. Scale for MHz and ns units.
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*/
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encp->enc_evq_timer_quantum_ns = 1536000UL / dpcpu_clk; /* 1536 cycles */
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encp->enc_evq_timer_max_us = (encp->enc_evq_timer_quantum_ns <<
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FRF_CZ_TC_TIMER_VAL_WIDTH) / 1000;
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/* Alignment for receive packet DMA buffers */
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encp->enc_rx_buf_align_start = 1;
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/* Get the RX DMA end padding alignment configuration */
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if ((rc = efx_mcdi_get_rxdp_config(enp, &end_padding)) != 0) {
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if (rc != EACCES)
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goto fail3;
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/* Assume largest tail padding size supported by hardware */
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end_padding = 256;
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}
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encp->enc_rx_buf_align_end = end_padding;
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/*
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* The maximum supported transmit queue size is 2048. TXQs with 4096
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* descriptors are not supported as the top bit is used for vfifo
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* stuffing.
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*/
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encp->enc_txq_max_ndescs = 2048;
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EFX_STATIC_ASSERT(MEDFORD2_PIOBUF_NBUFS <= EF10_MAX_PIOBUF_NBUFS);
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encp->enc_piobuf_limit = MEDFORD2_PIOBUF_NBUFS;
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encp->enc_piobuf_size = MEDFORD2_PIOBUF_SIZE;
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encp->enc_piobuf_min_alloc_size = MEDFORD2_MIN_PIO_ALLOC_SIZE;
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/*
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* Medford2 stores a single global copy of VPD, not per-PF as on
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* Huntington.
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*/
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encp->enc_vpd_is_global = B_TRUE;
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rc = medford2_nic_get_required_pcie_bandwidth(enp, &bandwidth);
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if (rc != 0)
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goto fail4;
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encp->enc_required_pcie_bandwidth_mbps = bandwidth;
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encp->enc_max_pcie_link_gen = EFX_PCIE_LINK_SPEED_GEN3;
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return (0);
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fail4:
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EFSYS_PROBE(fail4);
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fail3:
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EFSYS_PROBE(fail3);
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fail2:
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EFSYS_PROBE(fail2);
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fail1:
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EFSYS_PROBE1(fail1, efx_rc_t, rc);
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return (rc);
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}
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#endif /* EFSYS_OPT_MEDFORD2 */
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