33d22ed3f8
pmc_process_interrupt takes 5 arguments when only 3 are needed. cpu is always available in curcpu and inuserspace can always be derived from the passed trapframe. While facially a reasonable cleanup this change was motivated by the need to workaround a compiler bug. core2_intr(cpu, tf) -> pmc_process_interrupt(cpu, ring, pmc, tf, inuserspace) -> pmc_add_sample(cpu, ring, pm, tf, inuserspace) In the process of optimizing the tail call the tf pointer was getting clobbered: (kgdb) up at /storage/mmacy/devel/freebsd/sys/dev/hwpmc/hwpmc_mod.c:4709 4709 pmc_save_kernel_callchain(ps->ps_pc, (kgdb) up 1205 error = pmc_process_interrupt(cpu, PMC_HR, pm, tf, resulting in a crash in pmc_save_kernel_callchain.
501 lines
12 KiB
C
501 lines
12 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2012 Fabien Thomas
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/pmc.h>
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#include <sys/pmckern.h>
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#include <sys/systm.h>
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#include <sys/mutex.h>
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#include <machine/cpu.h>
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#include <machine/cpufunc.h>
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#include "hwpmc_soft.h"
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/*
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* Software PMC support.
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*/
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#define SOFT_CAPS (PMC_CAP_READ | PMC_CAP_WRITE | PMC_CAP_INTERRUPT | \
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PMC_CAP_USER | PMC_CAP_SYSTEM)
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struct soft_descr {
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struct pmc_descr pm_descr; /* "base class" */
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};
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static struct soft_descr soft_pmcdesc[SOFT_NPMCS] =
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{
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#define SOFT_PMCDESCR(N) \
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{ \
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.pm_descr = \
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{ \
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.pd_name = #N, \
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.pd_class = PMC_CLASS_SOFT, \
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.pd_caps = SOFT_CAPS, \
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.pd_width = 64 \
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}, \
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}
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SOFT_PMCDESCR(SOFT0),
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SOFT_PMCDESCR(SOFT1),
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SOFT_PMCDESCR(SOFT2),
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SOFT_PMCDESCR(SOFT3),
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SOFT_PMCDESCR(SOFT4),
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SOFT_PMCDESCR(SOFT5),
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SOFT_PMCDESCR(SOFT6),
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SOFT_PMCDESCR(SOFT7),
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SOFT_PMCDESCR(SOFT8),
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SOFT_PMCDESCR(SOFT9),
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SOFT_PMCDESCR(SOFT10),
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SOFT_PMCDESCR(SOFT11),
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SOFT_PMCDESCR(SOFT12),
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SOFT_PMCDESCR(SOFT13),
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SOFT_PMCDESCR(SOFT14),
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SOFT_PMCDESCR(SOFT15)
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};
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/*
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* Per-CPU data structure.
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*/
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struct soft_cpu {
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struct pmc_hw soft_hw[SOFT_NPMCS];
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pmc_value_t soft_values[SOFT_NPMCS];
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};
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static struct soft_cpu **soft_pcpu;
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static int
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soft_allocate_pmc(int cpu, int ri, struct pmc *pm,
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const struct pmc_op_pmcallocate *a)
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{
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enum pmc_event ev;
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struct pmc_soft *ps;
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(void) cpu;
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KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
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("[soft,%d] illegal CPU value %d", __LINE__, cpu));
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KASSERT(ri >= 0 && ri < SOFT_NPMCS,
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("[soft,%d] illegal row-index %d", __LINE__, ri));
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if (a->pm_class != PMC_CLASS_SOFT)
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return (EINVAL);
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if ((pm->pm_caps & SOFT_CAPS) == 0)
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return (EINVAL);
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if ((pm->pm_caps & ~SOFT_CAPS) != 0)
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return (EPERM);
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ev = pm->pm_event;
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if ((int)ev < PMC_EV_SOFT_FIRST || (int)ev > PMC_EV_SOFT_LAST)
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return (EINVAL);
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/* Check if event is registered. */
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ps = pmc_soft_ev_acquire(ev);
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if (ps == NULL)
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return (EINVAL);
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pmc_soft_ev_release(ps);
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/* Module unload is protected by pmc SX lock. */
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if (ps->ps_alloc != NULL)
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ps->ps_alloc();
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return (0);
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}
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static int
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soft_config_pmc(int cpu, int ri, struct pmc *pm)
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{
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struct pmc_hw *phw;
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PMCDBG3(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm);
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KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
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("[soft,%d] illegal CPU value %d", __LINE__, cpu));
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KASSERT(ri >= 0 && ri < SOFT_NPMCS,
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("[soft,%d] illegal row-index %d", __LINE__, ri));
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phw = &soft_pcpu[cpu]->soft_hw[ri];
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KASSERT(pm == NULL || phw->phw_pmc == NULL,
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("[soft,%d] pm=%p phw->pm=%p hwpmc not unconfigured", __LINE__,
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pm, phw->phw_pmc));
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phw->phw_pmc = pm;
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return (0);
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}
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static int
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soft_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc)
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{
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int error;
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size_t copied;
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const struct soft_descr *pd;
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struct pmc_hw *phw;
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KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
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("[soft,%d] illegal CPU %d", __LINE__, cpu));
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KASSERT(ri >= 0 && ri < SOFT_NPMCS,
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("[soft,%d] illegal row-index %d", __LINE__, ri));
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phw = &soft_pcpu[cpu]->soft_hw[ri];
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pd = &soft_pmcdesc[ri];
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if ((error = copystr(pd->pm_descr.pd_name, pi->pm_name,
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PMC_NAME_MAX, &copied)) != 0)
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return (error);
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pi->pm_class = pd->pm_descr.pd_class;
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if (phw->phw_state & PMC_PHW_FLAG_IS_ENABLED) {
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pi->pm_enabled = TRUE;
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*ppmc = phw->phw_pmc;
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} else {
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pi->pm_enabled = FALSE;
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*ppmc = NULL;
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}
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return (0);
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}
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static int
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soft_get_config(int cpu, int ri, struct pmc **ppm)
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{
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(void) ri;
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KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
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("[soft,%d] illegal CPU %d", __LINE__, cpu));
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KASSERT(ri >= 0 && ri < SOFT_NPMCS,
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("[soft,%d] illegal row-index %d", __LINE__, ri));
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*ppm = soft_pcpu[cpu]->soft_hw[ri].phw_pmc;
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return (0);
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}
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static int
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soft_pcpu_fini(struct pmc_mdep *md, int cpu)
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{
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int ri;
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struct pmc_cpu *pc;
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KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
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("[soft,%d] illegal cpu %d", __LINE__, cpu));
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KASSERT(soft_pcpu[cpu] != NULL, ("[soft,%d] null pcpu", __LINE__));
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free(soft_pcpu[cpu], M_PMC);
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soft_pcpu[cpu] = NULL;
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ri = md->pmd_classdep[PMC_CLASS_INDEX_SOFT].pcd_ri;
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KASSERT(ri >= 0 && ri < SOFT_NPMCS,
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("[soft,%d] ri=%d", __LINE__, ri));
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pc = pmc_pcpu[cpu];
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pc->pc_hwpmcs[ri] = NULL;
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return (0);
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}
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static int
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soft_pcpu_init(struct pmc_mdep *md, int cpu)
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{
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int first_ri, n;
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struct pmc_cpu *pc;
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struct soft_cpu *soft_pc;
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struct pmc_hw *phw;
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KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
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("[soft,%d] illegal cpu %d", __LINE__, cpu));
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KASSERT(soft_pcpu, ("[soft,%d] null pcpu", __LINE__));
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KASSERT(soft_pcpu[cpu] == NULL, ("[soft,%d] non-null per-cpu",
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__LINE__));
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soft_pc = malloc(sizeof(struct soft_cpu), M_PMC, M_WAITOK|M_ZERO);
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pc = pmc_pcpu[cpu];
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KASSERT(pc != NULL, ("[soft,%d] cpu %d null per-cpu", __LINE__, cpu));
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soft_pcpu[cpu] = soft_pc;
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phw = soft_pc->soft_hw;
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first_ri = md->pmd_classdep[PMC_CLASS_INDEX_SOFT].pcd_ri;
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for (n = 0; n < SOFT_NPMCS; n++, phw++) {
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phw->phw_state = PMC_PHW_FLAG_IS_ENABLED |
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PMC_PHW_CPU_TO_STATE(cpu) | PMC_PHW_INDEX_TO_STATE(n);
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phw->phw_pmc = NULL;
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pc->pc_hwpmcs[n + first_ri] = phw;
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}
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return (0);
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}
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static int
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soft_read_pmc(int cpu, int ri, pmc_value_t *v)
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{
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struct pmc *pm;
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const struct pmc_hw *phw;
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KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
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("[soft,%d] illegal CPU value %d", __LINE__, cpu));
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KASSERT(ri >= 0 && ri < SOFT_NPMCS,
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("[soft,%d] illegal row-index %d", __LINE__, ri));
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phw = &soft_pcpu[cpu]->soft_hw[ri];
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pm = phw->phw_pmc;
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KASSERT(pm != NULL,
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("[soft,%d] no owner for PHW [cpu%d,pmc%d]", __LINE__, cpu, ri));
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PMCDBG1(MDP,REA,1,"soft-read id=%d", ri);
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*v = soft_pcpu[cpu]->soft_values[ri];
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return (0);
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}
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static int
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soft_write_pmc(int cpu, int ri, pmc_value_t v)
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{
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struct pmc *pm;
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const struct soft_descr *pd;
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KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
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("[soft,%d] illegal cpu value %d", __LINE__, cpu));
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KASSERT(ri >= 0 && ri < SOFT_NPMCS,
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("[soft,%d] illegal row-index %d", __LINE__, ri));
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pm = soft_pcpu[cpu]->soft_hw[ri].phw_pmc;
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pd = &soft_pmcdesc[ri];
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KASSERT(pm,
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("[soft,%d] cpu %d ri %d pmc not configured", __LINE__, cpu, ri));
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PMCDBG3(MDP,WRI,1, "soft-write cpu=%d ri=%d v=%jx", cpu, ri, v);
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soft_pcpu[cpu]->soft_values[ri] = v;
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return (0);
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}
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static int
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soft_release_pmc(int cpu, int ri, struct pmc *pmc)
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{
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struct pmc_hw *phw;
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enum pmc_event ev;
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struct pmc_soft *ps;
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(void) pmc;
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KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
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("[soft,%d] illegal CPU value %d", __LINE__, cpu));
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KASSERT(ri >= 0 && ri < SOFT_NPMCS,
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("[soft,%d] illegal row-index %d", __LINE__, ri));
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phw = &soft_pcpu[cpu]->soft_hw[ri];
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KASSERT(phw->phw_pmc == NULL,
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("[soft,%d] PHW pmc %p non-NULL", __LINE__, phw->phw_pmc));
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ev = pmc->pm_event;
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/* Check if event is registered. */
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ps = pmc_soft_ev_acquire(ev);
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KASSERT(ps != NULL,
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("[soft,%d] unregistered event %d", __LINE__, ev));
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pmc_soft_ev_release(ps);
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/* Module unload is protected by pmc SX lock. */
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if (ps->ps_release != NULL)
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ps->ps_release();
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return (0);
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}
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static int
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soft_start_pmc(int cpu, int ri)
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{
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struct pmc *pm;
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struct soft_cpu *pc;
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struct pmc_soft *ps;
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KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
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("[soft,%d] illegal CPU value %d", __LINE__, cpu));
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KASSERT(ri >= 0 && ri < SOFT_NPMCS,
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("[soft,%d] illegal row-index %d", __LINE__, ri));
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pc = soft_pcpu[cpu];
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pm = pc->soft_hw[ri].phw_pmc;
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KASSERT(pm,
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("[soft,%d] cpu %d ri %d pmc not configured", __LINE__, cpu, ri));
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ps = pmc_soft_ev_acquire(pm->pm_event);
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if (ps == NULL)
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return (EINVAL);
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atomic_add_int(&ps->ps_running, 1);
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pmc_soft_ev_release(ps);
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return (0);
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}
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static int
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soft_stop_pmc(int cpu, int ri)
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{
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struct pmc *pm;
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struct soft_cpu *pc;
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struct pmc_soft *ps;
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KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
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("[soft,%d] illegal CPU value %d", __LINE__, cpu));
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KASSERT(ri >= 0 && ri < SOFT_NPMCS,
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("[soft,%d] illegal row-index %d", __LINE__, ri));
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pc = soft_pcpu[cpu];
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pm = pc->soft_hw[ri].phw_pmc;
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KASSERT(pm,
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("[soft,%d] cpu %d ri %d pmc not configured", __LINE__, cpu, ri));
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ps = pmc_soft_ev_acquire(pm->pm_event);
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/* event unregistered ? */
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if (ps != NULL) {
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atomic_subtract_int(&ps->ps_running, 1);
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pmc_soft_ev_release(ps);
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}
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return (0);
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}
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int
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pmc_soft_intr(struct pmckern_soft *ks)
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{
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struct pmc *pm;
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struct soft_cpu *pc;
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int ri, processed, error, user_mode;
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KASSERT(ks->pm_cpu >= 0 && ks->pm_cpu < pmc_cpu_max(),
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("[soft,%d] CPU %d out of range", __LINE__, ks->pm_cpu));
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processed = 0;
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pc = soft_pcpu[ks->pm_cpu];
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for (ri = 0; ri < SOFT_NPMCS; ri++) {
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pm = pc->soft_hw[ri].phw_pmc;
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if (pm == NULL ||
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pm->pm_state != PMC_STATE_RUNNING ||
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pm->pm_event != ks->pm_ev) {
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continue;
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}
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processed = 1;
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if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) {
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if ((pc->soft_values[ri]--) <= 0)
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pc->soft_values[ri] += pm->pm_sc.pm_reloadcount;
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else
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continue;
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user_mode = TRAPF_USERMODE(ks->pm_tf);
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error = pmc_process_interrupt(PMC_SR, pm, ks->pm_tf);
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if (error) {
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soft_stop_pmc(ks->pm_cpu, ri);
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continue;
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}
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if (user_mode) {
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/* If in user mode setup AST to process
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* callchain out of interrupt context.
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*/
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curthread->td_flags |= TDF_ASTPENDING;
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}
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} else
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pc->soft_values[ri]++;
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}
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if (processed)
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counter_u64_add(pmc_stats.pm_intr_processed, 1);
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else
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counter_u64_add(pmc_stats.pm_intr_ignored, 1);
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return (processed);
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}
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void
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pmc_soft_initialize(struct pmc_mdep *md)
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{
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struct pmc_classdep *pcd;
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/* Add SOFT PMCs. */
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soft_pcpu = malloc(sizeof(struct soft_cpu *) * pmc_cpu_max(), M_PMC,
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M_ZERO|M_WAITOK);
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pcd = &md->pmd_classdep[PMC_CLASS_INDEX_SOFT];
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pcd->pcd_caps = SOFT_CAPS;
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pcd->pcd_class = PMC_CLASS_SOFT;
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pcd->pcd_num = SOFT_NPMCS;
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pcd->pcd_ri = md->pmd_npmc;
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pcd->pcd_width = 64;
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pcd->pcd_allocate_pmc = soft_allocate_pmc;
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pcd->pcd_config_pmc = soft_config_pmc;
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pcd->pcd_describe = soft_describe;
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pcd->pcd_get_config = soft_get_config;
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pcd->pcd_get_msr = NULL;
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pcd->pcd_pcpu_init = soft_pcpu_init;
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pcd->pcd_pcpu_fini = soft_pcpu_fini;
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pcd->pcd_read_pmc = soft_read_pmc;
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pcd->pcd_write_pmc = soft_write_pmc;
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pcd->pcd_release_pmc = soft_release_pmc;
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pcd->pcd_start_pmc = soft_start_pmc;
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pcd->pcd_stop_pmc = soft_stop_pmc;
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md->pmd_npmc += SOFT_NPMCS;
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}
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void
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pmc_soft_finalize(struct pmc_mdep *md)
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{
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#ifdef INVARIANTS
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int i, ncpus;
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ncpus = pmc_cpu_max();
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for (i = 0; i < ncpus; i++)
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KASSERT(soft_pcpu[i] == NULL, ("[soft,%d] non-null pcpu cpu %d",
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|
__LINE__, i));
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|
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KASSERT(md->pmd_classdep[PMC_CLASS_INDEX_SOFT].pcd_class ==
|
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PMC_CLASS_SOFT, ("[soft,%d] class mismatch", __LINE__));
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#endif
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free(soft_pcpu, M_PMC);
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soft_pcpu = NULL;
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}
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