Konstantin Belousov aa788cc387 Consistently ensure that we do not load MXCSR with reserved bits set. ... Some callers of fpusetregs()/npxsetregs(), most importantly set_fpcontext(), clear reserved bits. But some did not. Do the clearing in fpusetregs() and remove now redundand operation from set_fpcontext(). Reported by: Maxime Villard <max@m00nbsd.net> Sponsored by: The FreeBSD Foundation MFC after: 1 week		2017-11-01 10:32:44 +00:00
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acpica	Ensure that resume path on amd64 only accesses page tables for normal	2017-05-15 20:52:43 +00:00
amd64	Consistently ensure that we do not load MXCSR with reserved bits set.	2017-11-01 10:32:44 +00:00
cloudabi32	Move struct syscall_args syscall arguments parameters container into	2017-06-12 21:03:23 +00:00
cloudabi64	Keep top page on CloudABI to work around AMD Ryzen stability issues.	2017-08-02 13:08:10 +00:00
conf	Update several more URLs	2017-10-29 08:17:03 +00:00
ia32	amd64: avoid acquiring dt lock if possible (which is the common case)	2017-10-20 03:30:02 +00:00
include	Make the sleepq chain hash size configurable per-arch and bump on amd64.	2017-10-22 20:43:50 +00:00
linux	amd64: avoid acquiring dt lock if possible (which is the common case)	2017-10-20 03:30:02 +00:00
linux32	amd64: avoid acquiring dt lock if possible (which is the common case)	2017-10-20 03:30:02 +00:00
pci	pcicfg: Fix direct calls of pci_cfg{read,write} on systems w/o PCI host bridge.	2017-05-04 05:28:46 +00:00
sgx	Fix module unload when SGX support is not present in CPU.	2017-08-18 14:47:06 +00:00
vmm	Emulate the "OR reg, r/m" instruction (opcode 0BH).	2017-11-01 03:26:53 +00:00
Makefile	Bring the tags and links entries for amd64 up to date.	2015-10-27 22:59:24 +00:00