386 lines
9.5 KiB
Raku
386 lines
9.5 KiB
Raku
#!/usr/bin/env perl
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$0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
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push(@INC, "${dir}perlasm", "perlasm");
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require "x86asm.pl";
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&asm_init($ARGV[0],"x86cpuid");
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for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); }
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&function_begin("OPENSSL_ia32_cpuid");
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&xor ("edx","edx");
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&pushf ();
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&pop ("eax");
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&mov ("ecx","eax");
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&xor ("eax",1<<21);
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&push ("eax");
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&popf ();
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&pushf ();
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&pop ("eax");
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&xor ("ecx","eax");
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&xor ("eax","eax");
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&mov ("esi",&wparam(0));
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&mov (&DWP(8,"esi"),"eax"); # clear extended feature flags
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&bt ("ecx",21);
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&jnc (&label("nocpuid"));
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&cpuid ();
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&mov ("edi","eax"); # max value for standard query level
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&xor ("eax","eax");
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&cmp ("ebx",0x756e6547); # "Genu"
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&setne (&LB("eax"));
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&mov ("ebp","eax");
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&cmp ("edx",0x49656e69); # "ineI"
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&setne (&LB("eax"));
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&or ("ebp","eax");
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&cmp ("ecx",0x6c65746e); # "ntel"
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&setne (&LB("eax"));
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&or ("ebp","eax"); # 0 indicates Intel CPU
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&jz (&label("intel"));
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&cmp ("ebx",0x68747541); # "Auth"
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&setne (&LB("eax"));
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&mov ("esi","eax");
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&cmp ("edx",0x69746E65); # "enti"
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&setne (&LB("eax"));
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&or ("esi","eax");
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&cmp ("ecx",0x444D4163); # "cAMD"
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&setne (&LB("eax"));
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&or ("esi","eax"); # 0 indicates AMD CPU
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&jnz (&label("intel"));
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# AMD specific
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&mov ("eax",0x80000000);
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&cpuid ();
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&cmp ("eax",0x80000001);
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&jb (&label("intel"));
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&mov ("esi","eax");
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&mov ("eax",0x80000001);
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&cpuid ();
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&or ("ebp","ecx");
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&and ("ebp",1<<11|1); # isolate XOP bit
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&cmp ("esi",0x80000008);
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&jb (&label("intel"));
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&mov ("eax",0x80000008);
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&cpuid ();
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&movz ("esi",&LB("ecx")); # number of cores - 1
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&inc ("esi"); # number of cores
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&mov ("eax",1);
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&xor ("ecx","ecx");
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&cpuid ();
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&bt ("edx",28);
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&jnc (&label("generic"));
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&shr ("ebx",16);
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&and ("ebx",0xff);
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&cmp ("ebx","esi");
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&ja (&label("generic"));
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&and ("edx",0xefffffff); # clear hyper-threading bit
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&jmp (&label("generic"));
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&set_label("intel");
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&cmp ("edi",4);
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&mov ("esi",-1);
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&jb (&label("nocacheinfo"));
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&mov ("eax",4);
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&mov ("ecx",0); # query L1D
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&cpuid ();
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&mov ("esi","eax");
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&shr ("esi",14);
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&and ("esi",0xfff); # number of cores -1 per L1D
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&set_label("nocacheinfo");
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&mov ("eax",1);
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&xor ("ecx","ecx");
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&cpuid ();
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&and ("edx",0xbfefffff); # force reserved bits #20, #30 to 0
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&cmp ("ebp",0);
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&jne (&label("notintel"));
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&or ("edx",1<<30); # set reserved bit#30 on Intel CPUs
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&and (&HB("eax"),15); # familiy ID
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&cmp (&HB("eax"),15); # P4?
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&jne (&label("notintel"));
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&or ("edx",1<<20); # set reserved bit#20 to engage RC4_CHAR
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&set_label("notintel");
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&bt ("edx",28); # test hyper-threading bit
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&jnc (&label("generic"));
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&and ("edx",0xefffffff);
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&cmp ("esi",0);
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&je (&label("generic"));
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&or ("edx",0x10000000);
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&shr ("ebx",16);
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&cmp (&LB("ebx"),1);
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&ja (&label("generic"));
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&and ("edx",0xefffffff); # clear hyper-threading bit if not
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&set_label("generic");
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&and ("ebp",1<<11); # isolate AMD XOP flag
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&and ("ecx",0xfffff7ff); # force 11th bit to 0
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&mov ("esi","edx"); # %ebp:%esi is copy of %ecx:%edx
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&or ("ebp","ecx"); # merge AMD XOP flag
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&cmp ("edi",7);
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&mov ("edi",&wparam(0));
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&jb (&label("no_extended_info"));
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&mov ("eax",7);
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&xor ("ecx","ecx");
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&cpuid ();
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&mov (&DWP(8,"edi"),"ebx"); # save extended feature flag
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&set_label("no_extended_info");
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&bt ("ebp",27); # check OSXSAVE bit
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&jnc (&label("clear_avx"));
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&xor ("ecx","ecx");
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&data_byte(0x0f,0x01,0xd0); # xgetbv
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&and ("eax",6);
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&cmp ("eax",6);
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&je (&label("done"));
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&cmp ("eax",2);
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&je (&label("clear_avx"));
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&set_label("clear_xmm");
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&and ("ebp",0xfdfffffd); # clear AESNI and PCLMULQDQ bits
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&and ("esi",0xfeffffff); # clear FXSR
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&set_label("clear_avx");
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&and ("ebp",0xefffe7ff); # clear AVX, FMA and AMD XOP bits
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&and (&DWP(8,"edi"),0xffffffdf); # clear AVX2
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&set_label("done");
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&mov ("eax","esi");
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&mov ("edx","ebp");
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&set_label("nocpuid");
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&function_end("OPENSSL_ia32_cpuid");
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&external_label("OPENSSL_ia32cap_P");
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&function_begin_B("OPENSSL_rdtsc","EXTRN\t_OPENSSL_ia32cap_P:DWORD");
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&xor ("eax","eax");
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&xor ("edx","edx");
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&picmeup("ecx","OPENSSL_ia32cap_P");
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&bt (&DWP(0,"ecx"),4);
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&jnc (&label("notsc"));
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&rdtsc ();
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&set_label("notsc");
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&ret ();
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&function_end_B("OPENSSL_rdtsc");
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# This works in Ring 0 only [read DJGPP+MS-DOS+privileged DPMI host],
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# but it's safe to call it on any [supported] 32-bit platform...
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# Just check for [non-]zero return value...
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&function_begin_B("OPENSSL_instrument_halt","EXTRN\t_OPENSSL_ia32cap_P:DWORD");
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&picmeup("ecx","OPENSSL_ia32cap_P");
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&bt (&DWP(0,"ecx"),4);
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&jnc (&label("nohalt")); # no TSC
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&data_word(0x9058900e); # push %cs; pop %eax
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&and ("eax",3);
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&jnz (&label("nohalt")); # not enough privileges
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&pushf ();
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&pop ("eax");
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&bt ("eax",9);
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&jnc (&label("nohalt")); # interrupts are disabled
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&rdtsc ();
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&push ("edx");
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&push ("eax");
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&halt ();
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&rdtsc ();
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&sub ("eax",&DWP(0,"esp"));
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&sbb ("edx",&DWP(4,"esp"));
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&add ("esp",8);
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&ret ();
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&set_label("nohalt");
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&xor ("eax","eax");
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&xor ("edx","edx");
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&ret ();
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&function_end_B("OPENSSL_instrument_halt");
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# Essentially there is only one use for this function. Under DJGPP:
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#
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# #include <go32.h>
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# ...
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# i=OPENSSL_far_spin(_dos_ds,0x46c);
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# ...
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# to obtain the number of spins till closest timer interrupt.
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&function_begin_B("OPENSSL_far_spin");
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&pushf ();
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&pop ("eax");
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&bt ("eax",9);
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&jnc (&label("nospin")); # interrupts are disabled
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&mov ("eax",&DWP(4,"esp"));
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&mov ("ecx",&DWP(8,"esp"));
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&data_word (0x90d88e1e); # push %ds, mov %eax,%ds
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&xor ("eax","eax");
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&mov ("edx",&DWP(0,"ecx"));
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&jmp (&label("spin"));
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&align (16);
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&set_label("spin");
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&inc ("eax");
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&cmp ("edx",&DWP(0,"ecx"));
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&je (&label("spin"));
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&data_word (0x1f909090); # pop %ds
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&ret ();
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&set_label("nospin");
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&xor ("eax","eax");
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&xor ("edx","edx");
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&ret ();
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&function_end_B("OPENSSL_far_spin");
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&function_begin_B("OPENSSL_wipe_cpu","EXTRN\t_OPENSSL_ia32cap_P:DWORD");
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&xor ("eax","eax");
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&xor ("edx","edx");
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&picmeup("ecx","OPENSSL_ia32cap_P");
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&mov ("ecx",&DWP(0,"ecx"));
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&bt (&DWP(0,"ecx"),1);
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&jnc (&label("no_x87"));
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if ($sse2) {
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&and ("ecx",1<<26|1<<24); # check SSE2 and FXSR bits
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&cmp ("ecx",1<<26|1<<24);
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&jne (&label("no_sse2"));
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&pxor ("xmm0","xmm0");
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&pxor ("xmm1","xmm1");
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&pxor ("xmm2","xmm2");
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&pxor ("xmm3","xmm3");
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&pxor ("xmm4","xmm4");
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&pxor ("xmm5","xmm5");
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&pxor ("xmm6","xmm6");
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&pxor ("xmm7","xmm7");
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&set_label("no_sse2");
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}
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# just a bunch of fldz to zap the fp/mm bank followed by finit...
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&data_word(0xeed9eed9,0xeed9eed9,0xeed9eed9,0xeed9eed9,0x90e3db9b);
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&set_label("no_x87");
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&lea ("eax",&DWP(4,"esp"));
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&ret ();
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&function_end_B("OPENSSL_wipe_cpu");
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&function_begin_B("OPENSSL_atomic_add");
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&mov ("edx",&DWP(4,"esp")); # fetch the pointer, 1st arg
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&mov ("ecx",&DWP(8,"esp")); # fetch the increment, 2nd arg
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&push ("ebx");
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&nop ();
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&mov ("eax",&DWP(0,"edx"));
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&set_label("spin");
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&lea ("ebx",&DWP(0,"eax","ecx"));
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&nop ();
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&data_word(0x1ab10ff0); # lock; cmpxchg %ebx,(%edx) # %eax is envolved and is always reloaded
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&jne (&label("spin"));
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&mov ("eax","ebx"); # OpenSSL expects the new value
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&pop ("ebx");
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&ret ();
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&function_end_B("OPENSSL_atomic_add");
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# This function can become handy under Win32 in situations when
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# we don't know which calling convention, __stdcall or __cdecl(*),
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# indirect callee is using. In C it can be deployed as
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#
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#ifdef OPENSSL_CPUID_OBJ
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# type OPENSSL_indirect_call(void *f,...);
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# ...
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# OPENSSL_indirect_call(func,[up to $max arguments]);
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#endif
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#
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# (*) it's designed to work even for __fastcall if number of
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# arguments is 1 or 2!
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&function_begin_B("OPENSSL_indirect_call");
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{
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my ($max,$i)=(7,); # $max has to be chosen as 4*n-1
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# in order to preserve eventual
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# stack alignment
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&push ("ebp");
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&mov ("ebp","esp");
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&sub ("esp",$max*4);
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&mov ("ecx",&DWP(12,"ebp"));
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&mov (&DWP(0,"esp"),"ecx");
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&mov ("edx",&DWP(16,"ebp"));
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&mov (&DWP(4,"esp"),"edx");
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for($i=2;$i<$max;$i++)
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{
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# Some copies will be redundant/bogus...
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&mov ("eax",&DWP(12+$i*4,"ebp"));
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&mov (&DWP(0+$i*4,"esp"),"eax");
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}
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&call_ptr (&DWP(8,"ebp"));# make the call...
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&mov ("esp","ebp"); # ... and just restore the stack pointer
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# without paying attention to what we called,
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# (__cdecl *func) or (__stdcall *one).
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&pop ("ebp");
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&ret ();
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}
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&function_end_B("OPENSSL_indirect_call");
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&function_begin_B("OPENSSL_cleanse");
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&mov ("edx",&wparam(0));
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&mov ("ecx",&wparam(1));
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&xor ("eax","eax");
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&cmp ("ecx",7);
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&jae (&label("lot"));
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&cmp ("ecx",0);
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&je (&label("ret"));
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&set_label("little");
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&mov (&BP(0,"edx"),"al");
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&sub ("ecx",1);
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&lea ("edx",&DWP(1,"edx"));
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&jnz (&label("little"));
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&set_label("ret");
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&ret ();
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&set_label("lot",16);
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&test ("edx",3);
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&jz (&label("aligned"));
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&mov (&BP(0,"edx"),"al");
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&lea ("ecx",&DWP(-1,"ecx"));
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&lea ("edx",&DWP(1,"edx"));
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&jmp (&label("lot"));
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&set_label("aligned");
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&mov (&DWP(0,"edx"),"eax");
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&lea ("ecx",&DWP(-4,"ecx"));
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&test ("ecx",-4);
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&lea ("edx",&DWP(4,"edx"));
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&jnz (&label("aligned"));
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&cmp ("ecx",0);
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&jne (&label("little"));
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&ret ();
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&function_end_B("OPENSSL_cleanse");
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&function_begin_B("OPENSSL_ia32_rdrand");
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&mov ("ecx",8);
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&set_label("loop");
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&rdrand ("eax");
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&jc (&label("break"));
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&loop (&label("loop"));
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&set_label("break");
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&cmp ("eax",0);
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&cmove ("eax","ecx");
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&ret ();
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&function_end_B("OPENSSL_ia32_rdrand");
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&function_begin_B("OPENSSL_ia32_rdseed");
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&mov ("ecx",8);
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&set_label("loop");
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&rdseed ("eax");
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&jc (&label("break"));
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&loop (&label("loop"));
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&set_label("break");
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&cmp ("eax",0);
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&cmove ("eax","ecx");
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&ret ();
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&function_end_B("OPENSSL_ia32_rdseed");
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&initseg("OPENSSL_cpuid_setup");
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&hidden("OPENSSL_cpuid_setup");
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&hidden("OPENSSL_ia32cap_P");
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&asm_finish();
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