gnn acf511e4d0 Add support for hwpmc(4) on the MIPS 24K, 32 bit, embedded processor.
Add macros for properly accessing coprocessor 0 registers that
support performance counters.

Reviewed by:	jkoshy rpaulo fabien imp
MFC after:	1 month
2010-03-03 15:05:58 +00:00
..
2010-02-09 06:24:43 +00:00
2009-02-15 01:12:16 +00:00
2010-02-09 06:24:43 +00:00
2010-02-09 06:24:43 +00:00
2010-02-09 06:24:43 +00:00