189 lines
4.9 KiB
C
189 lines
4.9 KiB
C
/* $FreeBSD$ */
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/*
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* Copyright (c) 1995, 1996, 1997 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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/*
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* Additional Copyright (c) 1997 by Matthew Jacob for NASA/Ames Research Center
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*/
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/*
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* FreeBSD version based on:
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* NetBSD: dec_eb64plus.c,v 1.15 1998/11/19 02:20:07 ross Exp
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*
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* Some info on the Aspen Alpine which might be hard to come by:
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* - Hardware is close enough to the DEC EB64+ design to allow it to run
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* the EB64+ SRM console firmware
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* - 3 PCI slots, closest to the SIMMs: Alpine calls this one slot C
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* the middle one Alpine calls slot B
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* the 3rd one Alpine calls slot A
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* (A, B, C are silkscreened on the PCB)
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* - embedded NCR810, located at PCI slot 5
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* - 3 ISA slots, hanging off an Intel 82378IB PCI-ISA bridge at PCI slot 8
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* - embedded floppy, PC keyboard interface, PS/2 mouse interface, 2 serial
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* ports and a parallel port. All of this hanging off the ISA bridge
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*/
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#include "opt_ddb.h"
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#include <sys/param.h>
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#include <sys/reboot.h>
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#include <sys/systm.h>
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#include <sys/termios.h>
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#include <sys/bus.h>
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#include <machine/rpb.h>
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#include <machine/cpuconf.h>
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#include <machine/clock.h>
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#include <pci/pcireg.h>
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#include <pci/pcivar.h>
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#include <alpha/pci/apecsreg.h>
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#include <alpha/pci/apecsvar.h>
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#include "opt_dev_sc.h"
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#ifndef CONSPEED
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#define CONSPEED TTYDEF_SPEED
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#endif
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static int comcnrate = CONSPEED;
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void dec_eb64plus_init(void);
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static void dec_eb64plus_cons_init(void);
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static void dec_eb64plus_intr_init(void);
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extern void eb64plus_intr_enable(int irq); /* ../pci/pci_eb64plus_intr.s */
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extern void eb64plus_intr_disable(int irq); /* ../pci/pci_eb64plus_intr.s */
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extern const char * bootdev_protocol(void);
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extern int bootdev_boot_dev_type(void);
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extern int siocnattach(int, int);
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extern int sccnattach(void);
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const struct alpha_variation_table dec_eb64plus_variations[] = {
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{ 0, "DEC EB64-plus" },
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{ 0, NULL },
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};
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void
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dec_eb64plus_init()
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{
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u_int64_t variation;
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platform.family = "EB64+";
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if ((platform.model = alpha_dsr_sysname()) == NULL) {
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variation = hwrpb->rpb_variation & SV_ST_MASK;
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if ((platform.model = alpha_variation_name(variation,
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dec_eb64plus_variations)) == NULL)
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platform.model = alpha_unknown_sysname();
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}
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platform.iobus = "apecs";
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platform.cons_init = dec_eb64plus_cons_init;
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platform.pci_intr_init = dec_eb64plus_intr_init;
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/* SRM handles PCI interrupt mapping */
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platform.pci_intr_map = NULL;
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/* see ../pci/pci_eb64plus_intr.s for intr. dis/enable */
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platform.pci_intr_disable = eb64plus_intr_disable;
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platform.pci_intr_enable = eb64plus_intr_enable;
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}
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/* XXX for forcing comconsole when srm serial console is used */
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extern int comconsole;
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/* init the console, serial or graphics */
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static void
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dec_eb64plus_cons_init()
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{
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struct ctb *ctb;
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apecs_init();
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ctb = (struct ctb *)(((caddr_t)hwrpb) + hwrpb->rpb_ctb_off);
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switch (ctb->ctb_term_type) {
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case 2:
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/* serial console ... */
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/* XXX */
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{
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/*
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* Delay to allow PROM putchars to complete.
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* FIFO depth * character time,
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* character time = (1000000 / (defaultrate / 10))
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*/
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DELAY(160000000 / comcnrate);
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/*
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* force a comconsole on com1 if the SRM has a serial
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* console.
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*/
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comconsole = 0;
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if (siocnattach(0x3f8, comcnrate))
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panic("can't init serial console");
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boothowto |= RB_SERIAL;
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break;
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}
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case 3:
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#ifdef DEV_SC
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/* graphics adapter console */
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sccnattach();
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#else
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panic("not configured to use display && keyboard console");
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#endif
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break;
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default:
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printf("ctb->ctb_term_type = 0x%lx\n", ctb->ctb_term_type);
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printf("ctb->ctb_turboslot = 0x%lx\n", ctb->ctb_turboslot);
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panic("consinit: unknown console type %d\n",
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(int)ctb->ctb_term_type);
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}
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}
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/*
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* The SRM console may have left some some interrupts enabled.
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*/
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static void
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dec_eb64plus_intr_init()
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{
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int i;
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/* disable all PCI interrupts */
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for(i = 0; i <= 32; i++) /* 32 ?? NetBSD sez so */
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eb64plus_intr_disable(i);
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/* Enable ISA-PCI cascade interrupt */
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eb64plus_intr_enable(4);
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}
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