dc4ee6ca91
make use of it where possible. This primarily brings in support for newer hardware, and FreeBSD is not yet able to support the abundance of IRQs on new hardware and many features in the Ethernet driver. Because of the changes to IRQs in the Simple Executive, we have to maintain our own list of Octeon IRQs now, which probably can be pared-down and be specific to the CIU interrupt unit soon, and when other interrupt mechanisms are added they can maintain their own definitions. Remove unmasking of interrupts from within the UART device now that the function used is no longer present in the Simple Executive. The unmasking seems to have been gratuitous as this is more properly handled by the buses above the UART device, and seems to work on that basis.
242 lines
8.1 KiB
C
242 lines
8.1 KiB
C
/***********************license start***************
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* Copyright (c) 2003-2010 Cavium Inc. (support@cavium.com). All rights
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* reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* * Neither the name of Cavium Inc. nor the names of
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* its contributors may be used to endorse or promote products
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* derived from this software without specific prior written
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* permission.
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* This Software, including technical data, may be subject to U.S. export control
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* laws, including the U.S. Export Administration Act and its associated
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* regulations, and may be subject to export or import regulations in other
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* countries.
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* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
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* AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR
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* WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
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* THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
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* DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
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* SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
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* MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
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* VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
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* CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
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* PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
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***********************license end**************************************/
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/**
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* @file
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*
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* Interface to the Mips interrupts.
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*
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* <hr>$Revision: 70030 $<hr>
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*/
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#ifndef __CVMX_INTERRUPT_H__
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#define __CVMX_INTERRUPT_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* Enumeration of Interrupt numbers
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*/
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typedef enum
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{
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/* 0 - 7 represent the 8 MIPS standard interrupt sources */
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CVMX_IRQ_SW0 = 0,
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CVMX_IRQ_SW1,
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CVMX_IRQ_MIPS2,
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CVMX_IRQ_MIPS3,
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CVMX_IRQ_MIPS4,
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CVMX_IRQ_MIPS5,
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CVMX_IRQ_MIPS6,
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CVMX_IRQ_MIPS7,
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/* 64 WORKQ interrupts. */
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CVMX_IRQ_WORKQ0,
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/* 16 GPIO interrupts. */
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CVMX_IRQ_GPIO0 = CVMX_IRQ_WORKQ0 + 64,
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/* 4 MBOX interrupts. */
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CVMX_IRQ_MBOX0 = CVMX_IRQ_GPIO0 + 16,
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/* 3 UART interrupts. */
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CVMX_IRQ_UART0 = CVMX_IRQ_MBOX0 + 4,
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CVMX_IRQ_PCI_INT0 = CVMX_IRQ_UART0 + 3,
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CVMX_IRQ_PCI_INT1,
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CVMX_IRQ_PCI_INT2,
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CVMX_IRQ_PCI_INT3,
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CVMX_IRQ_PCI_MSI0,
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CVMX_IRQ_PCI_MSI1,
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CVMX_IRQ_PCI_MSI2,
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CVMX_IRQ_PCI_MSI3,
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/* 2 TWSI interrupts */
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CVMX_IRQ_TWSI0,
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CVMX_IRQ_RML = CVMX_IRQ_TWSI0 + 2,
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/* 4 TRACE interrupts added in CN68XX */
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CVMX_IRQ_TRACE0,
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/* 5 GMX_DRP interrupts added in CN68XX */
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CVMX_IRQ_GMX_DRP0 = CVMX_IRQ_TRACE0 + 4,
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CVMX_IRQ_GMX_DRP1, /* Doesn't apply on CN52XX or CN63XX */
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CVMX_IRQ_IPD_DRP = CVMX_IRQ_GMX_DRP0 + 5,
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CVMX_IRQ_KEY_ZERO, /* Doesn't apply on CN52XX or CN63XX */
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/* 4 TIMER interrupts. */
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CVMX_IRQ_TIMER0,
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/* 2 USB interrupts. */
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CVMX_IRQ_USB0 = CVMX_IRQ_TIMER0 + 4, /* Doesn't apply on CN38XX or CN58XX */
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CVMX_IRQ_PCM = CVMX_IRQ_USB0 + 2, /* Doesn't apply on CN52XX or CN63XX */
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CVMX_IRQ_MPI, /* Doesn't apply on CN52XX or CN63XX */
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CVMX_IRQ_POWIQ, /* Added in CN56XX */
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CVMX_IRQ_IPDPPTHR, /* Added in CN56XX */
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/* 2 MII interrupts. */
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CVMX_IRQ_MII0, /* Added in CN56XX */
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CVMX_IRQ_BOOTDMA = CVMX_IRQ_MII0 + 2, /* Added in CN56XX */
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/* 32 WDOG interrupts. */
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CVMX_IRQ_WDOG0,
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CVMX_IRQ_NAND = CVMX_IRQ_WDOG0 + 32, /* Added in CN52XX */
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CVMX_IRQ_MIO, /* Added in CN63XX */
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CVMX_IRQ_IOB, /* Added in CN63XX */
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CVMX_IRQ_FPA, /* Added in CN63XX */
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CVMX_IRQ_POW, /* Added in CN63XX */
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CVMX_IRQ_L2C, /* Added in CN63XX */
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CVMX_IRQ_IPD, /* Added in CN63XX */
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CVMX_IRQ_PIP, /* Added in CN63XX */
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CVMX_IRQ_PKO, /* Added in CN63XX */
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CVMX_IRQ_ZIP, /* Added in CN63XX */
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CVMX_IRQ_TIM, /* Added in CN63XX */
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CVMX_IRQ_RAD, /* Added in CN63XX */
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CVMX_IRQ_KEY, /* Added in CN63XX */
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CVMX_IRQ_DFA, /* Added in CN63XX */
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CVMX_IRQ_USBCTL, /* Added in CN63XX */
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CVMX_IRQ_SLI, /* Added in CN63XX */
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CVMX_IRQ_DPI, /* Added in CN63XX */
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/* 5 AGX interrupts added in CN68XX. */
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CVMX_IRQ_AGX0, /* Added in CN63XX */
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CVMX_IRQ_AGL = CVMX_IRQ_AGX0 + 5, /* Added in CN63XX */
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CVMX_IRQ_PTP, /* Added in CN63XX */
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CVMX_IRQ_PEM0, /* Added in CN63XX */
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CVMX_IRQ_PEM1, /* Added in CN63XX */
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CVMX_IRQ_SRIO0, /* Added in CN63XX */
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CVMX_IRQ_SRIO1, /* Added in CN63XX */
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CVMX_IRQ_LMC0, /* Added in CN63XX */
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/* 4 LMC interrupts added in CN68XX. */
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CVMX_IRQ_DFM = CVMX_IRQ_LMC0 + 4, /* Added in CN63XX */
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CVMX_IRQ_RST, /* Added in CN63XX */
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CVMX_IRQ_ILK, /* Added for CN68XX */
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CVMX_IRQ_SRIO2, /* Added in CN66XX */
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CVMX_IRQ_DPI_DMA, /* Added in CN61XX */
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/* 6 addition timers added in CN61XX */
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CVMX_IRQ_TIMER4, /* Added in CN61XX */
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CVMX_IRQ_MAX = CVMX_IRQ_TIMER4 + 6 /* One greater than the last valid number.*/
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} cvmx_irq_t;
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/**
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* Function prototype for the exception handler
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*/
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typedef void (*cvmx_interrupt_exception_t)(uint64_t *registers);
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/**
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* Function prototype for interrupt handlers
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*/
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typedef void (*cvmx_interrupt_func_t)(int irq_number, uint64_t *registers, void *user_arg);
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/**
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* Register an interrupt handler for the specified interrupt number.
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*
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* @param irq_number Interrupt number to register for (0-135)
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* @param func Function to call on interrupt.
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* @param user_arg User data to pass to the interrupt handler
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*/
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void cvmx_interrupt_register(int irq_number, cvmx_interrupt_func_t func, void *user_arg);
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/**
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* Set the exception handler for all non interrupt sources.
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*
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* @param handler New exception handler
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* @return Old exception handler
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*/
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cvmx_interrupt_exception_t cvmx_interrupt_set_exception(cvmx_interrupt_exception_t handler);
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/**
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* Masks a given interrupt number.
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*
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* @param irq_number interrupt number to mask
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*/
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extern void (*cvmx_interrupt_mask_irq)(int irq_number);
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/**
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* Unmasks a given interrupt number
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*
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* @param irq_number interrupt number to unmask
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*/
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extern void (*cvmx_interrupt_unmask_irq)(int irq_number);
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/* Disable interrupts by clearing bit 0 of the COP0 status register,
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** and return the previous contents of the status register.
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** Note: this is only used to track interrupt status. */
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static inline uint32_t cvmx_interrupt_disable_save(void)
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{
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uint32_t flags;
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asm volatile (
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"DI %[flags]\n"
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: [flags]"=r" (flags));
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return(flags);
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}
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/* Restore the contents of the cop0 status register. Used with
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** cvmx_interrupt_disable_save to allow recursive interrupt disabling */
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static inline void cvmx_interrupt_restore(uint32_t flags)
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{
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/* If flags value indicates interrupts should be enabled, then enable them */
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if (flags & 1)
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{
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asm volatile (
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"EI \n"
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::);
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}
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}
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#define cvmx_local_irq_save(x) ({x = cvmx_interrupt_disable_save();})
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#define cvmx_local_irq_restore(x) cvmx_interrupt_restore(x)
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/**
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* Utility function to do interrupt safe printf
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*/
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#ifdef CVMX_BUILD_FOR_LINUX_KERNEL
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#define cvmx_safe_printf printk
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#elif defined(CVMX_BUILD_FOR_LINUX_USER)
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#define cvmx_safe_printf printf
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#else
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extern void cvmx_safe_printf(const char* format, ... ) __attribute__ ((format(printf, 1, 2)));
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#endif
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#define PRINT_ERROR(format, ...) cvmx_safe_printf("ERROR " format, ##__VA_ARGS__)
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#ifdef __cplusplus
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}
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#endif
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#endif
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