109d6f3c87
actually specify valid bases that should be treated just as normal. The PCI specifications have no indication that 0 would be a magic value indicating a disabled BAR as commonly used on at least amd64 and i386 but not sparc64. It's unclear what to do in pci_delete_resource() instead of writing 0 to a BAR though as there's no (other) way do disable individual BARs so its decoding is left enabled in case of __PCI_BAR_ZERO_VALID for now. Approved by: re (kib), jhb MFC after: 1 week
155 lines
4.8 KiB
C
155 lines
4.8 KiB
C
/*-
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)param.h 5.8 (Berkeley) 6/28/91
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* $FreeBSD$
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*/
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/*
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* Machine dependent constants for sparc64.
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*/
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/*
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* Round p (pointer or byte index) up to a correctly-aligned value
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* for all data types (int, long, ...). The result is unsigned int
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* and must be cast to any desired pointer type.
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*/
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#ifndef _ALIGNBYTES
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#define _ALIGNBYTES 0xf
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#endif
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#ifndef _ALIGN
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#define _ALIGN(p) (((u_long)(p) + _ALIGNBYTES) & ~_ALIGNBYTES)
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#endif
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#ifndef _NO_NAMESPACE_POLLUTION
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#define __PCI_BAR_ZERO_VALID
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#ifndef _MACHINE_PARAM_H_
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#define _MACHINE_PARAM_H_
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#ifndef MACHINE
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#define MACHINE "sparc64"
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#endif
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#ifndef MACHINE_ARCH
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#define MACHINE_ARCH "sparc64"
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#endif
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#define MID_MACHINE MID_SPARC64
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#if defined(SMP) || defined(KLD_MODULE)
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#define MAXCPU 16
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#else
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#define MAXCPU 1
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#endif /* SMP || KLD_MODULE */
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#define INT_SHIFT 2
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#define PTR_SHIFT 3
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#define ALIGNBYTES _ALIGNBYTES
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#define ALIGN(p) _ALIGN(p)
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/*
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* ALIGNED_POINTER is a boolean macro that checks whether an address
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* is valid to fetch data elements of type t from on this architecture.
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* This does not reflect the optimal alignment, just the possibility
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* (within reasonable limits).
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*/
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#define ALIGNED_POINTER(p, t) ((((u_long)(p)) & (sizeof (t) - 1)) == 0)
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/*
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* CACHE_LINE_SIZE is the compile-time maximum cache line size for an
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* architecture. It should be used with appropriate caution.
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*/
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#define CACHE_LINE_SHIFT 7
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#define CACHE_LINE_SIZE (1 << CACHE_LINE_SHIFT)
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#define PAGE_SHIFT_8K 13
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#define PAGE_SIZE_8K (1L<<PAGE_SHIFT_8K)
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#define PAGE_MASK_8K (PAGE_SIZE_8K-1)
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#define PAGE_SHIFT_64K 16
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#define PAGE_SIZE_64K (1L<<PAGE_SHIFT_64K)
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#define PAGE_MASK_64K (PAGE_SIZE_64K-1)
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#define PAGE_SHIFT_512K 19
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#define PAGE_SIZE_512K (1L<<PAGE_SHIFT_512K)
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#define PAGE_MASK_512K (PAGE_SIZE_512K-1)
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#define PAGE_SHIFT_4M 22
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#define PAGE_SIZE_4M (1L<<PAGE_SHIFT_4M)
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#define PAGE_MASK_4M (PAGE_SIZE_4M-1)
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#define PAGE_SHIFT_32M 25
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#define PAGE_SIZE_32M (1L<<PAGE_SHIFT_32M)
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#define PAGE_MASK_32M (PAGE_SIZE_32M-1)
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#define PAGE_SHIFT_256M 28
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#define PAGE_SIZE_256M (1L<<PAGE_SHIFT_256M)
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#define PAGE_MASK_256M (PAGE_SIZE_256M-1)
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#define PAGE_SHIFT_MIN PAGE_SHIFT_8K
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#define PAGE_SIZE_MIN PAGE_SIZE_8K
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#define PAGE_MASK_MIN PAGE_MASK_8K
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#define PAGE_SHIFT PAGE_SHIFT_8K /* LOG2(PAGE_SIZE) */
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#define PAGE_SIZE PAGE_SIZE_8K /* bytes/page */
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#define PAGE_MASK PAGE_MASK_8K
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#define PAGE_SHIFT_MAX PAGE_SHIFT_4M
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#define PAGE_SIZE_MAX PAGE_SIZE_4M
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#define PAGE_MASK_MAX PAGE_MASK_4M
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#ifndef KSTACK_PAGES
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#define KSTACK_PAGES 4 /* pages of kernel stack (with pcb) */
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#endif
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#define KSTACK_GUARD_PAGES 1 /* pages of kstack guard; 0 disables */
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#define PCPU_PAGES 1
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/*
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* Ceiling on size of buffer cache (really only effects write queueing,
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* the VM page cache is not effected), can be changed via
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* the kern.maxbcache /boot/loader.conf variable.
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*/
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#ifndef VM_BCACHE_SIZE_MAX
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#define VM_BCACHE_SIZE_MAX (400 * 1024 * 1024)
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#endif
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/*
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* Mach derived conversion macros
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*/
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#define round_page(x) (((unsigned long)(x) + PAGE_MASK) & ~PAGE_MASK)
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#define trunc_page(x) ((unsigned long)(x) & ~PAGE_MASK)
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#define atop(x) ((unsigned long)(x) >> PAGE_SHIFT)
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#define ptoa(x) ((unsigned long)(x) << PAGE_SHIFT)
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#define sparc64_btop(x) ((unsigned long)(x) >> PAGE_SHIFT)
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#define sparc64_ptob(x) ((unsigned long)(x) << PAGE_SHIFT)
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#define pgtok(x) ((unsigned long)(x) * (PAGE_SIZE / 1024))
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#endif /* !_MACHINE_PARAM_H_ */
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#endif /* !_NO_NAMESPACE_POLLUTION */
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