af198d882a
- CR2 - CR0, CR3, CR4 and EFER - GDT/IDT base/limit fields - CS/DS/ES/SS selector/base/limit/attrib fields The caching can be further restricted via the tunable 'hw.vmm.svm.vmcb_clean'. Restructure the code such that the fields above are only modified in a single place. This makes it easy to invalidate the VMCB cache when any of these fields is modified. |
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.. | ||
amd | ||
intel | ||
io | ||
vmm_dev.c | ||
vmm_host.c | ||
vmm_host.h | ||
vmm_instruction_emul.c | ||
vmm_ioport.c | ||
vmm_ioport.h | ||
vmm_ipi.c | ||
vmm_ipi.h | ||
vmm_ktr.h | ||
vmm_lapic.c | ||
vmm_lapic.h | ||
vmm_mem.c | ||
vmm_mem.h | ||
vmm_stat.c | ||
vmm_stat.h | ||
vmm_support.S | ||
vmm_util.c | ||
vmm_util.h | ||
vmm.c | ||
x86.c | ||
x86.h |