1b6e0dba04
-This version has header split, and as a result a number of aspects of the code have been improved/simplified. - Interrupt handling refined for performance - Many small bugs fixed along the way MFC after: ASAP - in time for 7.1
397 lines
11 KiB
C
397 lines
11 KiB
C
/******************************************************************************
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Copyright (c) 2001-2008, Intel Corporation
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. Neither the name of the Intel Corporation nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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******************************************************************************/
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/*$FreeBSD$*/
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#ifndef _IXGBE_H_
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#define _IXGBE_H_
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#include <sys/protosw.h>
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#include <sys/socket.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/sockio.h>
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#include <net/if.h>
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#include <net/if_arp.h>
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#include <net/bpf.h>
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#include <net/ethernet.h>
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#include <net/if_dl.h>
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#include <net/if_media.h>
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#include <net/bpf.h>
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#include <net/if_types.h>
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#include <net/if_vlan_var.h>
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#include <netinet/in_systm.h>
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#include <netinet/in.h>
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#include <netinet/if_ether.h>
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#include <netinet/ip.h>
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#include <netinet/ip6.h>
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#include <netinet/tcp.h>
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#include <netinet/udp.h>
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#include <machine/in_cksum.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <machine/resource.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <machine/clock.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <sys/proc.h>
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#include <sys/sysctl.h>
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#include <sys/endian.h>
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#include <sys/taskqueue.h>
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#include <sys/pcpu.h>
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#include "ixgbe_api.h"
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#include "tcp_lro.h"
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/* Tunables */
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/*
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* TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
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* number of transmit descriptors allocated by the driver. Increasing this
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* value allows the driver to queue more transmits. Each descriptor is 16
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* bytes. Performance tests have show the 2K value to be optimal for top
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* performance.
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*/
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#define DEFAULT_TXD 256
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#define PERFORM_TXD 2048
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#define MAX_TXD 4096
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#define MIN_TXD 64
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/*
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* RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
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* number of receive descriptors allocated for each RX queue. Increasing this
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* value allows the driver to buffer more incoming packets. Each descriptor
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* is 16 bytes. A receive buffer is also allocated for each descriptor.
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*
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* Note: with 8 rings and a dual port card, it is possible to bump up
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* against the system mbuf pool limit, you can tune nmbclusters
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* to adjust for this.
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*/
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#define DEFAULT_RXD 256
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#define PERFORM_RXD 2048
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#define MAX_RXD 4096
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#define MIN_RXD 64
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/* Alignment for rings */
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#define DBA_ALIGN 128
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/*
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* This parameter controls the maximum no of times the driver will loop in
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* the isr. Minimum Value = 1
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*/
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#define MAX_LOOP 10
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/*
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* This parameter controls the duration of transmit watchdog timer.
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*/
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#define IXGBE_TX_TIMEOUT 5 /* set to 5 seconds */
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/*
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* This parameters control when the driver calls the routine to reclaim
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* transmit descriptors.
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*/
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#define IXGBE_TX_CLEANUP_THRESHOLD (adapter->num_tx_desc / 8)
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#define IXGBE_TX_OP_THRESHOLD (adapter->num_tx_desc / 32)
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#define IXGBE_MAX_FRAME_SIZE 0x3F00
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/* Flow control constants */
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#define IXGBE_FC_PAUSE 0x680
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#define IXGBE_FC_HI 0x20000
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#define IXGBE_FC_LO 0x10000
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/* Defines for printing debug information */
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#define DEBUG_INIT 0
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#define DEBUG_IOCTL 0
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#define DEBUG_HW 0
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#define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n")
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#define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A)
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#define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B)
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#define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n")
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#define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A)
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#define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B)
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#define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n")
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#define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A)
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#define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B)
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#define MAX_NUM_MULTICAST_ADDRESSES 128
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#define IXGBE_MAX_SCATTER 100
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#define MSIX_82598_BAR 3
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#define MSIX_82599_BAR 4
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#define IXGBE_TSO_SIZE 65535
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#define IXGBE_TX_BUFFER_SIZE ((u32) 1514)
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#define IXGBE_RX_HDR 128
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#define CSUM_OFFLOAD 7 /* Bits in csum flags */
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/* The number of MSIX messages the 82598 supports */
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#define IXGBE_MSGS 18
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/* For 6.X code compatibility */
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#if __FreeBSD_version < 700000
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#define ETHER_BPF_MTAP BPF_MTAP
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#define CSUM_TSO 0
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#define IFCAP_TSO4 0
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#define FILTER_STRAY
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#define FILTER_HANDLED
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#endif
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/*
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* Interrupt Moderation parameters
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*/
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#define IXGBE_LOW_LATENCY 128
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#define IXGBE_AVE_LATENCY 400
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#define IXGBE_BULK_LATENCY 1200
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#define IXGBE_LINK_ITR 2000
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/* Header split args for get_bug */
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#define IXGBE_CLEAN_HDR 1
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#define IXGBE_CLEAN_PKT 2
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#define IXGBE_CLEAN_ALL 3
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/* Used for auto RX queue configuration */
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extern int mp_ncpus;
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/*
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*****************************************************************************
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* vendor_info_array
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*
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* This array contains the list of Subvendor/Subdevice IDs on which the driver
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* should load.
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*
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*****************************************************************************
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*/
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typedef struct _ixgbe_vendor_info_t {
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unsigned int vendor_id;
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unsigned int device_id;
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unsigned int subvendor_id;
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unsigned int subdevice_id;
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unsigned int index;
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} ixgbe_vendor_info_t;
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struct ixgbe_tx_buf {
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struct mbuf *m_head;
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bus_dmamap_t map;
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};
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struct ixgbe_rx_buf {
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struct mbuf *m_head;
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struct mbuf *m_pack;
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bus_dmamap_t map;
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};
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/*
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* Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free.
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*/
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struct ixgbe_dma_alloc {
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bus_addr_t dma_paddr;
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caddr_t dma_vaddr;
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bus_dma_tag_t dma_tag;
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bus_dmamap_t dma_map;
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bus_dma_segment_t dma_seg;
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bus_size_t dma_size;
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int dma_nseg;
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};
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/*
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* The transmit ring, one per tx queue
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*/
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struct tx_ring {
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struct adapter *adapter;
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struct mtx tx_mtx;
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u32 me;
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u32 msix;
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u32 eims;
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u32 watchdog_timer;
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union ixgbe_adv_tx_desc *tx_base;
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volatile u32 tx_hwb;
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struct ixgbe_dma_alloc txdma;
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struct task tx_task;
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struct taskqueue *tq;
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u32 next_avail_tx_desc;
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u32 next_tx_to_clean;
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struct ixgbe_tx_buf *tx_buffers;
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volatile u16 tx_avail;
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u32 txd_cmd;
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bus_dma_tag_t txtag;
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char mtx_name[16];
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/* Soft Stats */
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u32 no_tx_desc_avail;
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u32 no_tx_desc_late;
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u64 tx_irq;
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u64 total_packets;
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};
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/*
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* The Receive ring, one per rx queue
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*/
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struct rx_ring {
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struct adapter *adapter;
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struct mtx rx_mtx;
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u32 me;
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u32 msix;
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u32 eims;
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u32 payload;
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struct task rx_task;
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struct taskqueue *tq;
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union ixgbe_adv_rx_desc *rx_base;
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struct ixgbe_dma_alloc rxdma;
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struct lro_ctrl lro;
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unsigned int last_cleaned;
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unsigned int next_to_check;
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struct ixgbe_rx_buf *rx_buffers;
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bus_dma_tag_t rxtag;
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bus_dmamap_t spare_map;
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struct mbuf *fmp;
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struct mbuf *lmp;
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char mtx_name[16];
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u32 bytes; /* Used for AIM calc */
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u32 eitr_setting;
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/* Soft stats */
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u64 rx_irq;
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u64 rx_split_packets;
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u64 rx_packets;
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u64 rx_bytes;
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};
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/* Our adapter structure */
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struct adapter {
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struct ifnet *ifp;
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struct ixgbe_hw hw;
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struct ixgbe_osdep osdep;
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struct device *dev;
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struct resource *pci_mem;
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struct resource *msix_mem;
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/*
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* Interrupt resources:
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* Oplin has 20 MSIX messages
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* so allocate that for now.
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*/
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void *tag[IXGBE_MSGS];
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struct resource *res[IXGBE_MSGS];
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int rid[IXGBE_MSGS];
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struct ifmedia media;
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struct callout timer;
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int msix;
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int if_flags;
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struct mtx core_mtx;
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/* Info about the board itself */
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u32 part_num;
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u32 optics;
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bool link_active;
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u16 max_frame_size;
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u32 link_speed;
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u32 linkvec;
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u32 tx_int_delay;
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u32 tx_abs_int_delay;
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u32 rx_int_delay;
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u32 rx_abs_int_delay;
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/* Mbuf cluster size */
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u32 rx_mbuf_sz;
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/* Check for missing optics */
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bool sfp_probe;
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/*
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* Transmit rings:
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* Allocated at run time, an array of rings.
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*/
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struct tx_ring *tx_rings;
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int num_tx_desc;
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int num_tx_queues;
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/*
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* Receive rings:
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* Allocated at run time, an array of rings.
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*/
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struct rx_ring *rx_rings;
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int num_rx_desc;
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int num_rx_queues;
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u32 rx_mask;
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u32 rx_process_limit;
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/* Misc stats maintained by the driver */
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unsigned long dropped_pkts;
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unsigned long mbuf_defrag_failed;
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unsigned long mbuf_header_failed;
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unsigned long mbuf_packet_failed;
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unsigned long no_tx_map_avail;
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unsigned long no_tx_dma_setup;
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unsigned long watchdog_events;
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unsigned long tso_tx;
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unsigned long link_irq;
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struct ixgbe_hw_stats stats;
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};
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#define IXGBE_CORE_LOCK_INIT(_sc, _name) \
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mtx_init(&(_sc)->core_mtx, _name, "IXGBE Core Lock", MTX_DEF)
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#define IXGBE_CORE_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->core_mtx)
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#define IXGBE_TX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->tx_mtx)
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#define IXGBE_RX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->rx_mtx)
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#define IXGBE_CORE_LOCK(_sc) mtx_lock(&(_sc)->core_mtx)
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#define IXGBE_TX_LOCK(_sc) mtx_lock(&(_sc)->tx_mtx)
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#define IXGBE_RX_LOCK(_sc) mtx_lock(&(_sc)->rx_mtx)
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#define IXGBE_CORE_UNLOCK(_sc) mtx_unlock(&(_sc)->core_mtx)
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#define IXGBE_TX_UNLOCK(_sc) mtx_unlock(&(_sc)->tx_mtx)
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#define IXGBE_RX_UNLOCK(_sc) mtx_unlock(&(_sc)->rx_mtx)
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#define IXGBE_CORE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->core_mtx, MA_OWNED)
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#define IXGBE_TX_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->tx_mtx, MA_OWNED)
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#endif /* _IXGBE_H_ */
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