65e7d70b09
when the user has indicated that the system has synchronized TSCs or it has P-state invariant TSCs. For the former case, we may clear the tunable if it fails the test to prevent accidental foot-shooting. For the latter case, we may set it if it passes the test to notify the user that it may be usable.
783 lines
18 KiB
C
783 lines
18 KiB
C
/*-
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* Copyright (c) 1990 The Regents of the University of California.
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* Copyright (c) 2010 Alexander Motin <mav@FreeBSD.org>
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz and Don Ahn.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)clock.c 7.2 (Berkeley) 5/12/91
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* Routines to handle clock hardware.
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*/
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#include "opt_clock.h"
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#include "opt_isa.h"
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#include "opt_mca.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/lock.h>
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#include <sys/kdb.h>
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#include <sys/mutex.h>
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#include <sys/proc.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <sys/sched.h>
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#include <sys/smp.h>
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#include <sys/sysctl.h>
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#include <sys/timeet.h>
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#include <sys/timetc.h>
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#include <machine/clock.h>
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#include <machine/cpu.h>
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#include <machine/intr_machdep.h>
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#include <machine/ppireg.h>
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#include <machine/timerreg.h>
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#ifdef PC98
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#include <pc98/pc98/pc98_machdep.h>
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#else
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#include <isa/rtc.h>
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#endif
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#ifdef DEV_ISA
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#ifdef PC98
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#include <pc98/cbus/cbus.h>
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#else
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#include <isa/isareg.h>
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#endif
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#include <isa/isavar.h>
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#endif
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#ifdef DEV_MCA
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#include <i386/bios/mca_machdep.h>
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#endif
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int clkintr_pending;
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#ifndef TIMER_FREQ
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#ifdef PC98
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#define TIMER_FREQ 2457600
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#else
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#define TIMER_FREQ 1193182
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#endif
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#endif
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u_int i8254_freq = TIMER_FREQ;
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TUNABLE_INT("hw.i8254.freq", &i8254_freq);
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int i8254_max_count;
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static int i8254_timecounter = 1;
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struct mtx clock_lock;
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static struct intsrc *i8254_intsrc;
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static uint16_t i8254_lastcount;
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static uint16_t i8254_offset;
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static int (*i8254_pending)(struct intsrc *);
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static int i8254_ticked;
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struct attimer_softc {
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int intr_en;
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int port_rid, intr_rid;
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struct resource *port_res;
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struct resource *intr_res;
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#ifdef PC98
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int port_rid2;
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struct resource *port_res2;
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#endif
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void *intr_handler;
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struct timecounter tc;
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struct eventtimer et;
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int mode;
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#define MODE_STOP 0
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#define MODE_PERIODIC 1
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#define MODE_ONESHOT 2
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uint32_t period;
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};
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static struct attimer_softc *attimer_sc = NULL;
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static int timer0_period = -2;
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/* Values for timerX_state: */
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#define RELEASED 0
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#define RELEASE_PENDING 1
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#define ACQUIRED 2
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#define ACQUIRE_PENDING 3
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static u_char timer2_state;
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static unsigned i8254_get_timecount(struct timecounter *tc);
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static void set_i8254_freq(int mode, uint32_t period);
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static int
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clkintr(void *arg)
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{
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struct attimer_softc *sc = (struct attimer_softc *)arg;
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if (i8254_timecounter && sc->period != 0) {
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mtx_lock_spin(&clock_lock);
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if (i8254_ticked)
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i8254_ticked = 0;
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else {
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i8254_offset += i8254_max_count;
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i8254_lastcount = 0;
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}
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clkintr_pending = 0;
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mtx_unlock_spin(&clock_lock);
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}
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if (sc && sc->et.et_active && sc->mode != MODE_STOP)
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sc->et.et_event_cb(&sc->et, sc->et.et_arg);
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#ifdef DEV_MCA
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/* Reset clock interrupt by asserting bit 7 of port 0x61 */
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if (MCA_system)
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outb(0x61, inb(0x61) | 0x80);
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#endif
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return (FILTER_HANDLED);
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}
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int
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timer_spkr_acquire(void)
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{
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int mode;
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#ifdef PC98
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mode = TIMER_SEL1 | TIMER_SQWAVE | TIMER_16BIT;
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#else
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mode = TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT;
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#endif
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if (timer2_state != RELEASED)
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return (-1);
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timer2_state = ACQUIRED;
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/*
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* This access to the timer registers is as atomic as possible
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* because it is a single instruction. We could do better if we
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* knew the rate. Use of splclock() limits glitches to 10-100us,
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* and this is probably good enough for timer2, so we aren't as
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* careful with it as with timer0.
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*/
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#ifdef PC98
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outb(TIMER_MODE, TIMER_SEL1 | (mode & 0x3f));
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#else
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outb(TIMER_MODE, TIMER_SEL2 | (mode & 0x3f));
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#endif
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ppi_spkr_on(); /* enable counter2 output to speaker */
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return (0);
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}
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int
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timer_spkr_release(void)
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{
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if (timer2_state != ACQUIRED)
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return (-1);
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timer2_state = RELEASED;
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#ifdef PC98
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outb(TIMER_MODE, TIMER_SEL1 | TIMER_SQWAVE | TIMER_16BIT);
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#else
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outb(TIMER_MODE, TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT);
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#endif
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ppi_spkr_off(); /* disable counter2 output to speaker */
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return (0);
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}
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void
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timer_spkr_setfreq(int freq)
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{
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freq = i8254_freq / freq;
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mtx_lock_spin(&clock_lock);
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#ifdef PC98
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outb(TIMER_CNTR1, freq & 0xff);
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outb(TIMER_CNTR1, freq >> 8);
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#else
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outb(TIMER_CNTR2, freq & 0xff);
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outb(TIMER_CNTR2, freq >> 8);
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#endif
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mtx_unlock_spin(&clock_lock);
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}
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static int
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getit(void)
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{
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int high, low;
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mtx_lock_spin(&clock_lock);
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/* Select timer0 and latch counter value. */
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outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
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low = inb(TIMER_CNTR0);
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high = inb(TIMER_CNTR0);
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mtx_unlock_spin(&clock_lock);
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return ((high << 8) | low);
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}
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#ifndef DELAYDEBUG
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static u_int
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get_tsc(__unused struct timecounter *tc)
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{
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return (rdtsc32());
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}
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static __inline int
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delay_tc(int n)
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{
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struct timecounter *tc;
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timecounter_get_t *func;
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uint64_t end, freq, now;
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u_int last, mask, u;
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tc = timecounter;
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freq = atomic_load_acq_64(&tsc_freq);
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if (tsc_is_invariant && freq != 0) {
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func = get_tsc;
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mask = ~0u;
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} else {
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if (tc->tc_quality <= 0)
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return (0);
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func = tc->tc_get_timecount;
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mask = tc->tc_counter_mask;
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freq = tc->tc_frequency;
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}
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now = 0;
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end = freq * n / 1000000;
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if (func == get_tsc)
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sched_pin();
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last = func(tc) & mask;
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do {
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cpu_spinwait();
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u = func(tc) & mask;
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if (u < last)
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now += mask - last + u + 1;
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else
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now += u - last;
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last = u;
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} while (now < end);
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if (func == get_tsc)
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sched_unpin();
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return (1);
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}
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#endif
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/*
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* Wait "n" microseconds.
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* Relies on timer 1 counting down from (i8254_freq / hz)
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* Note: timer had better have been programmed before this is first used!
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*/
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void
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DELAY(int n)
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{
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int delta, prev_tick, tick, ticks_left;
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#ifdef DELAYDEBUG
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int getit_calls = 1;
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int n1;
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static int state = 0;
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if (state == 0) {
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state = 1;
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for (n1 = 1; n1 <= 10000000; n1 *= 10)
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DELAY(n1);
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state = 2;
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}
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if (state == 1)
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printf("DELAY(%d)...", n);
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#else
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if (delay_tc(n))
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return;
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#endif
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/*
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* Read the counter first, so that the rest of the setup overhead is
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* counted. Guess the initial overhead is 20 usec (on most systems it
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* takes about 1.5 usec for each of the i/o's in getit(). The loop
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* takes about 6 usec on a 486/33 and 13 usec on a 386/20. The
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* multiplications and divisions to scale the count take a while).
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*
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* However, if ddb is active then use a fake counter since reading
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* the i8254 counter involves acquiring a lock. ddb must not do
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* locking for many reasons, but it calls here for at least atkbd
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* input.
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*/
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#ifdef KDB
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if (kdb_active)
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prev_tick = 1;
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else
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#endif
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prev_tick = getit();
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n -= 0; /* XXX actually guess no initial overhead */
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/*
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* Calculate (n * (i8254_freq / 1e6)) without using floating point
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* and without any avoidable overflows.
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*/
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if (n <= 0)
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ticks_left = 0;
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else if (n < 256)
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/*
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* Use fixed point to avoid a slow division by 1000000.
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* 39099 = 1193182 * 2^15 / 10^6 rounded to nearest.
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* 2^15 is the first power of 2 that gives exact results
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* for n between 0 and 256.
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*/
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ticks_left = ((u_int)n * 39099 + (1 << 15) - 1) >> 15;
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else
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/*
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* Don't bother using fixed point, although gcc-2.7.2
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* generates particularly poor code for the long long
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* division, since even the slow way will complete long
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* before the delay is up (unless we're interrupted).
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*/
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ticks_left = ((u_int)n * (long long)i8254_freq + 999999)
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/ 1000000;
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while (ticks_left > 0) {
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#ifdef KDB
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if (kdb_active) {
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#ifdef PC98
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outb(0x5f, 0);
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#else
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inb(0x84);
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#endif
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tick = prev_tick - 1;
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if (tick <= 0)
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tick = i8254_max_count;
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} else
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#endif
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tick = getit();
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#ifdef DELAYDEBUG
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++getit_calls;
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#endif
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delta = prev_tick - tick;
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prev_tick = tick;
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if (delta < 0) {
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delta += i8254_max_count;
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/*
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* Guard against i8254_max_count being wrong.
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* This shouldn't happen in normal operation,
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* but it may happen if set_i8254_freq() is
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* traced.
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*/
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if (delta < 0)
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delta = 0;
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}
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ticks_left -= delta;
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}
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#ifdef DELAYDEBUG
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if (state == 1)
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printf(" %d calls to getit() at %d usec each\n",
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getit_calls, (n + 5) / getit_calls);
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#endif
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}
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static void
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set_i8254_freq(int mode, uint32_t period)
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{
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int new_count;
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mtx_lock_spin(&clock_lock);
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if (mode == MODE_STOP) {
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if (i8254_timecounter) {
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mode = MODE_PERIODIC;
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new_count = 0x10000;
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} else
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new_count = -1;
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} else {
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new_count = min(((uint64_t)i8254_freq * period +
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0x80000000LLU) >> 32, 0x10000);
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}
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if (new_count == timer0_period)
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goto out;
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i8254_max_count = ((new_count & ~0xffff) != 0) ? 0xffff : new_count;
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timer0_period = (mode == MODE_PERIODIC) ? new_count : -1;
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switch (mode) {
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case MODE_STOP:
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outb(TIMER_MODE, TIMER_SEL0 | TIMER_INTTC | TIMER_16BIT);
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outb(TIMER_CNTR0, 0);
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outb(TIMER_CNTR0, 0);
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break;
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case MODE_PERIODIC:
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outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT);
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outb(TIMER_CNTR0, new_count & 0xff);
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outb(TIMER_CNTR0, new_count >> 8);
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break;
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case MODE_ONESHOT:
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outb(TIMER_MODE, TIMER_SEL0 | TIMER_INTTC | TIMER_16BIT);
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outb(TIMER_CNTR0, new_count & 0xff);
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outb(TIMER_CNTR0, new_count >> 8);
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break;
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}
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out:
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mtx_unlock_spin(&clock_lock);
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}
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static void
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i8254_restore(void)
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{
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timer0_period = -2;
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if (attimer_sc != NULL)
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set_i8254_freq(attimer_sc->mode, attimer_sc->period);
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else
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set_i8254_freq(0, 0);
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}
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#ifndef __amd64__
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/*
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* Restore all the timers non-atomically (XXX: should be atomically).
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*
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* This function is called from pmtimer_resume() to restore all the timers.
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* This should not be necessary, but there are broken laptops that do not
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* restore all the timers on resume.
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* As long as pmtimer is not part of amd64 suport, skip this for the amd64
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* case.
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*/
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void
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timer_restore(void)
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{
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i8254_restore(); /* restore i8254_freq and hz */
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#ifndef PC98
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atrtc_restore(); /* reenable RTC interrupts */
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#endif
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}
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#endif
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/* This is separate from startrtclock() so that it can be called early. */
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void
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i8254_init(void)
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{
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mtx_init(&clock_lock, "clk", NULL, MTX_SPIN | MTX_NOPROFILE);
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#ifdef PC98
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if (pc98_machine_type & M_8M)
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i8254_freq = 1996800L; /* 1.9968 MHz */
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#endif
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set_i8254_freq(0, 0);
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}
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|
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void
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startrtclock()
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{
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init_TSC();
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}
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|
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void
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cpu_initclocks(void)
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{
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cpu_initclocks_bsp();
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}
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|
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static int
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sysctl_machdep_i8254_freq(SYSCTL_HANDLER_ARGS)
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{
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int error;
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u_int freq;
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/*
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|
* Use `i8254' instead of `timer' in external names because `timer'
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* is too generic. Should use it everywhere.
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*/
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freq = i8254_freq;
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error = sysctl_handle_int(oidp, &freq, 0, req);
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if (error == 0 && req->newptr != NULL) {
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i8254_freq = freq;
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if (attimer_sc != NULL) {
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set_i8254_freq(attimer_sc->mode, attimer_sc->period);
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attimer_sc->tc.tc_frequency = freq;
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} else {
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set_i8254_freq(0, 0);
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}
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}
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return (error);
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}
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SYSCTL_PROC(_machdep, OID_AUTO, i8254_freq, CTLTYPE_INT | CTLFLAG_RW,
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0, sizeof(u_int), sysctl_machdep_i8254_freq, "IU",
|
|
"i8254 timer frequency");
|
|
|
|
static unsigned
|
|
i8254_get_timecount(struct timecounter *tc)
|
|
{
|
|
device_t dev = (device_t)tc->tc_priv;
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|
struct attimer_softc *sc = device_get_softc(dev);
|
|
register_t flags;
|
|
uint16_t count;
|
|
u_int high, low;
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|
|
|
if (sc->period == 0)
|
|
return (i8254_max_count - getit());
|
|
|
|
#ifdef __amd64__
|
|
flags = read_rflags();
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|
#else
|
|
flags = read_eflags();
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|
#endif
|
|
mtx_lock_spin(&clock_lock);
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|
|
|
/* Select timer0 and latch counter value. */
|
|
outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
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|
|
|
low = inb(TIMER_CNTR0);
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|
high = inb(TIMER_CNTR0);
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|
count = i8254_max_count - ((high << 8) | low);
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|
if (count < i8254_lastcount ||
|
|
(!i8254_ticked && (clkintr_pending ||
|
|
((count < 20 || (!(flags & PSL_I) &&
|
|
count < i8254_max_count / 2u)) &&
|
|
i8254_pending != NULL && i8254_pending(i8254_intsrc))))) {
|
|
i8254_ticked = 1;
|
|
i8254_offset += i8254_max_count;
|
|
}
|
|
i8254_lastcount = count;
|
|
count += i8254_offset;
|
|
mtx_unlock_spin(&clock_lock);
|
|
return (count);
|
|
}
|
|
|
|
static int
|
|
attimer_start(struct eventtimer *et,
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|
struct bintime *first, struct bintime *period)
|
|
{
|
|
device_t dev = (device_t)et->et_priv;
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|
struct attimer_softc *sc = device_get_softc(dev);
|
|
|
|
if (period != NULL) {
|
|
sc->mode = MODE_PERIODIC;
|
|
sc->period = period->frac >> 32;
|
|
} else {
|
|
sc->mode = MODE_ONESHOT;
|
|
sc->period = first->frac >> 32;
|
|
}
|
|
if (!sc->intr_en) {
|
|
i8254_intsrc->is_pic->pic_enable_source(i8254_intsrc);
|
|
sc->intr_en = 1;
|
|
}
|
|
set_i8254_freq(sc->mode, sc->period);
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
attimer_stop(struct eventtimer *et)
|
|
{
|
|
device_t dev = (device_t)et->et_priv;
|
|
struct attimer_softc *sc = device_get_softc(dev);
|
|
|
|
sc->mode = MODE_STOP;
|
|
sc->period = 0;
|
|
set_i8254_freq(sc->mode, sc->period);
|
|
return (0);
|
|
}
|
|
|
|
#ifdef DEV_ISA
|
|
/*
|
|
* Attach to the ISA PnP descriptors for the timer
|
|
*/
|
|
static struct isa_pnp_id attimer_ids[] = {
|
|
{ 0x0001d041 /* PNP0100 */, "AT timer" },
|
|
{ 0 }
|
|
};
|
|
|
|
#ifdef PC98
|
|
static void
|
|
pc98_alloc_resource(device_t dev)
|
|
{
|
|
static bus_addr_t iat1[] = {0, 2, 4, 6};
|
|
static bus_addr_t iat2[] = {0, 4};
|
|
struct attimer_softc *sc;
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
sc->port_rid = 0;
|
|
bus_set_resource(dev, SYS_RES_IOPORT, sc->port_rid, IO_TIMER1, 1);
|
|
sc->port_res = isa_alloc_resourcev(dev, SYS_RES_IOPORT,
|
|
&sc->port_rid, iat1, 4, RF_ACTIVE);
|
|
if (sc->port_res == NULL)
|
|
device_printf(dev, "Warning: Couldn't map I/O.\n");
|
|
else
|
|
isa_load_resourcev(sc->port_res, iat1, 4);
|
|
|
|
sc->port_rid2 = 4;
|
|
bus_set_resource(dev, SYS_RES_IOPORT, sc->port_rid2, TIMER_CNTR1, 1);
|
|
sc->port_res2 = isa_alloc_resourcev(dev, SYS_RES_IOPORT,
|
|
&sc->port_rid2, iat2, 2, RF_ACTIVE);
|
|
if (sc->port_res2 == NULL)
|
|
device_printf(dev, "Warning: Couldn't map I/O.\n");
|
|
else
|
|
isa_load_resourcev(sc->port_res2, iat2, 2);
|
|
}
|
|
|
|
static void
|
|
pc98_release_resource(device_t dev)
|
|
{
|
|
struct attimer_softc *sc;
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
if (sc->port_res)
|
|
bus_release_resource(dev, SYS_RES_IOPORT, sc->port_rid,
|
|
sc->port_res);
|
|
if (sc->port_res2)
|
|
bus_release_resource(dev, SYS_RES_IOPORT, sc->port_rid2,
|
|
sc->port_res2);
|
|
}
|
|
#endif
|
|
|
|
static int
|
|
attimer_probe(device_t dev)
|
|
{
|
|
int result;
|
|
|
|
result = ISA_PNP_PROBE(device_get_parent(dev), dev, attimer_ids);
|
|
/* ENOENT means no PnP-ID, device is hinted. */
|
|
if (result == ENOENT) {
|
|
device_set_desc(dev, "AT timer");
|
|
#ifdef PC98
|
|
/* To print resources correctly. */
|
|
pc98_alloc_resource(dev);
|
|
pc98_release_resource(dev);
|
|
#endif
|
|
return (BUS_PROBE_LOW_PRIORITY);
|
|
}
|
|
return (result);
|
|
}
|
|
|
|
static int
|
|
attimer_attach(device_t dev)
|
|
{
|
|
struct attimer_softc *sc;
|
|
u_long s;
|
|
int i;
|
|
|
|
attimer_sc = sc = device_get_softc(dev);
|
|
bzero(sc, sizeof(struct attimer_softc));
|
|
#ifdef PC98
|
|
pc98_alloc_resource(dev);
|
|
#else
|
|
if (!(sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT,
|
|
&sc->port_rid, IO_TIMER1, IO_TIMER1 + 3, 4, RF_ACTIVE)))
|
|
device_printf(dev,"Warning: Couldn't map I/O.\n");
|
|
#endif
|
|
i8254_intsrc = intr_lookup_source(0);
|
|
if (i8254_intsrc != NULL)
|
|
i8254_pending = i8254_intsrc->is_pic->pic_source_pending;
|
|
resource_int_value(device_get_name(dev), device_get_unit(dev),
|
|
"timecounter", &i8254_timecounter);
|
|
set_i8254_freq(0, 0);
|
|
if (i8254_timecounter) {
|
|
sc->tc.tc_get_timecount = i8254_get_timecount;
|
|
sc->tc.tc_counter_mask = 0xffff;
|
|
sc->tc.tc_frequency = i8254_freq;
|
|
sc->tc.tc_name = "i8254";
|
|
sc->tc.tc_quality = 0;
|
|
sc->tc.tc_priv = dev;
|
|
tc_init(&sc->tc);
|
|
}
|
|
if (resource_int_value(device_get_name(dev), device_get_unit(dev),
|
|
"clock", &i) != 0 || i != 0) {
|
|
sc->intr_rid = 0;
|
|
while (bus_get_resource(dev, SYS_RES_IRQ, sc->intr_rid,
|
|
&s, NULL) == 0 && s != 0)
|
|
sc->intr_rid++;
|
|
if (!(sc->intr_res = bus_alloc_resource(dev, SYS_RES_IRQ,
|
|
&sc->intr_rid, 0, 0, 1, RF_ACTIVE))) {
|
|
device_printf(dev,"Can't map interrupt.\n");
|
|
return (0);
|
|
}
|
|
/* Dirty hack, to make bus_setup_intr to not enable source. */
|
|
i8254_intsrc->is_handlers++;
|
|
if ((bus_setup_intr(dev, sc->intr_res,
|
|
INTR_MPSAFE | INTR_TYPE_CLK,
|
|
(driver_filter_t *)clkintr, NULL,
|
|
sc, &sc->intr_handler))) {
|
|
device_printf(dev, "Can't setup interrupt.\n");
|
|
i8254_intsrc->is_handlers--;
|
|
return (0);
|
|
}
|
|
i8254_intsrc->is_handlers--;
|
|
i8254_intsrc->is_pic->pic_enable_intr(i8254_intsrc);
|
|
sc->et.et_name = "i8254";
|
|
sc->et.et_flags = ET_FLAGS_PERIODIC;
|
|
if (!i8254_timecounter)
|
|
sc->et.et_flags |= ET_FLAGS_ONESHOT;
|
|
sc->et.et_quality = 100;
|
|
sc->et.et_frequency = i8254_freq;
|
|
sc->et.et_min_period.sec = 0;
|
|
sc->et.et_min_period.frac =
|
|
((0x0002LLU << 48) / i8254_freq) << 16;
|
|
sc->et.et_max_period.sec = 0xffff / i8254_freq;
|
|
sc->et.et_max_period.frac =
|
|
((0xfffeLLU << 48) / i8254_freq) << 16;
|
|
sc->et.et_start = attimer_start;
|
|
sc->et.et_stop = attimer_stop;
|
|
sc->et.et_priv = dev;
|
|
et_register(&sc->et);
|
|
}
|
|
return(0);
|
|
}
|
|
|
|
static int
|
|
attimer_resume(device_t dev)
|
|
{
|
|
|
|
i8254_restore();
|
|
return (0);
|
|
}
|
|
|
|
static device_method_t attimer_methods[] = {
|
|
/* Device interface */
|
|
DEVMETHOD(device_probe, attimer_probe),
|
|
DEVMETHOD(device_attach, attimer_attach),
|
|
DEVMETHOD(device_detach, bus_generic_detach),
|
|
DEVMETHOD(device_shutdown, bus_generic_shutdown),
|
|
DEVMETHOD(device_suspend, bus_generic_suspend),
|
|
DEVMETHOD(device_resume, attimer_resume),
|
|
{ 0, 0 }
|
|
};
|
|
|
|
static driver_t attimer_driver = {
|
|
"attimer",
|
|
attimer_methods,
|
|
sizeof(struct attimer_softc),
|
|
};
|
|
|
|
static devclass_t attimer_devclass;
|
|
|
|
DRIVER_MODULE(attimer, isa, attimer_driver, attimer_devclass, 0, 0);
|
|
DRIVER_MODULE(attimer, acpi, attimer_driver, attimer_devclass, 0, 0);
|
|
|
|
#endif /* DEV_ISA */
|