freebsd-skq/sys/mips/cavium
Ruslan Bukin c214a270f5 Allow setting access-width for UART registers.
This is required for FDT's standard "reg-io-width" property
(similar to "reg-shift" property) found in many DTS files.

This fixes operation on Altera Arria 10 SOC Development Kit,
where standard ns8250 uart allows 4-byte access only.

Reviewed by:	kan, marcel
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D9785
2017-02-27 20:08:42 +00:00
..
cryptocteon
octe
usb
asm_octeon.S
ciu.c
cvmx_config.h
files.octeon1
if_octm.c
obio.c
obiovar.h
octeon_cop2.h
octeon_cop2.S
octeon_ds1337.c
octeon_ebt3000_cf.c
octeon_gpio.c
octeon_gpiovar.h
octeon_irq.h
octeon_machdep.c
octeon_mp.c
octeon_nmi.S
octeon_pci_console.c
octeon_pcmap_regs.h
octeon_pmc.c
octeon_rnd.c
octeon_rtc.c
octeon_wdog.c
octopci_bus_space.c
octopci.c
octopcireg.h
octopcivar.h
std.octeon1
uart_bus_octeonusart.c Allow setting access-width for UART registers. 2017-02-27 20:08:42 +00:00
uart_cpu_octeonusart.c
uart_dev_oct16550.c