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b2a1ae8353
freebsd-skq/sys/sparc64/include
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Marius Strobl b2a1ae8353 - Newer firmware versions no longer provide SUNW,stop-self so just 
disable interrupts and loop forever with these.
- Hide all MP-related bits in <machine/smp.h> underneath #ifdef SMP.
- Inline ipi_all_but_self(9) and ipi_selected(9). We don't expose any
  additional bits but save a few cycles by doing so.
- Remove ipi_all(9), which actually only called panic(9). It can't be
  implemented natively anyway and having it removed at least causes
  MI users to fail already fail when linking.
2008-09-18 13:56:30 +00:00
..
_bus.h
_inttypes.h
_limits.h
_stdint.h
_types.h
asi.h For cheetah-class CPUs ensure that the dt512_0 is set to hold 8k pages 2008-09-08 21:24:25 +00:00
asm.h
asmacros.h
atomic.h Oops. Use atomic_add_long() for atomic_fetchadd_long() (not atomic_add_int()) 2008-03-19 07:27:24 +00:00
bus_common.h - Use the name returned by device_get_nameunit(9) for the name of the 2008-05-07 21:22:15 +00:00
bus_dma.h
bus_private.h Rototill the sparc64 nexus(4) (actually this brings in the code the 2007-03-07 21:13:51 +00:00
bus.h - Remove the BUS_HANDLE_MIN checking in the __BUS_DEBUG_ACCESS macro; 2008-05-08 21:10:39 +00:00
cache.h - USIII-based machines can consist of CPUs having different cache 2008-09-02 21:13:54 +00:00
ccr.h
clock.h - USIII-based machines can consist of CPUs running at different 2008-09-03 17:39:19 +00:00
cpu.h Flesh out MMU and cache handling of cheetah-class CPUs. 2008-09-04 19:58:52 +00:00
cpufunc.h - USIII-based machines can consist of CPUs running at different 2008-09-03 17:39:19 +00:00
db_machdep.h
dcr.h Flesh out MMU and cache handling of cheetah-class CPUs. 2008-09-04 19:58:52 +00:00
elf.h
endian.h In the replacement text of the __bswapN_const() macros encapsulate the 2006-10-30 21:50:11 +00:00
exec.h
float.h
floatingpoint.h
fp.h
frame.h Convert the remainder of the low hanging fruits regarding including 2007-01-19 11:15:34 +00:00
fsr.h Convert the remainder of the low hanging fruits regarding including 2007-01-19 11:15:34 +00:00
gdb_machdep.h
idprom.h
ieee.h
ieeefp.h
in_cksum.h Revert the addition of "__volatile" to "__asm" done in r180011, since 2008-07-05 15:28:30 +00:00
instr.h
intr_machdep.h o Rename ic_eoi to ic_clear to emphasize the functions it points 2008-04-23 20:04:38 +00:00
iommureg.h - Divorce the IOTSBs, which so far where handled via a global list 2007-08-05 11:56:44 +00:00
iommuvar.h - Use the name returned by device_get_nameunit(9) for the name of the 2008-05-07 21:22:15 +00:00
kdb.h Add kdb_cpu_sync_icache(), intended to synchronize instruction 2007-06-09 21:55:17 +00:00
kerneldump.h
ktr.h
limits.h
lsu.h
md_var.h The Sun disk label only uses 16-bit fields for cylinders, heads and 2008-02-11 21:40:22 +00:00
memdev.h Remove the unused major/minor numbers from iodev and memdev. 2008-06-25 07:45:31 +00:00
metadata.h
mutex.h
ofw_bus.h
ofw_machdep.h
ofw_mem.h
ofw_nexus.h Rototill the sparc64 nexus(4) (actually this brings in the code the 2007-03-07 21:13:51 +00:00
param.h When building a kernel module, define MAXCPU the same as SMP so 2008-03-27 05:03:26 +00:00
pcb.h Convert the remainder of the low hanging fruits regarding including 2007-01-19 11:15:34 +00:00
pcpu.h - USIII-based machines can consist of CPUs running at different 2008-09-03 17:39:19 +00:00
pmap.h
pmc_mdep.h Add stubs to unbreak LINT. 2007-12-07 13:45:47 +00:00
proc.h
profile.h - Add bits for userland profiling. For sun4u this is compile-tested only. 2007-05-11 23:43:55 +00:00
pstate.h
ptrace.h
reg.h
reloc.h Remove 3rd clause, renumber, ok per email 2007-01-12 07:26:21 +00:00
resource.h
runq.h
sc_machdep.h
setjmp.h Remove 3rd clause, renumber, ok per email 2007-01-12 07:26:21 +00:00
sf_buf.h
sigframe.h
signal.h
smp.h - Newer firmware versions no longer provide SUNW,stop-self so just 2008-09-18 13:56:30 +00:00
stack.h Break out stack(9) from ddb(4): 2007-12-02 20:40:35 +00:00
stdarg.h
sysarch.h - Include <machine/utrap.h> so this header doesn't have an MD 2008-04-23 20:38:37 +00:00
tick.h - USIII-based machines can consist of CPUs running at different 2008-09-03 17:39:19 +00:00
tlb.h For cheetah-class CPUs ensure that the dt512_0 is set to hold 8k pages 2008-09-08 21:24:25 +00:00
trap.h Use the PROM provided SUNW,set-trap-table to take over the trap 2008-09-04 20:52:54 +00:00
tsb.h Convert the remainder of the low hanging fruits regarding including 2007-01-19 11:15:34 +00:00
tstate.h
tte.h The physical address space of cheetah-class CPUs has been extended 2008-09-04 19:43:14 +00:00
ucontext.h
upa.h
utrap.h
varargs.h
ver.h - USIII-based machines can consist of CPUs running at different 2008-09-03 17:39:19 +00:00
vmparam.h Assume OpenSolaris knows better and use their value for VM_MAX_PROM_ADDRESS. 2008-08-12 20:00:28 +00:00
watch.h
wstate.h