ef36c6939e
o) Add TARGET_ABI to the MIPS toolchain build process. This sets the default ABI to one of o32, n32 or n64. If it is not set, o32 is assumed as that is the current default. o) Set the default GCC cpu type to any specified TARGET_CPUTYPE. This is necessary to have a working "cc" if e.g. mips64 is specified, as binutils will refuse to link objects using different ISAs in some cases. o) Add support for n32 and n64 ABIs to binutils and GCC. o) Add additional required libgcc2 stubs for n32 and n64. o) Add support for the "mips64r2" architecture to GCC. Add the "octeon" o) When static linking, wrap default libraries in --start-group and --end-group. This is required for static linking to work on n64 with the interdependencies between libraries there. This is what other OSes that support n64 seem to do, as well. o) Fix our GCC spec to define __mips64 for 64-bit targets, not __mips64__, the former being what libgcc, etc., check and the latter seemingly being a misspelling of a hand merge from a Linux spec. o) When no TARGET_CPUTYPE is specified at build time, make GCC take the default ISA from the ABI. Our old defaults were too liberal and assumed that 64-bit ABIs should default to the MIPS64 ISA and that 32-bit ABIs should default to the MIPS32 ISA, when we are supporting or will support some systems based on earlier 32-bit and 64-bit ISAs, most notably MIPS-III. o) Merge a new opcode file (and support code) from a later version of binutils and add flags and code necessary to support Octeon-specific instructions. This should also make merging opcodes for other modern architectures easier. Reviewed by: imp
132 lines
4.7 KiB
C
132 lines
4.7 KiB
C
/* bfd back-end for mips support
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Copyright 1990, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 2000, 2001,
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2002, 2003, 2004 Free Software Foundation, Inc.
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Written by Steve Chamberlain of Cygnus Support.
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This file is part of BFD, the Binary File Descriptor library.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
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#include "bfd.h"
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#include "sysdep.h"
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#include "libbfd.h"
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static const bfd_arch_info_type *mips_compatible
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(const bfd_arch_info_type *, const bfd_arch_info_type *);
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/* The default routine tests bits_per_word, which is wrong on mips as
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mips word size doesn't correlate with reloc size. */
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static const bfd_arch_info_type *
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mips_compatible (const bfd_arch_info_type *a, const bfd_arch_info_type *b)
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{
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if (a->arch != b->arch)
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return NULL;
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/* Machine compatibility is checked in
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_bfd_mips_elf_merge_private_bfd_data. */
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return a;
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}
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#define N(BITS_WORD, BITS_ADDR, NUMBER, PRINT, DEFAULT, NEXT) \
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{ \
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BITS_WORD, /* bits in a word */ \
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BITS_ADDR, /* bits in an address */ \
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8, /* 8 bits in a byte */ \
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bfd_arch_mips, \
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NUMBER, \
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"mips", \
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PRINT, \
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3, \
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DEFAULT, \
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mips_compatible, \
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bfd_default_scan, \
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NEXT, \
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}
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enum
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{
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I_mips3000,
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I_mips3900,
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I_mips4000,
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I_mips4010,
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I_mips4100,
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I_mips4111,
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I_mips4120,
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I_mips4300,
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I_mips4400,
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I_mips4600,
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I_mips4650,
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I_mips5000,
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I_mips5400,
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I_mips5500,
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I_mips6000,
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I_mips7000,
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I_mips8000,
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I_mips9000,
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I_mips10000,
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I_mips12000,
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I_mips16,
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I_mips5,
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I_mipsisa32,
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I_mipsisa32r2,
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I_mipsisa64,
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I_mipsisa64r2,
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I_mipsocteon,
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I_sb1,
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};
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#define NN(index) (&arch_info_struct[(index) + 1])
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static const bfd_arch_info_type arch_info_struct[] =
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{
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N (32, 32, bfd_mach_mips3000, "mips:3000", FALSE, NN(I_mips3000)),
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N (32, 32, bfd_mach_mips3900, "mips:3900", FALSE, NN(I_mips3900)),
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N (64, 64, bfd_mach_mips4000, "mips:4000", FALSE, NN(I_mips4000)),
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N (64, 64, bfd_mach_mips4010, "mips:4010", FALSE, NN(I_mips4010)),
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N (64, 64, bfd_mach_mips4100, "mips:4100", FALSE, NN(I_mips4100)),
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N (64, 64, bfd_mach_mips4111, "mips:4111", FALSE, NN(I_mips4111)),
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N (64, 64, bfd_mach_mips4120, "mips:4120", FALSE, NN(I_mips4120)),
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N (64, 64, bfd_mach_mips4300, "mips:4300", FALSE, NN(I_mips4300)),
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N (64, 64, bfd_mach_mips4400, "mips:4400", FALSE, NN(I_mips4400)),
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N (64, 64, bfd_mach_mips4600, "mips:4600", FALSE, NN(I_mips4600)),
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N (64, 64, bfd_mach_mips4650, "mips:4650", FALSE, NN(I_mips4650)),
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N (64, 64, bfd_mach_mips5000, "mips:5000", FALSE, NN(I_mips5000)),
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N (64, 64, bfd_mach_mips5400, "mips:5400", FALSE, NN(I_mips5400)),
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N (64, 64, bfd_mach_mips5500, "mips:5500", FALSE, NN(I_mips5500)),
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N (32, 32, bfd_mach_mips6000, "mips:6000", FALSE, NN(I_mips6000)),
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N (64, 64, bfd_mach_mips7000, "mips:7000", FALSE, NN(I_mips7000)),
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N (64, 64, bfd_mach_mips8000, "mips:8000", FALSE, NN(I_mips8000)),
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N (64, 64, bfd_mach_mips9000, "mips:9000", FALSE, NN(I_mips9000)),
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N (64, 64, bfd_mach_mips10000,"mips:10000", FALSE, NN(I_mips10000)),
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N (64, 64, bfd_mach_mips12000,"mips:12000", FALSE, NN(I_mips12000)),
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N (64, 64, bfd_mach_mips16, "mips:16", FALSE, NN(I_mips16)),
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N (64, 64, bfd_mach_mips5, "mips:mips5", FALSE, NN(I_mips5)),
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N (32, 32, bfd_mach_mipsisa32, "mips:isa32", FALSE, NN(I_mipsisa32)),
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N (32, 32, bfd_mach_mipsisa32r2,"mips:isa32r2", FALSE, NN(I_mipsisa32r2)),
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N (64, 64, bfd_mach_mipsisa64, "mips:isa64", FALSE, NN(I_mipsisa64)),
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N (64, 64, bfd_mach_mipsisa64r2,"mips:isa64r2", FALSE, NN(I_mipsisa64r2)),
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N (64, 64, bfd_mach_mips_octeon,"mips:octeon", FALSE, NN(I_mipsocteon)),
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N (64, 64, bfd_mach_mips_sb1, "mips:sb1", FALSE, 0),
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};
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/* The default architecture is mips:3000, but with a machine number of
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zero. This lets the linker distinguish between a default setting
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of mips, and an explicit setting of mips:3000. */
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const bfd_arch_info_type bfd_mips_arch =
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N (32, 32, 0, "mips", TRUE, &arch_info_struct[0]);
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