b3e9732a76
the legacy 8259A PICs. - Implement an ICH-comptabile PCI interrupt router on the lpc device with 8 steerable pins configured via config space access to byte-wide registers at 0x60-63 and 0x68-6b. - For each configured PCI INTx interrupt, route it to both an I/O APIC pin and a PCI interrupt router pin. When a PCI INTx interrupt is asserted, ensure that both pins are asserted. - Provide an initial routing of PCI interrupt router (PIRQ) pins to 8259A pins (ISA IRQs) and initialize the interrupt line config register for the corresponding PCI function with the ISA IRQ as this matches existing hardware. - Add a global _PIC method for OSPM to select the desired interrupt routing configuration. - Update the _PRT methods for PCI bridges to provide both APIC and legacy PRT tables and return the appropriate table based on the configured routing configuration. Note that if the lpc device is not configured, no routing information is provided. - When the lpc device is enabled, provide ACPI PCI link devices corresponding to each PIRQ pin. - Add a VMM ioctl to adjust the trigger mode (edge vs level) for 8259A pins via the ELCR. - Mark the power management SCI as level triggered. - Don't hardcode the number of elements in Packages in the source for the DSDT. iasl(8) will fill in the actual number of elements, and this makes it simpler to generate a Package with a variable number of elements. Reviewed by: tycho
829 lines
18 KiB
C
829 lines
18 KiB
C
/*-
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* Copyright (c) 2011 NetApp, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/types.h>
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#include <sys/mman.h>
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#include <sys/time.h>
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#include <machine/atomic.h>
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#include <machine/segments.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <err.h>
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#include <libgen.h>
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#include <unistd.h>
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#include <assert.h>
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#include <errno.h>
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#include <pthread.h>
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#include <pthread_np.h>
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#include <sysexits.h>
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#include <machine/vmm.h>
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#include <vmmapi.h>
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#include "bhyverun.h"
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#include "acpi.h"
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#include "inout.h"
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#include "dbgport.h"
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#include "ioapic.h"
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#include "mem.h"
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#include "mevent.h"
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#include "mptbl.h"
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#include "pci_emul.h"
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#include "pci_irq.h"
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#include "pci_lpc.h"
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#include "smbiostbl.h"
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#include "xmsr.h"
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#include "spinup_ap.h"
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#include "rtc.h"
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#define GUEST_NIO_PORT 0x488 /* guest upcalls via i/o port */
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#define VMEXIT_CONTINUE 1 /* continue from next instruction */
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#define VMEXIT_RESTART 2 /* restart current instruction */
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#define VMEXIT_ABORT 3 /* abort the vm run loop */
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#define VMEXIT_RESET 4 /* guest machine has reset */
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#define VMEXIT_POWEROFF 5 /* guest machine has powered off */
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#define MB (1024UL * 1024)
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#define GB (1024UL * MB)
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typedef int (*vmexit_handler_t)(struct vmctx *, struct vm_exit *, int *vcpu);
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char *vmname;
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int guest_ncpus;
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char *guest_uuid_str;
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static int guest_vmexit_on_hlt, guest_vmexit_on_pause;
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static int virtio_msix = 1;
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static int x2apic_mode = 0; /* default is xAPIC */
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static int strictio;
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static int strictmsr = 1;
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static int acpi;
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static char *progname;
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static const int BSP = 0;
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static cpuset_t cpumask;
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static void vm_loop(struct vmctx *ctx, int vcpu, uint64_t rip);
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struct vm_exit vmexit[VM_MAXCPU];
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struct bhyvestats {
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uint64_t vmexit_bogus;
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uint64_t vmexit_bogus_switch;
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uint64_t vmexit_hlt;
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uint64_t vmexit_pause;
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uint64_t vmexit_mtrap;
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uint64_t vmexit_inst_emul;
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uint64_t cpu_switch_rotate;
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uint64_t cpu_switch_direct;
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int io_reset;
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int io_poweroff;
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} stats;
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struct mt_vmm_info {
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pthread_t mt_thr;
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struct vmctx *mt_ctx;
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int mt_vcpu;
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} mt_vmm_info[VM_MAXCPU];
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static cpuset_t *vcpumap[VM_MAXCPU] = { NULL };
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static void
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usage(int code)
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{
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fprintf(stderr,
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"Usage: %s [-aehwAHIPW] [-g <gdb port>] [-s <pci>] [-c vcpus]\n"
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" %*s [-p vcpu:hostcpu] [-m mem] [-l <lpc>] <vm>\n"
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" -a: local apic is in xAPIC mode (deprecated)\n"
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|
" -A: create an ACPI table\n"
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" -g: gdb port\n"
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|
" -c: # cpus (default 1)\n"
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" -C: include guest memory in core file\n"
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" -p: pin 'vcpu' to 'hostcpu'\n"
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" -H: vmexit from the guest on hlt\n"
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" -P: vmexit from the guest on pause\n"
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" -W: force virtio to use single-vector MSI\n"
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" -e: exit on unhandled I/O access\n"
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" -h: help\n"
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" -s: <slot,driver,configinfo> PCI slot config\n"
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" -l: LPC device configuration\n"
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" -m: memory size in MB\n"
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" -w: ignore unimplemented MSRs\n"
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" -x: local apic is in x2APIC mode\n"
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" -Y: disable MPtable generation\n"
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" -U: uuid\n",
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progname, (int)strlen(progname), "");
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exit(code);
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}
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static int
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pincpu_parse(const char *opt)
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{
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int vcpu, pcpu;
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if (sscanf(opt, "%d:%d", &vcpu, &pcpu) != 2) {
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fprintf(stderr, "invalid format: %s\n", opt);
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return (-1);
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}
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if (vcpu < 0 || vcpu >= VM_MAXCPU) {
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fprintf(stderr, "vcpu '%d' outside valid range from 0 to %d\n",
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vcpu, VM_MAXCPU - 1);
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return (-1);
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}
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if (pcpu < 0 || pcpu >= CPU_SETSIZE) {
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fprintf(stderr, "hostcpu '%d' outside valid range from "
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"0 to %d\n", pcpu, CPU_SETSIZE - 1);
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return (-1);
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}
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if (vcpumap[vcpu] == NULL) {
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if ((vcpumap[vcpu] = malloc(sizeof(cpuset_t))) == NULL) {
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perror("malloc");
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return (-1);
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}
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CPU_ZERO(vcpumap[vcpu]);
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}
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CPU_SET(pcpu, vcpumap[vcpu]);
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return (0);
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}
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void *
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paddr_guest2host(struct vmctx *ctx, uintptr_t gaddr, size_t len)
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{
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return (vm_map_gpa(ctx, gaddr, len));
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}
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int
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fbsdrun_vmexit_on_pause(void)
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{
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return (guest_vmexit_on_pause);
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}
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int
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fbsdrun_vmexit_on_hlt(void)
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{
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return (guest_vmexit_on_hlt);
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}
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int
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fbsdrun_virtio_msix(void)
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{
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return (virtio_msix);
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}
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static void *
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fbsdrun_start_thread(void *param)
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{
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char tname[MAXCOMLEN + 1];
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struct mt_vmm_info *mtp;
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int vcpu;
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mtp = param;
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vcpu = mtp->mt_vcpu;
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snprintf(tname, sizeof(tname), "vcpu %d", vcpu);
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pthread_set_name_np(mtp->mt_thr, tname);
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vm_loop(mtp->mt_ctx, vcpu, vmexit[vcpu].rip);
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/* not reached */
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exit(1);
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return (NULL);
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}
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void
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fbsdrun_addcpu(struct vmctx *ctx, int fromcpu, int newcpu, uint64_t rip)
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{
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int error;
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assert(fromcpu == BSP);
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CPU_SET_ATOMIC(newcpu, &cpumask);
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/*
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* Set up the vmexit struct to allow execution to start
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* at the given RIP
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*/
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vmexit[newcpu].rip = rip;
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vmexit[newcpu].inst_length = 0;
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mt_vmm_info[newcpu].mt_ctx = ctx;
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mt_vmm_info[newcpu].mt_vcpu = newcpu;
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error = pthread_create(&mt_vmm_info[newcpu].mt_thr, NULL,
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fbsdrun_start_thread, &mt_vmm_info[newcpu]);
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assert(error == 0);
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}
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static int
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fbsdrun_deletecpu(struct vmctx *ctx, int vcpu)
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{
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if (!CPU_ISSET(vcpu, &cpumask)) {
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fprintf(stderr, "Attempting to delete unknown cpu %d\n", vcpu);
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exit(1);
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}
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CPU_CLR_ATOMIC(vcpu, &cpumask);
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return (CPU_EMPTY(&cpumask));
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}
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static int
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vmexit_handle_notify(struct vmctx *ctx, struct vm_exit *vme, int *pvcpu,
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uint32_t eax)
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{
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#if BHYVE_DEBUG
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/*
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* put guest-driven debug here
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*/
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#endif
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return (VMEXIT_CONTINUE);
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}
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static int
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vmexit_inout(struct vmctx *ctx, struct vm_exit *vme, int *pvcpu)
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{
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int error;
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int bytes, port, in, out;
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uint32_t eax;
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int vcpu;
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vcpu = *pvcpu;
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port = vme->u.inout.port;
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bytes = vme->u.inout.bytes;
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eax = vme->u.inout.eax;
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in = vme->u.inout.in;
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out = !in;
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/* We don't deal with these */
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if (vme->u.inout.string || vme->u.inout.rep)
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return (VMEXIT_ABORT);
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|
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/* Extra-special case of host notifications */
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if (out && port == GUEST_NIO_PORT)
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return (vmexit_handle_notify(ctx, vme, pvcpu, eax));
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error = emulate_inout(ctx, vcpu, in, port, bytes, &eax, strictio);
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if (error == INOUT_OK && in)
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error = vm_set_register(ctx, vcpu, VM_REG_GUEST_RAX, eax);
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switch (error) {
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case INOUT_OK:
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return (VMEXIT_CONTINUE);
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case INOUT_RESET:
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stats.io_reset++;
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return (VMEXIT_RESET);
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case INOUT_POWEROFF:
|
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stats.io_poweroff++;
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return (VMEXIT_POWEROFF);
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default:
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fprintf(stderr, "Unhandled %s%c 0x%04x\n",
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in ? "in" : "out",
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bytes == 1 ? 'b' : (bytes == 2 ? 'w' : 'l'), port);
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return (VMEXIT_ABORT);
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}
|
|
}
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|
|
static int
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vmexit_rdmsr(struct vmctx *ctx, struct vm_exit *vme, int *pvcpu)
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{
|
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uint64_t val;
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uint32_t eax, edx;
|
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int error;
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val = 0;
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error = emulate_rdmsr(ctx, *pvcpu, vme->u.msr.code, &val);
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if (error != 0) {
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fprintf(stderr, "rdmsr to register %#x on vcpu %d\n",
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vme->u.msr.code, *pvcpu);
|
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if (strictmsr) {
|
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error = vm_inject_exception2(ctx, *pvcpu, IDT_GP, 0);
|
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assert(error == 0);
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return (VMEXIT_RESTART);
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}
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}
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|
|
eax = val;
|
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error = vm_set_register(ctx, *pvcpu, VM_REG_GUEST_RAX, eax);
|
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assert(error == 0);
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edx = val >> 32;
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error = vm_set_register(ctx, *pvcpu, VM_REG_GUEST_RDX, edx);
|
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assert(error == 0);
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|
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return (VMEXIT_CONTINUE);
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}
|
|
|
|
static int
|
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vmexit_wrmsr(struct vmctx *ctx, struct vm_exit *vme, int *pvcpu)
|
|
{
|
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int error;
|
|
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error = emulate_wrmsr(ctx, *pvcpu, vme->u.msr.code, vme->u.msr.wval);
|
|
if (error != 0) {
|
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fprintf(stderr, "wrmsr to register %#x(%#lx) on vcpu %d\n",
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vme->u.msr.code, vme->u.msr.wval, *pvcpu);
|
|
if (strictmsr) {
|
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error = vm_inject_exception2(ctx, *pvcpu, IDT_GP, 0);
|
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assert(error == 0);
|
|
return (VMEXIT_RESTART);
|
|
}
|
|
}
|
|
return (VMEXIT_CONTINUE);
|
|
}
|
|
|
|
static int
|
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vmexit_spinup_ap(struct vmctx *ctx, struct vm_exit *vme, int *pvcpu)
|
|
{
|
|
int newcpu;
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int retval = VMEXIT_CONTINUE;
|
|
|
|
newcpu = spinup_ap(ctx, *pvcpu,
|
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vme->u.spinup_ap.vcpu, vme->u.spinup_ap.rip);
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|
|
|
return (retval);
|
|
}
|
|
|
|
static int
|
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vmexit_vmx(struct vmctx *ctx, struct vm_exit *vmexit, int *pvcpu)
|
|
{
|
|
|
|
fprintf(stderr, "vm exit[%d]\n", *pvcpu);
|
|
fprintf(stderr, "\treason\t\tVMX\n");
|
|
fprintf(stderr, "\trip\t\t0x%016lx\n", vmexit->rip);
|
|
fprintf(stderr, "\tinst_length\t%d\n", vmexit->inst_length);
|
|
fprintf(stderr, "\tstatus\t\t%d\n", vmexit->u.vmx.status);
|
|
fprintf(stderr, "\texit_reason\t%u\n", vmexit->u.vmx.exit_reason);
|
|
fprintf(stderr, "\tqualification\t0x%016lx\n",
|
|
vmexit->u.vmx.exit_qualification);
|
|
fprintf(stderr, "\tinst_type\t\t%d\n", vmexit->u.vmx.inst_type);
|
|
fprintf(stderr, "\tinst_error\t\t%d\n", vmexit->u.vmx.inst_error);
|
|
|
|
return (VMEXIT_ABORT);
|
|
}
|
|
|
|
static int
|
|
vmexit_bogus(struct vmctx *ctx, struct vm_exit *vmexit, int *pvcpu)
|
|
{
|
|
|
|
stats.vmexit_bogus++;
|
|
|
|
return (VMEXIT_RESTART);
|
|
}
|
|
|
|
static int
|
|
vmexit_hlt(struct vmctx *ctx, struct vm_exit *vmexit, int *pvcpu)
|
|
{
|
|
|
|
stats.vmexit_hlt++;
|
|
|
|
/*
|
|
* Just continue execution with the next instruction. We use
|
|
* the HLT VM exit as a way to be friendly with the host
|
|
* scheduler.
|
|
*/
|
|
return (VMEXIT_CONTINUE);
|
|
}
|
|
|
|
static int
|
|
vmexit_pause(struct vmctx *ctx, struct vm_exit *vmexit, int *pvcpu)
|
|
{
|
|
|
|
stats.vmexit_pause++;
|
|
|
|
return (VMEXIT_CONTINUE);
|
|
}
|
|
|
|
static int
|
|
vmexit_mtrap(struct vmctx *ctx, struct vm_exit *vmexit, int *pvcpu)
|
|
{
|
|
|
|
stats.vmexit_mtrap++;
|
|
|
|
return (VMEXIT_RESTART);
|
|
}
|
|
|
|
static int
|
|
vmexit_inst_emul(struct vmctx *ctx, struct vm_exit *vmexit, int *pvcpu)
|
|
{
|
|
int err;
|
|
stats.vmexit_inst_emul++;
|
|
|
|
err = emulate_mem(ctx, *pvcpu, vmexit->u.inst_emul.gpa,
|
|
&vmexit->u.inst_emul.vie);
|
|
|
|
if (err) {
|
|
if (err == EINVAL) {
|
|
fprintf(stderr,
|
|
"Failed to emulate instruction at 0x%lx\n",
|
|
vmexit->rip);
|
|
} else if (err == ESRCH) {
|
|
fprintf(stderr, "Unhandled memory access to 0x%lx\n",
|
|
vmexit->u.inst_emul.gpa);
|
|
}
|
|
|
|
return (VMEXIT_ABORT);
|
|
}
|
|
|
|
return (VMEXIT_CONTINUE);
|
|
}
|
|
|
|
static pthread_mutex_t resetcpu_mtx = PTHREAD_MUTEX_INITIALIZER;
|
|
static pthread_cond_t resetcpu_cond = PTHREAD_COND_INITIALIZER;
|
|
|
|
static int
|
|
vmexit_suspend(struct vmctx *ctx, struct vm_exit *vmexit, int *pvcpu)
|
|
{
|
|
enum vm_suspend_how how;
|
|
|
|
how = vmexit->u.suspended.how;
|
|
|
|
fbsdrun_deletecpu(ctx, *pvcpu);
|
|
|
|
if (*pvcpu != BSP) {
|
|
pthread_mutex_lock(&resetcpu_mtx);
|
|
pthread_cond_signal(&resetcpu_cond);
|
|
pthread_mutex_unlock(&resetcpu_mtx);
|
|
pthread_exit(NULL);
|
|
}
|
|
|
|
pthread_mutex_lock(&resetcpu_mtx);
|
|
while (!CPU_EMPTY(&cpumask)) {
|
|
pthread_cond_wait(&resetcpu_cond, &resetcpu_mtx);
|
|
}
|
|
pthread_mutex_unlock(&resetcpu_mtx);
|
|
|
|
switch (how) {
|
|
case VM_SUSPEND_RESET:
|
|
exit(0);
|
|
case VM_SUSPEND_POWEROFF:
|
|
exit(1);
|
|
case VM_SUSPEND_HALT:
|
|
exit(2);
|
|
default:
|
|
fprintf(stderr, "vmexit_suspend: invalid reason %d\n", how);
|
|
exit(100);
|
|
}
|
|
return (0); /* NOTREACHED */
|
|
}
|
|
|
|
static vmexit_handler_t handler[VM_EXITCODE_MAX] = {
|
|
[VM_EXITCODE_INOUT] = vmexit_inout,
|
|
[VM_EXITCODE_VMX] = vmexit_vmx,
|
|
[VM_EXITCODE_BOGUS] = vmexit_bogus,
|
|
[VM_EXITCODE_RDMSR] = vmexit_rdmsr,
|
|
[VM_EXITCODE_WRMSR] = vmexit_wrmsr,
|
|
[VM_EXITCODE_MTRAP] = vmexit_mtrap,
|
|
[VM_EXITCODE_INST_EMUL] = vmexit_inst_emul,
|
|
[VM_EXITCODE_SPINUP_AP] = vmexit_spinup_ap,
|
|
[VM_EXITCODE_SUSPENDED] = vmexit_suspend
|
|
};
|
|
|
|
static void
|
|
vm_loop(struct vmctx *ctx, int vcpu, uint64_t rip)
|
|
{
|
|
int error, rc, prevcpu;
|
|
enum vm_exitcode exitcode;
|
|
enum vm_suspend_how how;
|
|
|
|
if (vcpumap[vcpu] != NULL) {
|
|
error = pthread_setaffinity_np(pthread_self(),
|
|
sizeof(cpuset_t), vcpumap[vcpu]);
|
|
assert(error == 0);
|
|
}
|
|
|
|
while (1) {
|
|
error = vm_run(ctx, vcpu, rip, &vmexit[vcpu]);
|
|
if (error != 0)
|
|
break;
|
|
|
|
prevcpu = vcpu;
|
|
|
|
exitcode = vmexit[vcpu].exitcode;
|
|
if (exitcode >= VM_EXITCODE_MAX || handler[exitcode] == NULL) {
|
|
fprintf(stderr, "vm_loop: unexpected exitcode 0x%x\n",
|
|
exitcode);
|
|
exit(1);
|
|
}
|
|
|
|
rc = (*handler[exitcode])(ctx, &vmexit[vcpu], &vcpu);
|
|
|
|
switch (rc) {
|
|
case VMEXIT_CONTINUE:
|
|
rip = vmexit[vcpu].rip + vmexit[vcpu].inst_length;
|
|
break;
|
|
case VMEXIT_RESTART:
|
|
rip = vmexit[vcpu].rip;
|
|
break;
|
|
case VMEXIT_RESET:
|
|
case VMEXIT_POWEROFF:
|
|
if (rc == VMEXIT_RESET)
|
|
how = VM_SUSPEND_RESET;
|
|
else
|
|
how = VM_SUSPEND_POWEROFF;
|
|
error = vm_suspend(ctx, how);
|
|
assert(error == 0 || errno == EALREADY);
|
|
rip = vmexit[vcpu].rip + vmexit[vcpu].inst_length;
|
|
break;
|
|
case VMEXIT_ABORT:
|
|
abort();
|
|
default:
|
|
exit(1);
|
|
}
|
|
}
|
|
fprintf(stderr, "vm_run error %d, errno %d\n", error, errno);
|
|
}
|
|
|
|
static int
|
|
num_vcpus_allowed(struct vmctx *ctx)
|
|
{
|
|
int tmp, error;
|
|
|
|
error = vm_get_capability(ctx, BSP, VM_CAP_UNRESTRICTED_GUEST, &tmp);
|
|
|
|
/*
|
|
* The guest is allowed to spinup more than one processor only if the
|
|
* UNRESTRICTED_GUEST capability is available.
|
|
*/
|
|
if (error == 0)
|
|
return (VM_MAXCPU);
|
|
else
|
|
return (1);
|
|
}
|
|
|
|
void
|
|
fbsdrun_set_capabilities(struct vmctx *ctx, int cpu)
|
|
{
|
|
int err, tmp;
|
|
|
|
if (fbsdrun_vmexit_on_hlt()) {
|
|
err = vm_get_capability(ctx, cpu, VM_CAP_HALT_EXIT, &tmp);
|
|
if (err < 0) {
|
|
fprintf(stderr, "VM exit on HLT not supported\n");
|
|
exit(1);
|
|
}
|
|
vm_set_capability(ctx, cpu, VM_CAP_HALT_EXIT, 1);
|
|
if (cpu == BSP)
|
|
handler[VM_EXITCODE_HLT] = vmexit_hlt;
|
|
}
|
|
|
|
if (fbsdrun_vmexit_on_pause()) {
|
|
/*
|
|
* pause exit support required for this mode
|
|
*/
|
|
err = vm_get_capability(ctx, cpu, VM_CAP_PAUSE_EXIT, &tmp);
|
|
if (err < 0) {
|
|
fprintf(stderr,
|
|
"SMP mux requested, no pause support\n");
|
|
exit(1);
|
|
}
|
|
vm_set_capability(ctx, cpu, VM_CAP_PAUSE_EXIT, 1);
|
|
if (cpu == BSP)
|
|
handler[VM_EXITCODE_PAUSE] = vmexit_pause;
|
|
}
|
|
|
|
if (x2apic_mode)
|
|
err = vm_set_x2apic_state(ctx, cpu, X2APIC_ENABLED);
|
|
else
|
|
err = vm_set_x2apic_state(ctx, cpu, X2APIC_DISABLED);
|
|
|
|
if (err) {
|
|
fprintf(stderr, "Unable to set x2apic state (%d)\n", err);
|
|
exit(1);
|
|
}
|
|
|
|
vm_set_capability(ctx, cpu, VM_CAP_ENABLE_INVPCID, 1);
|
|
}
|
|
|
|
int
|
|
main(int argc, char *argv[])
|
|
{
|
|
int c, error, gdb_port, err, bvmcons;
|
|
int dump_guest_memory, max_vcpus, mptgen;
|
|
struct vmctx *ctx;
|
|
uint64_t rip;
|
|
size_t memsize;
|
|
|
|
bvmcons = 0;
|
|
dump_guest_memory = 0;
|
|
progname = basename(argv[0]);
|
|
gdb_port = 0;
|
|
guest_ncpus = 1;
|
|
memsize = 256 * MB;
|
|
mptgen = 1;
|
|
|
|
while ((c = getopt(argc, argv, "abehwxACHIPWYp:g:c:s:m:l:U:")) != -1) {
|
|
switch (c) {
|
|
case 'a':
|
|
x2apic_mode = 0;
|
|
break;
|
|
case 'A':
|
|
acpi = 1;
|
|
break;
|
|
case 'b':
|
|
bvmcons = 1;
|
|
break;
|
|
case 'p':
|
|
if (pincpu_parse(optarg) != 0) {
|
|
errx(EX_USAGE, "invalid vcpu pinning "
|
|
"configuration '%s'", optarg);
|
|
}
|
|
break;
|
|
case 'c':
|
|
guest_ncpus = atoi(optarg);
|
|
break;
|
|
case 'C':
|
|
dump_guest_memory = 1;
|
|
break;
|
|
case 'g':
|
|
gdb_port = atoi(optarg);
|
|
break;
|
|
case 'l':
|
|
if (lpc_device_parse(optarg) != 0) {
|
|
errx(EX_USAGE, "invalid lpc device "
|
|
"configuration '%s'", optarg);
|
|
}
|
|
break;
|
|
case 's':
|
|
if (pci_parse_slot(optarg) != 0)
|
|
exit(1);
|
|
else
|
|
break;
|
|
case 'm':
|
|
error = vm_parse_memsize(optarg, &memsize);
|
|
if (error)
|
|
errx(EX_USAGE, "invalid memsize '%s'", optarg);
|
|
break;
|
|
case 'H':
|
|
guest_vmexit_on_hlt = 1;
|
|
break;
|
|
case 'I':
|
|
/*
|
|
* The "-I" option was used to add an ioapic to the
|
|
* virtual machine.
|
|
*
|
|
* An ioapic is now provided unconditionally for each
|
|
* virtual machine and this option is now deprecated.
|
|
*/
|
|
break;
|
|
case 'P':
|
|
guest_vmexit_on_pause = 1;
|
|
break;
|
|
case 'e':
|
|
strictio = 1;
|
|
break;
|
|
case 'U':
|
|
guest_uuid_str = optarg;
|
|
break;
|
|
case 'w':
|
|
strictmsr = 0;
|
|
break;
|
|
case 'W':
|
|
virtio_msix = 0;
|
|
break;
|
|
case 'x':
|
|
x2apic_mode = 1;
|
|
break;
|
|
case 'Y':
|
|
mptgen = 0;
|
|
break;
|
|
case 'h':
|
|
usage(0);
|
|
default:
|
|
usage(1);
|
|
}
|
|
}
|
|
argc -= optind;
|
|
argv += optind;
|
|
|
|
if (argc != 1)
|
|
usage(1);
|
|
|
|
vmname = argv[0];
|
|
|
|
ctx = vm_open(vmname);
|
|
if (ctx == NULL) {
|
|
perror("vm_open");
|
|
exit(1);
|
|
}
|
|
|
|
max_vcpus = num_vcpus_allowed(ctx);
|
|
if (guest_ncpus > max_vcpus) {
|
|
fprintf(stderr, "%d vCPUs requested but only %d available\n",
|
|
guest_ncpus, max_vcpus);
|
|
exit(1);
|
|
}
|
|
|
|
fbsdrun_set_capabilities(ctx, BSP);
|
|
|
|
if (dump_guest_memory)
|
|
vm_set_memflags(ctx, VM_MEM_F_INCORE);
|
|
err = vm_setup_memory(ctx, memsize, VM_MMAP_ALL);
|
|
if (err) {
|
|
fprintf(stderr, "Unable to setup memory (%d)\n", err);
|
|
exit(1);
|
|
}
|
|
|
|
init_mem();
|
|
init_inout();
|
|
pci_irq_init(ctx);
|
|
ioapic_init(ctx);
|
|
|
|
rtc_init(ctx);
|
|
sci_init(ctx);
|
|
|
|
/*
|
|
* Exit if a device emulation finds an error in it's initilization
|
|
*/
|
|
if (init_pci(ctx) != 0)
|
|
exit(1);
|
|
|
|
if (gdb_port != 0)
|
|
init_dbgport(gdb_port);
|
|
|
|
if (bvmcons)
|
|
init_bvmcons();
|
|
|
|
error = vm_get_register(ctx, BSP, VM_REG_GUEST_RIP, &rip);
|
|
assert(error == 0);
|
|
|
|
/*
|
|
* build the guest tables, MP etc.
|
|
*/
|
|
if (mptgen) {
|
|
error = mptable_build(ctx, guest_ncpus);
|
|
if (error)
|
|
exit(1);
|
|
}
|
|
|
|
error = smbios_build(ctx);
|
|
assert(error == 0);
|
|
|
|
if (acpi) {
|
|
error = acpi_build(ctx, guest_ncpus);
|
|
assert(error == 0);
|
|
}
|
|
|
|
/*
|
|
* Change the proc title to include the VM name.
|
|
*/
|
|
setproctitle("%s", vmname);
|
|
|
|
/*
|
|
* Add CPU 0
|
|
*/
|
|
fbsdrun_addcpu(ctx, BSP, BSP, rip);
|
|
|
|
/*
|
|
* Head off to the main event dispatch loop
|
|
*/
|
|
mevent_dispatch();
|
|
|
|
exit(1);
|
|
}
|