9bac70b851
ethernet chips. This driver is pretty simple, however it contains special DSP initialization code which is needed in order to get the chip to negotiate a gigE link. (This special initialization may not be needed in subsequent chip revs.) Also: - Fix typo in if_rlreg.h (RL_GMEDIASTAT_1000MPS -> RL_GMEDIASTAT_1000MBPS) - Deal with shared interrupts in re_intr(): if interface isn't up, return. - Fix another bug in re_gmii_writereg() (properly apply data field mask) - Allow PHY driver to read the RL_GMEDIASTAT register via the re_gmii_readreg() register (this is register needed to determine real time link/media status).
143 lines
6.6 KiB
C
143 lines
6.6 KiB
C
/*
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* Copyright (c) 2003
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* Bill Paul <wpaul@windriver.com>. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Bill Paul.
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* 4. Neither the name of the author nor the names of any co-contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _DEV_MII_RGEPHYREG_H_
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#define _DEV_MII_RGEPHYREG_H_
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/*
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* RealTek 8169S/8110S gigE PHY registers
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*/
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#define RGEPHY_MII_BMCR 0x00
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#define RGEPHY_BMCR_RESET 0x8000
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#define RGEPHY_BMCR_LOOP 0x4000
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#define RGEPHY_BMCR_SPD0 0x2000 /* speed select, lower bit */
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#define RGEPHY_BMCR_AUTOEN 0x1000 /* Autoneg enabled */
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#define RGEPHY_BMCR_PDOWN 0x0800 /* Power down */
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#define RGEPHY_BMCR_ISO 0x0400 /* Isolate */
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#define RGEPHY_BMCR_STARTNEG 0x0200 /* Restart autoneg */
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#define RGEPHY_BMCR_FDX 0x0100 /* Duplex mode */
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#define RGEPHY_BMCR_CTEST 0x0080 /* Collision test enable */
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#define RGEPHY_BMCR_SPD1 0x0040 /* Speed select, upper bit */
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#define RGEPHY_S1000 RGEPHY_BMCR_SPD1 /* 1000mbps */
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#define RGEPHY_S100 RGEPHY_BMCR_SPD0 /* 100mpbs */
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#define RGEPHY_S10 0 /* 10mbps */
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#define RGEPHY_MII_BMSR 0x01
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#define RGEPHY_BMSR_100T4 0x8000 /* 100 base T4 capable */
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#define RGEPHY_BMSR_100TXFDX 0x4000 /* 100 base Tx full duplex capable */
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#define RGEPHY_BMSR_100TXHDX 0x2000 /* 100 base Tx half duplex capable */
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#define RGEPHY_BMSR_10TFDX 0x1000 /* 10 base T full duplex capable */
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#define RGEPHY_BMSR_10THDX 0x0800 /* 10 base T half duplex capable */
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#define RGEPHY_BMSR_100T2FDX 0x0400 /* 100 base T2 full duplex capable */
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#define RGEPHY_BMSR_100T2HDX 0x0200 /* 100 base T2 half duplex capable */
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#define RGEPHY_BMSR_EXTSTS 0x0100 /* Extended status present */
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#define RGEPHY_BMSR_PRESUB 0x0040 /* Preamble surpression */
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#define RGEPHY_BMSR_ACOMP 0x0020 /* Autoneg complete */
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#define RGEPHY_BMSR_RFAULT 0x0010 /* Remote fault condition occured */
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#define RGEPHY_BMSR_ANEG 0x0008 /* Autoneg capable */
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#define RGEPHY_BMSR_LINK 0x0004 /* Link status */
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#define RGEPHY_BMSR_JABBER 0x0002 /* Jabber detected */
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#define RGEPHY_BMSR_EXT 0x0001 /* Extended capability */
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#define RGEPHY_MII_ANAR 0x04
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#define RGEPHY_ANAR_NP 0x8000 /* Next page */
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#define RGEPHY_ANAR_RF 0x2000 /* Remote fault */
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#define RGEPHY_ANAR_ASP 0x0800 /* Asymmetric Pause */
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#define RGEPHY_ANAR_PC 0x0400 /* Pause capable */
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#define RGEPHY_ANAR_T4 0x0200 /* local device supports 100bT4 */
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#define RGEPHY_ANAR_TX_FD 0x0100 /* local device supports 100bTx FD */
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#define RGEPHY_ANAR_TX 0x0080 /* local device supports 100bTx */
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#define RGEPHY_ANAR_10_FD 0x0040 /* local device supports 10bT FD */
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#define RGEPHY_ANAR_10 0x0020 /* local device supports 10bT */
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#define RGEPHY_ANAR_SEL 0x001F /* selector field, 00001=Ethernet */
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#define RGEPHY_MII_ANLPAR 0x05
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#define RGEPHY_ANLPAR_NP 0x8000 /* Next page */
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#define RGEPHY_ANLPAR_RF 0x2000 /* Remote fault */
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#define RGEPHY_ANLPAR_ASP 0x0800 /* Asymmetric Pause */
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#define RGEPHY_ANLPAR_PC 0x0400 /* Pause capable */
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#define RGEPHY_ANLPAR_T4 0x0200 /* link partner supports 100bT4 */
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#define RGEPHY_ANLPAR_TX_FD 0x0100 /* link partner supports 100bTx FD */
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#define RGEPHY_ANLPAR_TX 0x0080 /* link partner supports 100bTx */
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#define RGEPHY_ANLPAR_10_FD 0x0040 /* link partner supports 10bT FD */
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#define RGEPHY_ANLPAR_10 0x0020 /* link partner supports 10bT */
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#define RGEPHY_ANLPAR_SEL 0x001F /* selector field, 00001=Ethernet */
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#define RGEPHY_SEL_TYPE 0x0001 /* ethernet */
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#define RGEPHY_MII_ANER 0x06
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#define RGEPHY_ANER_PDF 0x0010 /* Parallel detection fault */
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#define RGEPHY_ANER_LPNP 0x0008 /* Link partner can next page */
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#define RGEPHY_ANER_NP 0x0004 /* Local PHY can next page */
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#define RGEPHY_ANER_RX 0x0002 /* Next page received */
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#define RGEPHY_ANER_LPAN 0x0001 /* Link partner autoneg capable */
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#define RGEPHY_MII_NEXTP 0x07 /* Next page */
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#define RGEPHY_MII_NEXTP_LP 0x08 /* Next page of link partner */
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#define RGEPHY_MII_1000CTL 0x09 /* 1000baseT control */
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#define RGEPHY_1000CTL_TST 0xE000 /* test modes */
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#define RGEPHY_1000CTL_MSE 0x1000 /* Master/Slave manual enable */
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#define RGEPHY_1000CTL_MSC 0x0800 /* Master/Slave select */
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#define RGEPHY_1000CTL_RD 0x0400 /* Repeater/DTE */
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#define RGEPHY_1000CTL_AFD 0x0200 /* Advertise full duplex */
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#define RGEPHY_1000CTL_AHD 0x0100 /* Advertise half duplex */
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#define RGEPHY_TEST_TX_JITTER 0x2000
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#define RGEPHY_TEST_TX_JITTER_MASTER_MODE 0x4000
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#define RGEPHY_TEST_TX_JITTER_SLAVE_MODE 0x6000
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#define RGEPHY_TEST_TX_DISTORTION 0x8000
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#define RGEPHY_MII_1000STS 0x0A /* 1000baseT status */
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#define RGEPHY_1000STS_MSF 0x8000 /* Master/slave fault */
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#define RGEPHY_1000STS_MSR 0x4000 /* Master/slave result */
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#define RGEPHY_1000STS_LRS 0x2000 /* Local receiver status */
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#define RGEPHY_1000STS_RRS 0x1000 /* Remote receiver status */
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#define RGEPHY_1000STS_LPFD 0x0800 /* Link partner can FD */
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#define RGEPHY_1000STS_LPHD 0x0400 /* Link partner can HD */
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#define RGEPHY_1000STS_IEC 0x00FF /* Idle error count */
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#define RGEPHY_MII_EXTSTS 0x0F /* Extended status */
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#define RGEPHY_EXTSTS_X_FD_CAP 0x8000 /* 1000base-X FD capable */
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#define RGEPHY_EXTSTS_X_HD_CAP 0x4000 /* 1000base-X HD capable */
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#define RGEPHY_EXTSTS_T_FD_CAP 0x2000 /* 1000base-T FD capable */
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#define RGEPHY_EXTSTS_T_HD_CAP 0x1000 /* 1000base-T HD capable */
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#endif /* _DEV_RGEPHY_MIIREG_H_ */
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