b7a73ced2f
for card change interrupts is different than the pci stuff that's coming soon. Set the management irq in different ways. If pci_parallel interrutp routing, then use the PCI way of getting interrupts. Move polling mode into pcic_isa since when we're routing via pci polling doesn't work because many bridges (systems hang solid). If we're routing interrupts via pci, they can be shared, so flag them as such. Note, this doesn't actually change anything since the pci attachment isn't quite ready to be committed.
814 lines
20 KiB
C
814 lines
20 KiB
C
/*
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* Intel PCIC or compatible Controller driver
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*-------------------------------------------------------------------------
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*
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* Copyright (c) 2001 M. Warner Losh. All rights reserved.
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* Copyright (c) 1995 Andrew McRae. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <pccard/i82365.h>
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#include <pccard/pcic_pci.h>
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#include <pccard/cardinfo.h>
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#include <pccard/slot.h>
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#include <pccard/pcicvar.h>
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/* Get pnp IDs */
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#include <isa/isavar.h>
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#include <dev/pcic/i82365reg.h>
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#include <dev/pccard/pccardvar.h>
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#include "card_if.h"
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/*
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* Prototypes for interrupt handler.
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*/
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static int pcic_ioctl(struct slot *, int, caddr_t);
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static int pcic_power(struct slot *);
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static void pcic_mapirq(struct slot *, int);
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static timeout_t pcic_reset;
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static void pcic_resume(struct slot *);
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static void pcic_disable(struct slot *);
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static int pcic_memory(struct slot *, int);
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static int pcic_io(struct slot *, int);
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devclass_t pcic_devclass;
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static struct slot_ctrl pcic_cinfo = {
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pcic_mapirq,
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pcic_memory,
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pcic_io,
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pcic_reset,
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pcic_disable,
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pcic_power,
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pcic_ioctl,
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pcic_resume,
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PCIC_MEM_WIN,
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PCIC_IO_WIN
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};
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/*
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* Read a register from the PCIC.
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*/
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unsigned char
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pcic_getb_io(struct pcic_slot *sp, int reg)
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{
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bus_space_write_1(sp->bst, sp->bsh, PCIC_INDEX, sp->offset + reg);
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return (bus_space_read_1(sp->bst, sp->bsh, PCIC_DATA));
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}
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/*
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* Write a register on the PCIC
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*/
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void
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pcic_putb_io(struct pcic_slot *sp, int reg, unsigned char val)
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{
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/*
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* Many datasheets recommend using outw rather than outb to save
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* a microsecond. Maybe we should do this, but we'd likely only
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* save 20-30us on card activation.
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*/
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bus_space_write_1(sp->bst, sp->bsh, PCIC_INDEX, sp->offset + reg);
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bus_space_write_1(sp->bst, sp->bsh, PCIC_DATA, val);
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}
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/*
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* Clear bit(s) of a register.
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*/
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__inline void
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pcic_clrb(struct pcic_slot *sp, int reg, unsigned char mask)
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{
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sp->putb(sp, reg, sp->getb(sp, reg) & ~mask);
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}
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/*
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* Set bit(s) of a register
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*/
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__inline void
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pcic_setb(struct pcic_slot *sp, int reg, unsigned char mask)
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{
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sp->putb(sp, reg, sp->getb(sp, reg) | mask);
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}
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/*
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* Write a 16 bit value to 2 adjacent PCIC registers
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*/
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static __inline void
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pcic_putw(struct pcic_slot *sp, int reg, unsigned short word)
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{
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sp->putb(sp, reg, word & 0xFF);
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sp->putb(sp, reg + 1, (word >> 8) & 0xff);
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}
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/*
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* Free up resources allocated so far.
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*/
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void
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pcic_dealloc(device_t dev)
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{
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struct pcic_softc *sc;
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sc = (struct pcic_softc *) device_get_softc(dev);
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if (sc->slot_poll)
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untimeout(sc->slot_poll, sc, sc->timeout_ch);
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if (sc->iores)
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bus_release_resource(dev, SYS_RES_IOPORT, sc->iorid,
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sc->iores);
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if (sc->memres)
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bus_release_resource(dev, SYS_RES_MEMORY, sc->memrid,
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sc->memres);
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if (sc->ih)
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bus_teardown_intr(dev, sc->irqres, sc->ih);
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if (sc->irqres)
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bus_release_resource(dev, SYS_RES_IRQ, sc->irqrid, sc->irqres);
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}
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/*
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* entry point from main code to map/unmap memory context.
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*/
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static int
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pcic_memory(struct slot *slt, int win)
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{
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struct pcic_slot *sp = slt->cdata;
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struct mem_desc *mp = &slt->mem[win];
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int reg = win * PCIC_MEMSIZE + PCIC_MEMBASE;
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if (win < 0 || win >= slt->ctrl->maxmem) {
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printf("Illegal PCIC MEMORY window request %d\n", win);
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return (ENXIO);
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}
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if (mp->flags & MDF_ACTIVE) {
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unsigned long sys_addr = (uintptr_t)(void *)mp->start >> 12;
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/*
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* Write the addresses, card offsets and length.
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* The values are all stored as the upper 12 bits of the
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* 24 bit address i.e everything is allocated as 4 Kb chunks.
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*/
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pcic_putw(sp, reg, sys_addr & 0xFFF);
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pcic_putw(sp, reg+2, (sys_addr + (mp->size >> 12) - 1) & 0xFFF);
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pcic_putw(sp, reg+4, ((mp->card >> 12) - sys_addr) & 0x3FFF);
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/*
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* Each 16 bit register has some flags in the upper bits.
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*/
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if (mp->flags & MDF_16BITS)
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pcic_setb(sp, reg+1, PCIC_DATA16);
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if (mp->flags & MDF_ZEROWS)
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pcic_setb(sp, reg+1, PCIC_ZEROWS);
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if (mp->flags & MDF_WS0)
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pcic_setb(sp, reg+3, PCIC_MW0);
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if (mp->flags & MDF_WS1)
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pcic_setb(sp, reg+3, PCIC_MW1);
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if (mp->flags & MDF_ATTR)
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pcic_setb(sp, reg+5, PCIC_REG);
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if (mp->flags & MDF_WP)
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pcic_setb(sp, reg+5, PCIC_WP);
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/*
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* Enable the memory window. By experiment, we need a delay.
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*/
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pcic_setb(sp, PCIC_ADDRWINE, (1<<win) | PCIC_MEMCS16);
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DELAY(50);
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} else {
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pcic_clrb(sp, PCIC_ADDRWINE, 1<<win);
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pcic_putw(sp, reg, 0);
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pcic_putw(sp, reg+2, 0);
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pcic_putw(sp, reg+4, 0);
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}
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return (0);
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}
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/*
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* pcic_io - map or unmap I/O context
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*/
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static int
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pcic_io(struct slot *slt, int win)
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{
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int mask, reg;
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struct pcic_slot *sp = slt->cdata;
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struct io_desc *ip = &slt->io[win];
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if (bootverbose) {
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printf("pcic: I/O win %d flags %x %x-%x\n", win, ip->flags,
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ip->start, ip->start+ip->size-1);
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}
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switch (win) {
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case 0:
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mask = PCIC_IO0_EN;
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reg = PCIC_IO0;
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break;
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case 1:
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mask = PCIC_IO1_EN;
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reg = PCIC_IO1;
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break;
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default:
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printf("Illegal PCIC I/O window request %d\n", win);
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return (ENXIO);
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}
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if (ip->flags & IODF_ACTIVE) {
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unsigned char x, ioctlv;
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pcic_putw(sp, reg, ip->start);
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pcic_putw(sp, reg+2, ip->start+ip->size-1);
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x = 0;
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if (ip->flags & IODF_ZEROWS)
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x |= PCIC_IO_0WS;
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if (ip->flags & IODF_WS)
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x |= PCIC_IO_WS;
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if (ip->flags & IODF_CS16)
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x |= PCIC_IO_CS16;
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if (ip->flags & IODF_16BIT)
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x |= PCIC_IO_16BIT;
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/*
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* Extract the current flags and merge with new flags.
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* Flags for window 0 in lower nybble, and in upper nybble
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* for window 1.
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*/
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ioctlv = sp->getb(sp, PCIC_IOCTL);
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DELAY(100);
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switch (win) {
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case 0:
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sp->putb(sp, PCIC_IOCTL, x | (ioctlv & 0xf0));
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break;
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case 1:
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sp->putb(sp, PCIC_IOCTL, (x << 4) | (ioctlv & 0xf));
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break;
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}
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DELAY(100);
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pcic_setb(sp, PCIC_ADDRWINE, mask);
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DELAY(100);
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} else {
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pcic_clrb(sp, PCIC_ADDRWINE, mask);
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DELAY(100);
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pcic_putw(sp, reg, 0);
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pcic_putw(sp, reg + 2, 0);
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}
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return (0);
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}
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static void
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pcic_do_mgt_irq(struct pcic_slot *sp, int irq)
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{
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u_int32_t reg;
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if (sp->sc->csc_route == pci_parallel) {
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reg = CB_SM_CD;
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bus_space_write_4(sp->bst, sp->bsh, CB_SOCKET_MASK, reg);
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} else {
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/* Management IRQ changes */
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pcic_clrb(sp, PCIC_INT_GEN, PCIC_INTR_ENA);
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sp->putb(sp, PCIC_STAT_INT, (irq << 4) | 0x8);
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}
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}
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int
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pcic_attach(device_t dev)
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{
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int i;
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device_t kid;
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struct pcic_softc *sc;
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struct slot *slt;
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struct pcic_slot *sp;
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int stat;
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sc = (struct pcic_softc *) device_get_softc(dev);
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callout_handle_init(&sc->timeout_ch);
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sp = &sc->slots[0];
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for (i = 0; i < PCIC_CARD_SLOTS; i++, sp++) {
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if (!sp->slt)
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continue;
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sp->slt = 0;
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kid = device_add_child(dev, NULL, -1);
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if (kid == NULL) {
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device_printf(dev, "Can't add pccard bus slot %d", i);
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return (ENXIO);
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}
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device_probe_and_attach(kid);
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slt = pccard_init_slot(kid, &pcic_cinfo);
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if (slt == 0) {
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device_printf(dev, "Can't get pccard info slot %d", i);
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return (ENXIO);
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}
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sc->slotmask |= (1 << i);
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slt->cdata = sp;
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sp->slt = slt;
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sp->sc = sc;
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}
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sp = &sc->slots[0];
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for (i = 0; i < PCIC_CARD_SLOTS; i++, sp++) {
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if (sp->slt == NULL)
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continue;
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pcic_do_mgt_irq(sp, sc->irq);
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sp->slt->irq = sc->irq;
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/* Check for changes */
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pcic_setb(sp, PCIC_POWER, PCIC_PCPWRE | PCIC_DISRST);
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stat = sp->getb(sp, PCIC_STATUS);
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if (bootverbose)
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printf("stat is %x\n", stat);
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if ((stat & PCIC_CD) != PCIC_CD) {
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sp->slt->laststate = sp->slt->state = empty;
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} else {
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sp->slt->laststate = sp->slt->state = filled;
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pccard_event(sp->slt, card_inserted);
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}
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}
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return (bus_generic_attach(dev));
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}
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/*
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* ioctl calls - Controller specific ioctls
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*/
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static int
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pcic_ioctl(struct slot *slt, int cmd, caddr_t data)
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{
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struct pcic_slot *sp = slt->cdata;
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switch(cmd) {
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default:
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return (ENOTTY);
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/*
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* Get/set PCIC registers
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*/
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case PIOCGREG:
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((struct pcic_reg *)data)->value =
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sp->getb(sp, ((struct pcic_reg *)data)->reg);
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break;
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case PIOCSREG:
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sp->putb(sp, ((struct pcic_reg *)data)->reg,
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((struct pcic_reg *)data)->value);
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break;
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}
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return (0);
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}
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/*
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* pcic_power - Enable the power of the slot according to
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* the parameters in the power structure(s).
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*/
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static int
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pcic_power(struct slot *slt)
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{
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unsigned char c;
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unsigned char reg = PCIC_DISRST | PCIC_PCPWRE;
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struct pcic_slot *sp = slt->cdata;
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struct pcic_softc *sc = sp->sc;
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if (sc->flags & (PCIC_DF_POWER | PCIC_AB_POWER)) {
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/*
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* Look at the VS[12]# bits on the card. If VS1 is clear
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* then we should apply 3.3 volts.
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*/
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c = sp->getb(sp, PCIC_CDGC);
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if ((c & PCIC_VS1STAT) == 0)
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slt->pwr.vcc = 33;
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}
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/*
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* XXX Note: The Vpp controls varies quit a bit between bridge chips
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* and the following might not be right in all cases. The Linux
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* code and wildboar code bases are more complex. However, most
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* applications want vpp == vcc and the following code does appear
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* to do that for all bridge sets.
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*/
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switch(slt->pwr.vpp) {
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default:
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return (EINVAL);
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case 0:
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break;
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case 50:
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case 33:
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reg |= PCIC_VPP_5V;
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break;
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case 120:
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reg |= PCIC_VPP_12V;
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break;
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}
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if (slt->pwr.vcc)
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reg |= PCIC_VCC_ON; /* Turn on Vcc */
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switch(slt->pwr.vcc) {
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default:
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return (EINVAL);
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case 0:
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break;
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case 33:
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/*
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* The wildboar code has comments that state that
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* the IBM KING controller doesn't support 3.3V
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* on the "IBM Smart PC card drive". The code
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* intemates that's the only place they have seen
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* it used and that there's a boatload of issues
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* with it. I'm not even sure this is right because
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* the only docs I've been able to find say this is for
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* 5V power. Of course, this "doc" is just code comments
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* so who knows for sure.
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*/
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if (sc->flags & PCIC_KING_POWER) {
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reg |= PCIC_VCC_5V_KING;
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break;
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}
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if (sc->flags & PCIC_VG_POWER) {
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pcic_setb(sp, PCIC_CVSR, PCIC_CVSR_VS);
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break;
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}
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if (sc->flags & PCIC_PD_POWER) {
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pcic_setb(sp, PCIC_MISC1, PCIC_MISC1_VCC_33);
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break;
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}
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if (sc->flags & PCIC_RICOH_POWER) {
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pcic_setb(sp, PCIC_RICOH_MCR2, PCIC_MCR2_VCC_33);
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break;
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}
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/*
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* Technically, The A, B, C stepping didn't support
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* the 3.3V cards. However, many cardbus bridges are
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* identified as B step cards by our probe routine, so
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* we do both. It won't hurt the A, B, C bridges that
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* don't support this bit since it is one of the
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* reserved bits.
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*/
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if (sc->flags & (PCIC_AB_POWER | PCIC_DF_POWER))
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reg |= PCIC_VCC_3V;
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break;
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case 50:
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if (sc->flags & PCIC_KING_POWER)
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reg |= PCIC_VCC_5V_KING;
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/*
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* For either of the two variant power schemes for 3.3V
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* go ahead and turn off the 3.3V magic. For all
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* bridges, the setting the Vcc on bit does the rest.
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*/
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if (sc->flags & PCIC_VG_POWER)
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pcic_clrb(sp, PCIC_CVSR, PCIC_CVSR_VS);
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else if (sc->flags & PCIC_PD_POWER)
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pcic_clrb(sp, PCIC_MISC1, PCIC_MISC1_VCC_33);
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else if (sc->flags & PCIC_RICOH_POWER)
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pcic_clrb(sp, PCIC_RICOH_MCR2, PCIC_MCR2_VCC_33);
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break;
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}
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sp->putb(sp, PCIC_POWER, reg);
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DELAY(300*1000);
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if (slt->pwr.vcc) {
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reg |= PCIC_OUTENA;
|
|
sp->putb(sp, PCIC_POWER, reg);
|
|
DELAY(100*1000);
|
|
}
|
|
|
|
/*
|
|
* Some chips are smarter than us it seems, so if we weren't
|
|
* allowed to use 5V, try 3.3 instead
|
|
*/
|
|
if (!(sp->getb(sp, PCIC_STATUS) & PCIC_POW) && slt->pwr.vcc == 50) {
|
|
slt->pwr.vcc = 33;
|
|
slt->pwr.vpp = 0;
|
|
return (pcic_power(slt));
|
|
}
|
|
return (0);
|
|
}
|
|
|
|
/*
|
|
* tell the PCIC which irq we want to use. only the following are legal:
|
|
* 3, 4, 5, 7, 9, 10, 11, 12, 14, 15. We require the callers of this
|
|
* routine to do the check for legality.
|
|
*/
|
|
static void
|
|
pcic_mapirq(struct slot *slt, int irq)
|
|
{
|
|
struct pcic_slot *sp = slt->cdata;
|
|
if (sp->sc->csc_route == pci_parallel)
|
|
return;
|
|
if (irq == 0)
|
|
pcic_clrb(sp, PCIC_INT_GEN, 0xF);
|
|
else
|
|
sp->putb(sp, PCIC_INT_GEN,
|
|
(sp->getb(sp, PCIC_INT_GEN) & 0xF0) | irq);
|
|
}
|
|
|
|
/*
|
|
* pcic_reset - Reset the card and enable initial power.
|
|
*/
|
|
static void
|
|
pcic_reset(void *chan)
|
|
{
|
|
struct slot *slt = chan;
|
|
struct pcic_slot *sp = slt->cdata;
|
|
|
|
switch (slt->insert_seq) {
|
|
case 0: /* Something funny happended on the way to the pub... */
|
|
return;
|
|
case 1: /* Assert reset */
|
|
pcic_clrb(sp, PCIC_INT_GEN, PCIC_CARDRESET);
|
|
slt->insert_seq = 2;
|
|
timeout(pcic_reset, (void *)slt, hz/4);
|
|
return;
|
|
case 2: /* Deassert it again */
|
|
pcic_setb(sp, PCIC_INT_GEN, PCIC_CARDRESET|PCIC_IOCARD);
|
|
slt->insert_seq = 3;
|
|
timeout(pcic_reset, (void *)slt, hz/4);
|
|
return;
|
|
case 3: /* Wait if card needs more time */
|
|
if (!sp->getb(sp, PCIC_STATUS) & PCIC_READY) {
|
|
timeout(pcic_reset, (void *)slt, hz/10);
|
|
return;
|
|
}
|
|
}
|
|
slt->insert_seq = 0;
|
|
if (sp->controller == PCIC_PD672X || sp->controller == PCIC_PD6710) {
|
|
sp->putb(sp, PCIC_TIME_SETUP0, 0x1);
|
|
sp->putb(sp, PCIC_TIME_CMD0, 0x6);
|
|
sp->putb(sp, PCIC_TIME_RECOV0, 0x0);
|
|
sp->putb(sp, PCIC_TIME_SETUP1, 1);
|
|
sp->putb(sp, PCIC_TIME_CMD1, 0xf);
|
|
sp->putb(sp, PCIC_TIME_RECOV1, 0);
|
|
}
|
|
selwakeup(&slt->selp);
|
|
}
|
|
|
|
/*
|
|
* pcic_disable - Disable the slot.
|
|
*/
|
|
static void
|
|
pcic_disable(struct slot *slt)
|
|
{
|
|
struct pcic_slot *sp = slt->cdata;
|
|
|
|
sp->putb(sp, PCIC_INT_GEN, 0);
|
|
sp->putb(sp, PCIC_POWER, 0);
|
|
}
|
|
|
|
/*
|
|
* pcic_resume - Suspend/resume support for PCIC
|
|
*/
|
|
static void
|
|
pcic_resume(struct slot *slt)
|
|
{
|
|
struct pcic_slot *sp = slt->cdata;
|
|
|
|
pcic_do_mgt_irq(sp, slt->irq);
|
|
if (sp->controller == PCIC_PD672X) {
|
|
pcic_setb(sp, PCIC_MISC1, PCIC_MISC1_SPEAKER);
|
|
pcic_setb(sp, PCIC_MISC2, PCIC_LPDM_EN);
|
|
}
|
|
}
|
|
|
|
int
|
|
pcic_activate_resource(device_t dev, device_t child, int type, int rid,
|
|
struct resource *r)
|
|
{
|
|
struct pccard_devinfo *devi = device_get_ivars(child);
|
|
int err;
|
|
|
|
if (dev != device_get_parent(device_get_parent(child)) || devi == NULL)
|
|
return (bus_generic_activate_resource(dev, child, type,
|
|
rid, r));
|
|
|
|
switch (type) {
|
|
case SYS_RES_IOPORT: {
|
|
struct io_desc *ip;
|
|
ip = &devi->slt->io[rid];
|
|
if (ip->flags == 0) {
|
|
if (rid == 0)
|
|
ip->flags = IODF_WS | IODF_16BIT | IODF_CS16;
|
|
else
|
|
ip->flags = devi->slt->io[0].flags;
|
|
}
|
|
ip->flags |= IODF_ACTIVE;
|
|
ip->start = rman_get_start(r);
|
|
ip->size = rman_get_end(r) - rman_get_start(r) + 1;
|
|
err = pcic_io(devi->slt, rid);
|
|
if (err)
|
|
return (err);
|
|
break;
|
|
}
|
|
case SYS_RES_IRQ:
|
|
/*
|
|
* We actually defer the activation of the IRQ resource
|
|
* until the interrupt is registered to avoid stray
|
|
* interrupt messages.
|
|
*/
|
|
break;
|
|
case SYS_RES_MEMORY: {
|
|
struct mem_desc *mp;
|
|
if (rid >= NUM_MEM_WINDOWS)
|
|
return (EINVAL);
|
|
mp = &devi->slt->mem[rid];
|
|
mp->flags |= MDF_ACTIVE;
|
|
mp->start = (caddr_t) rman_get_start(r);
|
|
mp->size = rman_get_end(r) - rman_get_start(r) + 1;
|
|
err = pcic_memory(devi->slt, rid);
|
|
if (err)
|
|
return (err);
|
|
break;
|
|
}
|
|
default:
|
|
break;
|
|
}
|
|
err = bus_generic_activate_resource(dev, child, type, rid, r);
|
|
return (err);
|
|
}
|
|
|
|
int
|
|
pcic_deactivate_resource(device_t dev, device_t child, int type, int rid,
|
|
struct resource *r)
|
|
{
|
|
struct pccard_devinfo *devi = device_get_ivars(child);
|
|
int err;
|
|
|
|
if (dev != device_get_parent(device_get_parent(child)) || devi == NULL)
|
|
return (bus_generic_deactivate_resource(dev, child, type,
|
|
rid, r));
|
|
|
|
switch (type) {
|
|
case SYS_RES_IOPORT: {
|
|
struct io_desc *ip = &devi->slt->io[rid];
|
|
ip->flags &= ~IODF_ACTIVE;
|
|
err = pcic_io(devi->slt, rid);
|
|
if (err)
|
|
return (err);
|
|
break;
|
|
}
|
|
case SYS_RES_IRQ:
|
|
break;
|
|
case SYS_RES_MEMORY: {
|
|
struct mem_desc *mp = &devi->slt->mem[rid];
|
|
mp->flags &= ~(MDF_ACTIVE | MDF_ATTR);
|
|
err = pcic_memory(devi->slt, rid);
|
|
if (err)
|
|
return (err);
|
|
break;
|
|
}
|
|
default:
|
|
break;
|
|
}
|
|
err = bus_generic_deactivate_resource(dev, child, type, rid, r);
|
|
return (err);
|
|
}
|
|
|
|
int
|
|
pcic_setup_intr(device_t dev, device_t child, struct resource *irq,
|
|
int flags, driver_intr_t *intr, void *arg, void **cookiep)
|
|
{
|
|
struct pccard_devinfo *devi = device_get_ivars(child);
|
|
int err;
|
|
|
|
if (((1 << rman_get_start(irq)) & PCIC_INT_MASK_ALLOWED) == 0) {
|
|
device_printf(dev, "Hardware does not support irq %ld.\n",
|
|
rman_get_start(irq));
|
|
return (EINVAL);
|
|
}
|
|
|
|
err = bus_generic_setup_intr(dev, child, irq, flags, intr, arg,
|
|
cookiep);
|
|
if (err == 0)
|
|
pcic_mapirq(devi->slt, rman_get_start(irq));
|
|
else
|
|
device_printf(dev, "Error %d irq %ld\n", err,
|
|
rman_get_start(irq));
|
|
return (err);
|
|
}
|
|
|
|
int
|
|
pcic_teardown_intr(device_t dev, device_t child, struct resource *irq,
|
|
void *cookie)
|
|
{
|
|
struct pccard_devinfo *devi = device_get_ivars(child);
|
|
|
|
pcic_mapirq(devi->slt, 0);
|
|
return (bus_generic_teardown_intr(dev, child, irq, cookie));
|
|
}
|
|
|
|
int
|
|
pcic_set_res_flags(device_t bus, device_t child, int restype, int rid,
|
|
u_long value)
|
|
{
|
|
struct pccard_devinfo *devi = device_get_ivars(child);
|
|
int err = 0;
|
|
|
|
switch (restype) {
|
|
case SYS_RES_MEMORY: {
|
|
struct mem_desc *mp = &devi->slt->mem[rid];
|
|
switch (value) {
|
|
case PCCARD_A_MEM_COM:
|
|
mp->flags &= ~MDF_ATTR;
|
|
break;
|
|
case PCCARD_A_MEM_ATTR:
|
|
mp->flags |= MDF_ATTR;
|
|
break;
|
|
case PCCARD_A_MEM_8BIT:
|
|
mp->flags &= ~MDF_16BITS;
|
|
break;
|
|
case PCCARD_A_MEM_16BIT:
|
|
mp->flags |= MDF_16BITS;
|
|
break;
|
|
}
|
|
err = pcic_memory(devi->slt, rid);
|
|
break;
|
|
}
|
|
default:
|
|
err = EOPNOTSUPP;
|
|
}
|
|
return (err);
|
|
}
|
|
|
|
int
|
|
pcic_get_res_flags(device_t bus, device_t child, int restype, int rid,
|
|
u_long *value)
|
|
{
|
|
struct pccard_devinfo *devi = device_get_ivars(child);
|
|
int err = 0;
|
|
|
|
if (value == 0)
|
|
return (ENOMEM);
|
|
|
|
switch (restype) {
|
|
case SYS_RES_IOPORT: {
|
|
struct io_desc *ip = &devi->slt->io[rid];
|
|
*value = ip->flags;
|
|
break;
|
|
}
|
|
case SYS_RES_MEMORY: {
|
|
struct mem_desc *mp = &devi->slt->mem[rid];
|
|
*value = mp->flags;
|
|
break;
|
|
}
|
|
default:
|
|
err = EOPNOTSUPP;
|
|
}
|
|
return (err);
|
|
}
|
|
|
|
int
|
|
pcic_set_memory_offset(device_t bus, device_t child, int rid, u_int32_t offset,
|
|
u_int32_t *deltap)
|
|
{
|
|
struct pccard_devinfo *devi = device_get_ivars(child);
|
|
struct mem_desc *mp = &devi->slt->mem[rid];
|
|
|
|
mp->card = offset;
|
|
if (deltap)
|
|
*deltap = 0; /* XXX BAD XXX */
|
|
return (pcic_memory(devi->slt, rid));
|
|
}
|
|
|
|
int
|
|
pcic_get_memory_offset(device_t bus, device_t child, int rid, u_int32_t *offset)
|
|
{
|
|
struct pccard_devinfo *devi = device_get_ivars(child);
|
|
struct mem_desc *mp = &devi->slt->mem[rid];
|
|
|
|
if (offset == 0)
|
|
return (ENOMEM);
|
|
|
|
*offset = mp->card;
|
|
|
|
return (0);
|
|
}
|
|
|
|
struct resource *
|
|
pcic_alloc_resource(device_t dev, device_t child, int type, int *rid,
|
|
u_long start, u_long end, u_long count, u_int flags)
|
|
{
|
|
struct pcic_softc *sc = device_get_softc(dev);
|
|
|
|
/*
|
|
* If we're routing via pci, we can share.
|
|
*/
|
|
if (sc->func_route == pci_parallel && type == SYS_RES_IRQ)
|
|
flags |= RF_SHAREABLE;
|
|
|
|
return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
|
|
count, flags));
|
|
}
|