1a63d7e08e
- better 8250 emulation; - fake vertical retrace bit in Input Status #1 register (this was lost in the VGA emu rewrite). Submitted by: Igor Serikov <bt@turtle.pangeatech.com>
740 lines
21 KiB
C
740 lines
21 KiB
C
/*
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* Copyright (c) 2001 The FreeBSD Project, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY The FreeBSD Project, Inc. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL The FreeBSD Project, Inc. OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/types.h>
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#include <sys/mman.h>
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#include <err.h>
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#include <paths.h>
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#include <unistd.h>
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#include "doscmd.h"
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#include "AsyncIO.h"
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#include "tty.h"
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#include "video.h"
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#include "vparams.h"
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/*
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* Global variables
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*/
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/* VGA registers */
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u_int8_t VGA_CRTC[CRTC_Size];
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u_int8_t VGA_ATC[ATC_Size];
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u_int8_t VGA_TSC[TSC_Size];
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u_int8_t VGA_GDC[GDC_Size];
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/* VGA status information */
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u_int8_t vga_status[64];
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/* Table of supported video modes. */
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vmode_t vmodelist[] = {
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{0x00, 0x17, TEXT, 16, 8, 2, 0xb8000, FONT8x16},
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{0x01, 0x17, TEXT, 16, 8, 2, 0xb8000, FONT8x16},
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{0x02, 0x18, TEXT, 16, 8, 2, 0xb8000, FONT8x16},
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{0x03, 0x18, TEXT, 16, 8, 2, 0xb8000, FONT8x16},
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{0x04, 0x04, GRAPHICS, 4, 1, 0, 0xb8000, FONT8x8},
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{0x05, 0x05, GRAPHICS, 4, 1, 0, 0xb8000, FONT8x8},
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{0x06, 0x06, GRAPHICS, 2, 1, 0, 0xb8000, FONT8x8},
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{0x07, 0x19, TEXT, 1, 8, 2, 0xb0000, FONT8x16},
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{0x08, 0x08, NOMODE, 0, 0, 0, 0, 0},
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{0x09, 0x09, NOMODE, 0, 0, 0, 0, 0},
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{0x0a, 0x0a, NOMODE, 0, 0, 0, 0, 0},
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{0x0b, 0x0b, NOMODE, 0, 0, 0, 0, 0},
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{0x0c, 0x0c, NOMODE, 0, 0, 0, 0, 0},
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{0x0d, 0x0d, GRAPHICS, 16, 8, 0, 0xa0000, FONT8x8},
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{0x0e, 0x0e, GRAPHICS, 16, 4, 0, 0xa0000, FONT8x8},
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{0x0f, 0x11, GRAPHICS, 1, 2, 1, 0xa0000, FONT8x14},
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{0x10, 0x12, GRAPHICS, 16, 2, 1, 0xa0000, FONT8x14},
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{0x11, 0x1a, GRAPHICS, 2, 1, 3, 0xa0000, FONT8x16},
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{0x12, 0x1b, GRAPHICS, 16, 1, 3, 0xa0000, FONT8x16},
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/* {0x13, 0x1c, GRAPHICS, 256, 1, 0, 0xa0000, FONT8x8}, */
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};
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#define NUMMODES (sizeof(vmodelist) / sizeof(vmode_t))
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/*
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* Local functions
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*/
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static void init_vga(void);
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static u_int8_t video_inb(int);
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static void video_outb(int, u_int8_t);
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/*
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* Local types and variables
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*/
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/* Save Table and assorted variables */
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struct VideoSaveTable {
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u_short video_parameter_table[2];
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u_short parameter_dynamic_save_area[2]; /* Not used */
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u_short alphanumeric_character_set_override[2]; /* Not used */
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u_short graphics_character_set_override[2]; /* Not used */
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u_short secondary_save_table[2]; /* Not used */
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u_short mbz[4];
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};
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struct SecondaryVideoSaveTable {
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u_short length;
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u_short display_combination_code_table[2];
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u_short alphanumeric_character_set_override[2]; /* Not used */
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u_short user_palette_profile_table[2]; /* Not used */
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u_short mbz[6];
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};
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struct VideoSaveTable *vsp;
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struct SecondaryVideoSaveTable *svsp;
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/*
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* Read and write the VGA port
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*/
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/* Save the selected index register */
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static u_int8_t crtc_index, atc_index, tsc_index, gdc_index;
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/* Toggle between index and data on port ATC_WritePort */
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static u_int8_t set_atc_index = 1;
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static u_int8_t
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video_inb(int port)
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{
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switch(port) {
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case CRTC_DataPortColor:
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return VGA_CRTC[crtc_index];
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case CRTC_IndexPortColor:
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return crtc_index;
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case ATC_ReadPort:
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return VGA_ATC[atc_index];
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case TSC_DataPort:
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return VGA_TSC[tsc_index];
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case TSC_IndexPort:
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return tsc_index;
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case GDC_DataPort:
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return VGA_GDC[gdc_index];
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case GDC_IndexPort:
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return gdc_index;
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case VGA_InputStatus1Port:
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set_atc_index = 1;
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VGA_InputStatus1 = (VGA_InputStatus1 + 1) & 15;
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return VGA_InputStatus1;
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default:
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return 0;
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}
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}
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static void
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video_outb(int port, u_int8_t value)
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{
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/* XXX */
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#define row (CursRow0)
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#define col (CursCol0)
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int cp;
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switch (port) {
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case CRTC_IndexPortColor:
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crtc_index = value;
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break;
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case CRTC_DataPortColor:
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VGA_CRTC[crtc_index] = value;
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switch (crtc_index) {
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case CRTC_CurLocHi: /* Update cursor position in BIOS */
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cp = row * DpyCols + col;
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cp &= 0xff;
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cp |= value << 8;
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row = cp / DpyCols;
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col = cp % DpyCols;
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break;
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case CRTC_CurLocLo: /* Update cursor position in BIOS */
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cp = row * DpyCols + col;
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cp &= 0xff00;
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cp |= value;
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row = cp / DpyCols;
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col = cp % DpyCols;
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break;
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default:
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debug(D_VIDEO, "VGA: outb 0x%04x, 0x%02x at index 0x%02x\n",
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port, value, crtc_index);
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break;
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}
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case CRTC_IndexPortMono: /* Not used */
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break;
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case CRTC_DataPortMono: /* Not used */
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break;
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case ATC_WritePort:
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if (set_atc_index)
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atc_index = value;
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else {
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VGA_ATC[atc_index] = value;
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switch (atc_index) {
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default:
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debug(D_VIDEO, "VGA: outb 0x%04x, 0x%02x at index 0x%02x\n",
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port, value, crtc_index);
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break;
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}
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}
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set_atc_index = 1 - set_atc_index;
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break;
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case TSC_IndexPort:
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tsc_index = value;
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break;
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case TSC_DataPort:
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VGA_TSC[tsc_index] = value;
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switch (tsc_index) {
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default:
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debug(D_VIDEO, "VGA: outb 0x%04x, 0x%02x at index 0x%02x\n",
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port, value, crtc_index);
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break;
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}
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break;
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case GDC_IndexPort:
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gdc_index = value;
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break;
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case GDC_DataPort:
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VGA_GDC[gdc_index] = value;
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#if 0
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switch (gdc_index) {
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default:
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debug(D_VIDEO, "VGA: outb 0x%04x, 0x%02x at index 0x%02x\n",
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port, value, crtc_index);
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break;
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}
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#endif
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break;
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default:
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debug(D_ALWAYS, "VGA: Unknown port 0x%4x\n", port);
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break;
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}
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return;
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#undef row
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#undef col
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}
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void
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video_init()
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{
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/* If we are running under X, get a connection to the X server and create
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an empty window of size (1, 1). It makes a couple of init functions a
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lot easier. */
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if (xmode) {
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init_window();
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/* Set VGA emulator to a sane state */
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init_vga();
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/* Initialize mode 3 (text, 80x25, 16 colors) */
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init_mode(3);
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}
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/* Define all known I/O port handlers */
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if (!raw_kbd) {
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define_input_port_handler(CRTC_IndexPortColor, video_inb);
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define_input_port_handler(CRTC_DataPortColor, video_inb);
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define_input_port_handler(ATC_ReadPort, video_inb);
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define_input_port_handler(TSC_IndexPort, video_inb);
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define_input_port_handler(TSC_DataPort, video_inb);
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define_input_port_handler(GDC_IndexPort, video_inb);
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define_input_port_handler(GDC_DataPort, video_inb);
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define_input_port_handler(VGA_InputStatus1Port, video_inb);
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define_output_port_handler(CRTC_IndexPortColor, video_outb);
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define_output_port_handler(CRTC_DataPortColor, video_outb);
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define_output_port_handler(ATC_WritePort, video_outb);
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define_output_port_handler(TSC_IndexPort, video_outb);
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define_output_port_handler(TSC_DataPort, video_outb);
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define_output_port_handler(GDC_IndexPort, video_outb);
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define_output_port_handler(GDC_DataPort, video_outb);
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}
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redirect0 = isatty(0) == 0 || !xmode ;
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redirect1 = isatty(1) == 0 || !xmode ;
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redirect2 = isatty(2) == 0 || !xmode ;
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return;
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}
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void
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video_bios_init()
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{
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u_char *p;
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u_long vec;
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if (raw_kbd)
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return;
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/*
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* Put the Video Save Table Pointer @ C000:0000
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* Put the Secondary Video Save Table Pointer @ C000:0020
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* Put the Display Combination Code table @ C000:0040
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* Put the Video Parameter table @ C000:1000 - C000:2FFF
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*/
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BIOS_SaveTablePointer = 0xC0000000;
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vsp = (struct VideoSaveTable *)0xC0000L;
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memset(vsp, 0, sizeof(struct VideoSaveTable));
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svsp = (struct SecondaryVideoSaveTable *)0xC0020L;
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vsp->video_parameter_table[0] = 0x1000;
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vsp->video_parameter_table[1] = 0xC000;
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vsp->secondary_save_table[0] = 0x0020;
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vsp->secondary_save_table[1] = 0xC000;
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svsp->display_combination_code_table[0] = 0x0040;
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svsp->display_combination_code_table[1] = 0xC000;
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p = (u_char *)0xC0040;
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*p++ = 2; /* Only support 2 combinations currently */
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*p++ = 1; /* Version # */
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*p++ = 8; /* We won't use more than type 8 */
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*p++ = 0; /* Reserved */
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*p++ = 0; *p++ = 0; /* No Display No Display */
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*p++ = 0; *p++ = 8; /* No Display VGA Color */
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memcpy((void *)0xC1000, videoparams, sizeof(videoparams));
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ivec[0x1d] = 0xC0001000L; /* Video Parameter Table */
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ivec[0x42] = ivec[0x10]; /* Copy of video interrupt */
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/* Put the current font at C000:3000; the pixels are copied in
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'tty.c:load_font()'. */
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ivec[0x1f] = 0xC0003000L;
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ivec[0x43] = 0xC0003000L;
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BIOSDATA[0x8a] = 1; /* Index into DCC table */
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vec = insert_softint_trampoline();
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ivec[0x10] = vec;
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register_callback(vec, int10, "int 10");
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}
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/* Initialize the VGA emulator
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XXX This is not nearly finished right now.
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*/
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static void
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init_vga(void)
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{
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int i;
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/* Zero-fill 'dac_rgb' on allocation; the default (EGA) table has only
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64 entries. */
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dac_rgb = (struct dac_colors *)calloc(256, sizeof(struct dac_colors));
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if (dac_rgb == NULL)
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err(1, "Get memory for dac_rgb");
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/* Copy the default DAC table to a working copy we can trash. */
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for (i = 0; i < 64; i++)
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dac_rgb[i] = dac_default64[i]; /* Structure copy */
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/* Point 'palette[]' to the Attribute Controller space. We will only use
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the first 16 slots. */
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palette = VGA_ATC;
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/* Get memory for the video RAM and adjust the plane pointers. */
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vram = calloc(256 * 1024, 1); /* XXX */
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if (vram == NULL)
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warn("Could not get video memory; graphics modes not available.");
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/* XXX There is probably a more efficient memory layout... */
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vplane0 = vram;
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vplane1 = vram + 0x10000;
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vplane2 = vram + 0x20000;
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vplane3 = vram + 0x30000;
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VGA_InputStatus1 = 0;
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}
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/*
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* Initialize the requested video mode.
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*/
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/* Indices into the video parameter table. We will use that array to
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initialize the registers on startup and when the video mode changes. */
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#define CRTC_Ofs 10
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#define ATC_Ofs 35
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#define TSC_Ofs 5
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#define GDC_Ofs 55
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#define MiscOutput_Ofs 9
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void
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init_mode(int mode)
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{
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vmode_t vmode;
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int idx; /* Index into vmode */
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int pidx; /* Index into videoparams */
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debug(D_VIDEO, "VGA: Set video mode to 0x%02x\n", mode);
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idx = find_vmode(mode & 0x7f);
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if (idx == -1 || vmodelist[idx].type == NOMODE)
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err(1, "Mode 0x%02x is not supported", mode);
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vmode = vmodelist[idx];
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pidx = vmode.paramindex;
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/* Preset VGA registers. */
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memcpy(VGA_CRTC, (u_int8_t *)&videoparams[pidx][CRTC_Ofs],
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sizeof(VGA_CRTC));
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memcpy(VGA_ATC, (u_int8_t *)&videoparams[pidx][ATC_Ofs],
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sizeof(VGA_ATC));
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/* Warning: the video parameter table does not contain the Sequencer's
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Reset register. Its default value is 0x03.*/
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VGA_TSC[TSC_Reset] = 0x03;
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memcpy(VGA_TSC + 1, (u_int8_t *)&videoparams[pidx][TSC_Ofs],
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sizeof(VGA_TSC) - 1);
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memcpy(VGA_GDC, (u_int8_t *)&videoparams[pidx][GDC_Ofs],
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sizeof(VGA_GDC));
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VGA_MiscOutput = videoparams[pidx][MiscOutput_Ofs];
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/* Paranoia */
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if ((VGA_ATC[ATC_ModeCtrl] & 1) == 1 && vmode.type == TEXT)
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err(1, "Text mode requested, but ATC switched to graphics mode!");
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if ((VGA_ATC[ATC_ModeCtrl] & 1) == 0 && vmode.type == GRAPHICS)
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err(1, "Graphics mode requested, but ATC switched to text mode!");
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VideoMode = mode & 0x7f;
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DpyCols = (u_int16_t)videoparams[pidx][0];
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DpyPageSize = *(u_int16_t *)&videoparams[pidx][3];
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ActivePageOfs = 0;
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CursCol0 = 0;
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CursRow0 = 0;
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CursCol1 = 0;
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CursRow1 = 0;
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CursCol2 = 0;
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CursRow2 = 0;
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CursCol3 = 0;
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CursRow3 = 0;
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CursCol4 = 0;
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CursRow4 = 0;
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CursCol5 = 0;
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CursRow5 = 0;
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CursCol6 = 0;
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CursRow6 = 0;
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CursCol7 = 0;
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CursRow7 = 0;
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CursStart = VGA_CRTC[CRTC_CursStart];
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CursEnd = VGA_CRTC[CRTC_CursEnd];
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ActivePage = 0;
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DpyRows = videoparams[pidx][1];
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CharHeight = videoparams[pidx][2];
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CRTCPort = vmode.numcolors > 1 ? CRTC_IndexPortColor : CRTC_IndexPortMono;
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NumColors = vmode.numcolors;
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NumPages = vmode.numpages;
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VertResolution = vmode.vrescode;
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vmem = (u_int16_t *)vmode.vmemaddr;
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/* Copy VGA related BIOS variables from 'vga_status'. */
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memcpy(&BIOS_VideoMode, &VideoMode, 33);
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BIOS_DpyRows = DpyRows;
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BIOS_CharHeight = CharHeight;
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/* Load 'pixels[]' from default DAC values. */
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update_pixels();
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/* Update font. */
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xfont = vmode.fontname;
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load_font();
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/* Resize window if necessary. */
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resize_window();
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/* Mmap video memory for the graphics modes. Write access to 0xa0000 -
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0xaffff will generate a T_PAGEFAULT trap in VM86 mode (aside: why not a
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SIGSEGV?), which is handled in 'trap.c:sigbus()'. */
|
|
if (vmode.type == GRAPHICS) {
|
|
vmem = mmap((void *)0xa0000, 64 * 1024, PROT_NONE,
|
|
MAP_ANON | MAP_FIXED | MAP_SHARED, -1, 0);
|
|
if (vmem == NULL)
|
|
fatal("Could not mmap() video memory");
|
|
|
|
/* Create an XImage to display the graphics screen. */
|
|
get_ximage();
|
|
} else {
|
|
int i;
|
|
|
|
get_lines();
|
|
if (mode & 0x80)
|
|
return;
|
|
/* Initialize video memory with black background, white foreground */
|
|
vattr = 0x0700;
|
|
for (i = 0; i < DpyPageSize / 2; ++i)
|
|
vmem[i] = vattr;
|
|
}
|
|
|
|
return;
|
|
}
|
|
|
|
/* Find the requested mode in the 'vmodelist' table. This function returns the
|
|
index into this table; we will also use the index for accessing the
|
|
'videoparams' array. */
|
|
int find_vmode(int mode)
|
|
{
|
|
unsigned i;
|
|
|
|
for (i = 0; i < NUMMODES; i++)
|
|
if (vmodelist[i].modenumber == mode)
|
|
return i;
|
|
|
|
return -1;
|
|
}
|
|
|
|
/* Handle access to the graphics memory.
|
|
|
|
Simply changing the protection for the memory is not enough, unfortunately.
|
|
It would only work for the 256 color modes, where a memory byte contains
|
|
the color value of one pixel. The 16 color modes (and 4 color modes) make
|
|
use of four bit planes which overlay the first 64K of video memory. The
|
|
bits are distributed into these bit planes according to the GDC state, so
|
|
we will have to emulate the CPU instructions (see 'cpu.c:emu_instr()').
|
|
|
|
Handling the 256 color modes will be a bit easier, once we support those at
|
|
all. */
|
|
int
|
|
vmem_pageflt(struct sigframe *sf)
|
|
{
|
|
regcontext_t *REGS = (regcontext_t *)(&sf->sf_uc.uc_mcontext);
|
|
|
|
/* The ATC's Mode Control register tells us whether 4 or 8 color bits are
|
|
used */
|
|
if (VGA_ATC[ATC_ModeCtrl] & (1 << 6)) {
|
|
/* 256 colors, allow writes; the protection will be set back to
|
|
PROT_READ at the next display update */
|
|
mprotect(vmem, 64 * 1024, PROT_READ | PROT_WRITE);
|
|
return 0;
|
|
}
|
|
|
|
/* There's no need to change the protection in the 16 color modes, we will
|
|
write to 'vram'. Just emulate the next instruction. */
|
|
return emu_instr(REGS);
|
|
}
|
|
|
|
/* We need to keep track of the latches' contents.*/
|
|
static u_int8_t latch0, latch1, latch2, latch3;
|
|
|
|
/* Read a byte from the video memory. 'vga_read()' is called from
|
|
'cpu.c:read_byte()' and will emulate the VGA read modes. */
|
|
u_int8_t
|
|
vga_read(u_int32_t addr)
|
|
{
|
|
u_int32_t dst;
|
|
|
|
/* 'addr' lies between 0xa0000 and 0xaffff. */
|
|
dst = addr - 0xa0000;
|
|
|
|
/* Fill latches. */
|
|
latch0 = vplane0[dst];
|
|
latch1 = vplane1[dst];
|
|
latch2 = vplane2[dst];
|
|
latch3 = vplane3[dst];
|
|
|
|
/* Select read mode. */
|
|
if ((VGA_GDC[GDC_Mode] & 0x80) == 0)
|
|
/* Read Mode 0; return the byte from the selected bit plane. */
|
|
return vram[dst + (VGA_GDC[GDC_ReadMapSelect] & 3) * 0x10000];
|
|
|
|
/* Read Mode 1 */
|
|
debug(D_ALWAYS, "VGA: Read Mode 1 not implemented\n");
|
|
return 0;
|
|
}
|
|
|
|
/* Write a byte to the video memory. 'vga_write()' is called from
|
|
'cpu.c:write_word()' and will emulate the VGA write modes. Not all four
|
|
modes are implemented yet, nor are the addressing modes (odd/even, chain4).
|
|
(NB: I think the latter will have to be done in 'tty_graphics_update()').
|
|
*/
|
|
void
|
|
vga_write(u_int32_t addr, u_int8_t val)
|
|
{
|
|
u_int32_t dst;
|
|
u_int8_t c0, c1, c2, c3;
|
|
u_int8_t m0, m1, m2, m3;
|
|
u_int8_t mask;
|
|
|
|
#if 0
|
|
unsigned i;
|
|
|
|
debug(D_VIDEO, "VGA: Write 0x%02x to 0x%x\n", val, addr);
|
|
debug(D_VIDEO, " GDC: ");
|
|
for (i = 0; i < sizeof(VGA_GDC); i++)
|
|
debug(D_VIDEO, "%02x ", VGA_GDC[i]);
|
|
debug(D_VIDEO, "\n");
|
|
debug(D_VIDEO, " TSC: ");
|
|
for (i = 0; i < sizeof(VGA_TSC); i++)
|
|
debug(D_VIDEO, "%02x ", VGA_TSC[i]);
|
|
debug(D_VIDEO, "\n");
|
|
#endif
|
|
|
|
/* 'addr' lies between 0xa0000 and 0xaffff. */
|
|
dst = addr - 0xa0000;
|
|
|
|
c0 = latch0;
|
|
c1 = latch1;
|
|
c2 = latch2;
|
|
c3 = latch3;
|
|
|
|
/* Select write mode. */
|
|
switch (VGA_GDC[GDC_Mode] & 3) {
|
|
case 0:
|
|
mask = VGA_GDC[GDC_BitMask];
|
|
|
|
if (VGA_GDC[GDC_DataRotate] & 7)
|
|
debug(D_ALWAYS, "VGA: Data Rotate != 0\n");
|
|
|
|
/* Select function. */
|
|
switch (VGA_GDC[GDC_DataRotate] & 0x18) {
|
|
case 0x00: /* replace */
|
|
m0 = VGA_GDC[GDC_SetReset] & 1 ? mask : 0x00;
|
|
m1 = VGA_GDC[GDC_SetReset] & 2 ? mask : 0x00;
|
|
m2 = VGA_GDC[GDC_SetReset] & 4 ? mask : 0x00;
|
|
m3 = VGA_GDC[GDC_SetReset] & 8 ? mask : 0x00;
|
|
|
|
c0 = VGA_GDC[GDC_EnableSetReset] & 1 ? c0 & ~mask : val & ~mask;
|
|
c1 = VGA_GDC[GDC_EnableSetReset] & 2 ? c1 & ~mask : val & ~mask;
|
|
c2 = VGA_GDC[GDC_EnableSetReset] & 4 ? c2 & ~mask : val & ~mask;
|
|
c3 = VGA_GDC[GDC_EnableSetReset] & 8 ? c3 & ~mask : val & ~mask;
|
|
|
|
c0 |= m0;
|
|
c1 |= m1;
|
|
c2 |= m2;
|
|
c3 |= m3;
|
|
break;
|
|
case 0x08: /* AND */
|
|
m0 = VGA_GDC[GDC_SetReset] & 1 ? 0xff : ~mask;
|
|
m1 = VGA_GDC[GDC_SetReset] & 2 ? 0xff : ~mask;
|
|
m2 = VGA_GDC[GDC_SetReset] & 4 ? 0xff : ~mask;
|
|
m3 = VGA_GDC[GDC_SetReset] & 8 ? 0xff : ~mask;
|
|
|
|
c0 = VGA_GDC[GDC_EnableSetReset] & 1 ? c0 & m0 : val & m0;
|
|
c1 = VGA_GDC[GDC_EnableSetReset] & 2 ? c1 & m1 : val & m1;
|
|
c2 = VGA_GDC[GDC_EnableSetReset] & 4 ? c2 & m2 : val & m2;
|
|
c3 = VGA_GDC[GDC_EnableSetReset] & 8 ? c3 & m3 : val & m3;
|
|
break;
|
|
case 0x10: /* OR */
|
|
m0 = VGA_GDC[GDC_SetReset] & 1 ? mask : 0x00;
|
|
m1 = VGA_GDC[GDC_SetReset] & 2 ? mask : 0x00;
|
|
m2 = VGA_GDC[GDC_SetReset] & 4 ? mask : 0x00;
|
|
m3 = VGA_GDC[GDC_SetReset] & 8 ? mask : 0x00;
|
|
|
|
c0 = VGA_GDC[GDC_EnableSetReset] & 1 ? c0 | m0 : val | m0;
|
|
c1 = VGA_GDC[GDC_EnableSetReset] & 2 ? c1 | m1 : val | m1;
|
|
c2 = VGA_GDC[GDC_EnableSetReset] & 4 ? c2 | m2 : val | m2;
|
|
c3 = VGA_GDC[GDC_EnableSetReset] & 8 ? c3 | m3 : val | m3;
|
|
break;
|
|
case 0x18: /* XOR */
|
|
m0 = VGA_GDC[GDC_SetReset] & 1 ? mask : 0x00;
|
|
m1 = VGA_GDC[GDC_SetReset] & 2 ? mask : 0x00;
|
|
m2 = VGA_GDC[GDC_SetReset] & 4 ? mask : 0x00;
|
|
m3 = VGA_GDC[GDC_SetReset] & 8 ? mask : 0x00;
|
|
|
|
c0 = VGA_GDC[GDC_EnableSetReset] & 1 ? c0 ^ m0 : val ^ m0;
|
|
c1 = VGA_GDC[GDC_EnableSetReset] & 2 ? c1 ^ m1 : val ^ m1;
|
|
c2 = VGA_GDC[GDC_EnableSetReset] & 4 ? c2 ^ m2 : val ^ m2;
|
|
c3 = VGA_GDC[GDC_EnableSetReset] & 8 ? c3 ^ m3 : val ^ m3;
|
|
break;
|
|
}
|
|
break;
|
|
case 1:
|
|
/* Just copy the latches' content to the desired destination
|
|
address. */
|
|
break;
|
|
case 2:
|
|
mask = VGA_GDC[GDC_BitMask];
|
|
|
|
/* select function */
|
|
switch (VGA_GDC[GDC_DataRotate] & 0x18) {
|
|
case 0x00: /* replace */
|
|
m0 = (val & 1 ? 0xff : 0x00) & mask;
|
|
m1 = (val & 2 ? 0xff : 0x00) & mask;
|
|
m2 = (val & 4 ? 0xff : 0x00) & mask;
|
|
m3 = (val & 8 ? 0xff : 0x00) & mask;
|
|
|
|
c0 &= ~mask;
|
|
c1 &= ~mask;
|
|
c2 &= ~mask;
|
|
c3 &= ~mask;
|
|
|
|
c0 |= m0;
|
|
c1 |= m1;
|
|
c2 |= m2;
|
|
c3 |= m3;
|
|
break;
|
|
case 0x08: /* AND */
|
|
m0 = (val & 1 ? 0xff : 0x00) | ~mask;
|
|
m1 = (val & 2 ? 0xff : 0x00) | ~mask;
|
|
m2 = (val & 4 ? 0xff : 0x00) | ~mask;
|
|
m3 = (val & 8 ? 0xff : 0x00) | ~mask;
|
|
|
|
c0 &= m0;
|
|
c1 &= m1;
|
|
c2 &= m2;
|
|
c3 &= m3;
|
|
break;
|
|
case 0x10: /* OR */
|
|
m0 = (val & 1 ? 0xff : 0x00) & mask;
|
|
m1 = (val & 2 ? 0xff : 0x00) & mask;
|
|
m2 = (val & 4 ? 0xff : 0x00) & mask;
|
|
m3 = (val & 8 ? 0xff : 0x00) & mask;
|
|
|
|
c0 |= m0;
|
|
c1 |= m1;
|
|
c2 |= m2;
|
|
c3 |= m3;
|
|
break;
|
|
case 0x18: /* XOR */
|
|
m0 = (val & 1 ? 0xff : 0x00) & mask;
|
|
m1 = (val & 2 ? 0xff : 0x00) & mask;
|
|
m2 = (val & 4 ? 0xff : 0x00) & mask;
|
|
m3 = (val & 8 ? 0xff : 0x00) & mask;
|
|
|
|
c0 ^= m0;
|
|
c1 ^= m1;
|
|
c2 ^= m2;
|
|
c3 ^= m3;
|
|
break;
|
|
}
|
|
break;
|
|
case 3:
|
|
/* not yet */
|
|
debug(D_ALWAYS, "VGA: Write Mode 3 not implemented\n");
|
|
break;
|
|
}
|
|
|
|
/* Write back changed byte, depending on Map Mask register. */
|
|
if (VGA_TSC[TSC_MapMask] & 1)
|
|
vplane0[dst] = c0;
|
|
if (VGA_TSC[TSC_MapMask] & 2)
|
|
vplane1[dst] = c1;
|
|
if (VGA_TSC[TSC_MapMask] & 4)
|
|
vplane2[dst] = c2;
|
|
if (VGA_TSC[TSC_MapMask] & 8)
|
|
vplane3[dst] = c3;
|
|
|
|
return;
|
|
}
|