47280ef170
MFC after: 1 week
707 lines
19 KiB
C
707 lines
19 KiB
C
/*-
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright 2002 by Peter Grehan. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* Driver for KeyLargo/Pangea, the MacPPC south bridge ASIC.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <machine/bus.h>
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#include <machine/intr_machdep.h>
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#include <machine/resource.h>
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#include <machine/vmparam.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/ofw/openfirm.h>
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#include <powerpc/powermac/maciovar.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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/*
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* Macio softc
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*/
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struct macio_softc {
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phandle_t sc_node;
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vm_offset_t sc_base;
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vm_offset_t sc_size;
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struct rman sc_mem_rman;
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/* FCR registers */
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int sc_memrid;
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struct resource *sc_memr;
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};
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static MALLOC_DEFINE(M_MACIO, "macio", "macio device information");
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static int macio_probe(device_t);
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static int macio_attach(device_t);
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static int macio_print_child(device_t dev, device_t child);
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static void macio_probe_nomatch(device_t, device_t);
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static struct resource *macio_alloc_resource(device_t, device_t, int, int *,
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rman_res_t, rman_res_t, rman_res_t,
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u_int);
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static int macio_activate_resource(device_t, device_t, int, int,
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struct resource *);
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static int macio_deactivate_resource(device_t, device_t, int, int,
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struct resource *);
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static int macio_release_resource(device_t, device_t, int, int,
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struct resource *);
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static struct resource_list *macio_get_resource_list (device_t, device_t);
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static ofw_bus_get_devinfo_t macio_get_devinfo;
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/*
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* Bus interface definition
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*/
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static device_method_t macio_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, macio_probe),
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DEVMETHOD(device_attach, macio_attach),
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DEVMETHOD(device_detach, bus_generic_detach),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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DEVMETHOD(device_suspend, bus_generic_suspend),
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DEVMETHOD(device_resume, bus_generic_resume),
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/* Bus interface */
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DEVMETHOD(bus_print_child, macio_print_child),
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DEVMETHOD(bus_probe_nomatch, macio_probe_nomatch),
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DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
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DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
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DEVMETHOD(bus_alloc_resource, macio_alloc_resource),
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DEVMETHOD(bus_release_resource, macio_release_resource),
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DEVMETHOD(bus_activate_resource, macio_activate_resource),
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DEVMETHOD(bus_deactivate_resource, macio_deactivate_resource),
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DEVMETHOD(bus_get_resource_list, macio_get_resource_list),
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DEVMETHOD(bus_child_pnpinfo_str, ofw_bus_gen_child_pnpinfo_str),
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/* ofw_bus interface */
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DEVMETHOD(ofw_bus_get_devinfo, macio_get_devinfo),
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DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
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DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
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DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
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DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
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DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
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{ 0, 0 }
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};
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static driver_t macio_pci_driver = {
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"macio",
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macio_methods,
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sizeof(struct macio_softc)
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};
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devclass_t macio_devclass;
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DRIVER_MODULE(macio, pci, macio_pci_driver, macio_devclass, 0, 0);
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/*
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* PCI ID search table
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*/
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static struct macio_pci_dev {
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u_int32_t mpd_devid;
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char *mpd_desc;
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} macio_pci_devlist[] = {
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{ 0x0017106b, "Paddington I/O Controller" },
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{ 0x0022106b, "KeyLargo I/O Controller" },
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{ 0x0025106b, "Pangea I/O Controller" },
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{ 0x003e106b, "Intrepid I/O Controller" },
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{ 0x0041106b, "K2 KeyLargo I/O Controller" },
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{ 0x004f106b, "Shasta I/O Controller" },
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{ 0, NULL }
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};
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/*
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* Devices to exclude from the probe
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* XXX some of these may be required in the future...
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*/
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#define MACIO_QUIRK_IGNORE 0x00000001
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#define MACIO_QUIRK_CHILD_HAS_INTR 0x00000002
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#define MACIO_QUIRK_USE_CHILD_REG 0x00000004
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struct macio_quirk_entry {
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const char *mq_name;
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int mq_quirks;
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};
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static struct macio_quirk_entry macio_quirks[] = {
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{ "escc-legacy", MACIO_QUIRK_IGNORE },
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{ "timer", MACIO_QUIRK_IGNORE },
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{ "escc", MACIO_QUIRK_CHILD_HAS_INTR },
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{ "i2s", MACIO_QUIRK_CHILD_HAS_INTR |
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MACIO_QUIRK_USE_CHILD_REG },
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{ NULL, 0 }
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};
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static int
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macio_get_quirks(const char *name)
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{
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struct macio_quirk_entry *mqe;
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for (mqe = macio_quirks; mqe->mq_name != NULL; mqe++)
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if (strcmp(name, mqe->mq_name) == 0)
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return (mqe->mq_quirks);
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return (0);
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}
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/*
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* Add an interrupt to the dev's resource list if present
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*/
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static void
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macio_add_intr(phandle_t devnode, struct macio_devinfo *dinfo)
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{
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phandle_t iparent;
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int *intr;
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int i, nintr;
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int icells;
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if (dinfo->mdi_ninterrupts >= 6) {
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printf("macio: device has more than 6 interrupts\n");
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return;
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}
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nintr = OF_getprop_alloc_multi(devnode, "interrupts", sizeof(*intr),
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(void **)&intr);
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if (nintr == -1) {
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nintr = OF_getprop_alloc_multi(devnode, "AAPL,interrupts",
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sizeof(*intr), (void **)&intr);
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if (nintr == -1)
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return;
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}
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if (intr[0] == -1)
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return;
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if (OF_getprop(devnode, "interrupt-parent", &iparent, sizeof(iparent))
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<= 0)
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panic("Interrupt but no interrupt parent!\n");
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if (OF_getprop(OF_node_from_xref(iparent), "#interrupt-cells", &icells,
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sizeof(icells)) <= 0)
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icells = 1;
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for (i = 0; i < nintr; i+=icells) {
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u_int irq = MAP_IRQ(iparent, intr[i]);
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resource_list_add(&dinfo->mdi_resources, SYS_RES_IRQ,
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dinfo->mdi_ninterrupts, irq, irq, 1);
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dinfo->mdi_interrupts[dinfo->mdi_ninterrupts] = irq;
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dinfo->mdi_ninterrupts++;
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}
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}
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static void
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macio_add_reg(phandle_t devnode, struct macio_devinfo *dinfo)
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{
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struct macio_reg *reg, *regp;
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phandle_t child;
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char buf[8];
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int i, layout_id = 0, nreg, res;
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nreg = OF_getprop_alloc_multi(devnode, "reg", sizeof(*reg), (void **)®);
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if (nreg == -1)
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return;
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/*
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* Some G5's have broken properties in the i2s-a area. If so we try
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* to fix it. Right now we know of two different cases, one for
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* sound layout-id 36 and the other one for sound layout-id 76.
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* What is missing is the base address for the memory addresses.
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* We take them from the parent node (i2s) and use the size
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* information from the child.
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*/
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if (reg[0].mr_base == 0) {
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child = OF_child(devnode);
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while (child != 0) {
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res = OF_getprop(child, "name", buf, sizeof(buf));
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if (res > 0 && strcmp(buf, "sound") == 0)
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break;
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child = OF_peer(child);
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}
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res = OF_getprop(child, "layout-id", &layout_id,
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sizeof(layout_id));
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if (res > 0 && (layout_id == 36 || layout_id == 76)) {
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res = OF_getprop_alloc_multi(OF_parent(devnode), "reg",
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sizeof(*regp), (void **)®p);
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reg[0] = regp[0];
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reg[1].mr_base = regp[1].mr_base;
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reg[2].mr_base = regp[1].mr_base + reg[1].mr_size;
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}
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}
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for (i = 0; i < nreg; i++) {
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resource_list_add(&dinfo->mdi_resources, SYS_RES_MEMORY, i,
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reg[i].mr_base, reg[i].mr_base + reg[i].mr_size,
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reg[i].mr_size);
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}
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}
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/*
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* PCI probe
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*/
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static int
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macio_probe(device_t dev)
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{
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int i;
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u_int32_t devid;
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devid = pci_get_devid(dev);
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for (i = 0; macio_pci_devlist[i].mpd_desc != NULL; i++) {
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if (devid == macio_pci_devlist[i].mpd_devid) {
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device_set_desc(dev, macio_pci_devlist[i].mpd_desc);
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return (0);
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}
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}
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return (ENXIO);
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}
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/*
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* PCI attach: scan Open Firmware child nodes, and attach these as children
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* of the macio bus
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*/
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static int
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macio_attach(device_t dev)
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{
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struct macio_softc *sc;
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struct macio_devinfo *dinfo;
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phandle_t root;
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phandle_t child;
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phandle_t subchild;
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device_t cdev;
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u_int reg[3];
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char compat[32];
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int error, quirks;
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sc = device_get_softc(dev);
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root = sc->sc_node = ofw_bus_get_node(dev);
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/*
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* Locate the device node and it's base address
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*/
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if (OF_getprop(root, "assigned-addresses",
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reg, sizeof(reg)) < (ssize_t)sizeof(reg)) {
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return (ENXIO);
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}
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/* Used later to see if we have to enable the I2S part. */
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OF_getprop(root, "compatible", compat, sizeof(compat));
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sc->sc_base = reg[2];
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sc->sc_size = MACIO_REG_SIZE;
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sc->sc_memrid = PCIR_BAR(0);
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sc->sc_memr = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
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&sc->sc_memrid, RF_ACTIVE);
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sc->sc_mem_rman.rm_type = RMAN_ARRAY;
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sc->sc_mem_rman.rm_descr = "MacIO Device Memory";
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error = rman_init(&sc->sc_mem_rman);
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if (error) {
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device_printf(dev, "rman_init() failed. error = %d\n", error);
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return (error);
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}
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error = rman_manage_region(&sc->sc_mem_rman, 0, sc->sc_size);
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if (error) {
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device_printf(dev,
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"rman_manage_region() failed. error = %d\n", error);
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return (error);
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}
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/*
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* Iterate through the sub-devices
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*/
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for (child = OF_child(root); child != 0; child = OF_peer(child)) {
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dinfo = malloc(sizeof(*dinfo), M_MACIO, M_WAITOK | M_ZERO);
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if (ofw_bus_gen_setup_devinfo(&dinfo->mdi_obdinfo, child) !=
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0) {
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free(dinfo, M_MACIO);
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continue;
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}
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quirks = macio_get_quirks(dinfo->mdi_obdinfo.obd_name);
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if ((quirks & MACIO_QUIRK_IGNORE) != 0) {
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ofw_bus_gen_destroy_devinfo(&dinfo->mdi_obdinfo);
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free(dinfo, M_MACIO);
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continue;
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}
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resource_list_init(&dinfo->mdi_resources);
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dinfo->mdi_ninterrupts = 0;
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macio_add_intr(child, dinfo);
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if ((quirks & MACIO_QUIRK_USE_CHILD_REG) != 0)
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macio_add_reg(OF_child(child), dinfo);
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else
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macio_add_reg(child, dinfo);
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if ((quirks & MACIO_QUIRK_CHILD_HAS_INTR) != 0)
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for (subchild = OF_child(child); subchild != 0;
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subchild = OF_peer(subchild))
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macio_add_intr(subchild, dinfo);
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cdev = device_add_child(dev, NULL, -1);
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if (cdev == NULL) {
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device_printf(dev, "<%s>: device_add_child failed\n",
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dinfo->mdi_obdinfo.obd_name);
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resource_list_free(&dinfo->mdi_resources);
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ofw_bus_gen_destroy_devinfo(&dinfo->mdi_obdinfo);
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free(dinfo, M_MACIO);
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continue;
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}
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device_set_ivars(cdev, dinfo);
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/* Set FCRs to enable some devices */
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if (sc->sc_memr == NULL)
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continue;
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if (strcmp(ofw_bus_get_name(cdev), "bmac") == 0 ||
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(ofw_bus_get_compat(cdev) != NULL &&
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strcmp(ofw_bus_get_compat(cdev), "bmac+") == 0)) {
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uint32_t fcr;
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fcr = bus_read_4(sc->sc_memr, HEATHROW_FCR);
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fcr |= FCR_ENET_ENABLE & ~FCR_ENET_RESET;
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bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr);
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DELAY(50000);
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fcr |= FCR_ENET_RESET;
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bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr);
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DELAY(50000);
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fcr &= ~FCR_ENET_RESET;
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bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr);
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DELAY(50000);
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bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr);
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}
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/*
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* Make sure the I2S0 and the I2S0_CLK are enabled.
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* On certain G5's they are not.
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*/
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if ((strcmp(ofw_bus_get_name(cdev), "i2s") == 0) &&
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(strcmp(compat, "K2-Keylargo") == 0)) {
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uint32_t fcr1;
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fcr1 = bus_read_4(sc->sc_memr, KEYLARGO_FCR1);
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fcr1 |= FCR1_I2S0_CLK_ENABLE | FCR1_I2S0_ENABLE;
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bus_write_4(sc->sc_memr, KEYLARGO_FCR1, fcr1);
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}
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}
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return (bus_generic_attach(dev));
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}
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static int
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macio_print_child(device_t dev, device_t child)
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{
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struct macio_devinfo *dinfo;
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struct resource_list *rl;
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int retval = 0;
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dinfo = device_get_ivars(child);
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rl = &dinfo->mdi_resources;
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retval += bus_print_child_header(dev, child);
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retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx");
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retval += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd");
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retval += bus_print_child_footer(dev, child);
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return (retval);
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}
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static void
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macio_probe_nomatch(device_t dev, device_t child)
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{
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struct macio_devinfo *dinfo;
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struct resource_list *rl;
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const char *type;
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if (bootverbose) {
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dinfo = device_get_ivars(child);
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rl = &dinfo->mdi_resources;
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if ((type = ofw_bus_get_type(child)) == NULL)
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type = "(unknown)";
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device_printf(dev, "<%s, %s>", type, ofw_bus_get_name(child));
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resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx");
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resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd");
|
|
printf(" (no driver attached)\n");
|
|
}
|
|
}
|
|
|
|
|
|
static struct resource *
|
|
macio_alloc_resource(device_t bus, device_t child, int type, int *rid,
|
|
rman_res_t start, rman_res_t end, rman_res_t count,
|
|
u_int flags)
|
|
{
|
|
struct macio_softc *sc;
|
|
int needactivate;
|
|
struct resource *rv;
|
|
struct rman *rm;
|
|
u_long adjstart, adjend, adjcount;
|
|
struct macio_devinfo *dinfo;
|
|
struct resource_list_entry *rle;
|
|
|
|
sc = device_get_softc(bus);
|
|
dinfo = device_get_ivars(child);
|
|
|
|
needactivate = flags & RF_ACTIVE;
|
|
flags &= ~RF_ACTIVE;
|
|
|
|
switch (type) {
|
|
case SYS_RES_MEMORY:
|
|
case SYS_RES_IOPORT:
|
|
rle = resource_list_find(&dinfo->mdi_resources, SYS_RES_MEMORY,
|
|
*rid);
|
|
if (rle == NULL) {
|
|
device_printf(bus, "no rle for %s memory %d\n",
|
|
device_get_nameunit(child), *rid);
|
|
return (NULL);
|
|
}
|
|
|
|
if (start < rle->start)
|
|
adjstart = rle->start;
|
|
else if (start > rle->end)
|
|
adjstart = rle->end;
|
|
else
|
|
adjstart = start;
|
|
|
|
if (end < rle->start)
|
|
adjend = rle->start;
|
|
else if (end > rle->end)
|
|
adjend = rle->end;
|
|
else
|
|
adjend = end;
|
|
|
|
adjcount = adjend - adjstart;
|
|
|
|
rm = &sc->sc_mem_rman;
|
|
break;
|
|
|
|
case SYS_RES_IRQ:
|
|
/* Check for passthrough from subattachments like macgpio */
|
|
if (device_get_parent(child) != bus)
|
|
return BUS_ALLOC_RESOURCE(device_get_parent(bus), child,
|
|
type, rid, start, end, count, flags);
|
|
|
|
rle = resource_list_find(&dinfo->mdi_resources, SYS_RES_IRQ,
|
|
*rid);
|
|
if (rle == NULL) {
|
|
if (dinfo->mdi_ninterrupts >= 6) {
|
|
device_printf(bus,
|
|
"%s has more than 6 interrupts\n",
|
|
device_get_nameunit(child));
|
|
return (NULL);
|
|
}
|
|
resource_list_add(&dinfo->mdi_resources, SYS_RES_IRQ,
|
|
dinfo->mdi_ninterrupts, start, start, 1);
|
|
|
|
dinfo->mdi_interrupts[dinfo->mdi_ninterrupts] = start;
|
|
dinfo->mdi_ninterrupts++;
|
|
}
|
|
|
|
return (resource_list_alloc(&dinfo->mdi_resources, bus, child,
|
|
type, rid, start, end, count, flags));
|
|
|
|
default:
|
|
device_printf(bus, "unknown resource request from %s\n",
|
|
device_get_nameunit(child));
|
|
return (NULL);
|
|
}
|
|
|
|
rv = rman_reserve_resource(rm, adjstart, adjend, adjcount, flags,
|
|
child);
|
|
if (rv == NULL) {
|
|
device_printf(bus,
|
|
"failed to reserve resource %#lx - %#lx (%#lx) for %s\n",
|
|
adjstart, adjend, adjcount, device_get_nameunit(child));
|
|
return (NULL);
|
|
}
|
|
|
|
rman_set_rid(rv, *rid);
|
|
|
|
if (needactivate) {
|
|
if (bus_activate_resource(child, type, *rid, rv) != 0) {
|
|
device_printf(bus,
|
|
"failed to activate resource for %s\n",
|
|
device_get_nameunit(child));
|
|
rman_release_resource(rv);
|
|
return (NULL);
|
|
}
|
|
}
|
|
|
|
return (rv);
|
|
}
|
|
|
|
|
|
static int
|
|
macio_release_resource(device_t bus, device_t child, int type, int rid,
|
|
struct resource *res)
|
|
{
|
|
if (rman_get_flags(res) & RF_ACTIVE) {
|
|
int error = bus_deactivate_resource(child, type, rid, res);
|
|
if (error)
|
|
return error;
|
|
}
|
|
|
|
return (rman_release_resource(res));
|
|
}
|
|
|
|
|
|
static int
|
|
macio_activate_resource(device_t bus, device_t child, int type, int rid,
|
|
struct resource *res)
|
|
{
|
|
struct macio_softc *sc;
|
|
void *p;
|
|
|
|
sc = device_get_softc(bus);
|
|
|
|
if (type == SYS_RES_IRQ)
|
|
return (bus_activate_resource(bus, type, rid, res));
|
|
|
|
if ((type == SYS_RES_MEMORY) || (type == SYS_RES_IOPORT)) {
|
|
p = pmap_mapdev((vm_offset_t)rman_get_start(res) + sc->sc_base,
|
|
(vm_size_t)rman_get_size(res));
|
|
if (p == NULL)
|
|
return (ENOMEM);
|
|
rman_set_virtual(res, p);
|
|
rman_set_bustag(res, &bs_le_tag);
|
|
rman_set_bushandle(res, (u_long)p);
|
|
}
|
|
|
|
return (rman_activate_resource(res));
|
|
}
|
|
|
|
|
|
static int
|
|
macio_deactivate_resource(device_t bus, device_t child, int type, int rid,
|
|
struct resource *res)
|
|
{
|
|
/*
|
|
* If this is a memory resource, unmap it.
|
|
*/
|
|
if ((type == SYS_RES_MEMORY) || (type == SYS_RES_IOPORT)) {
|
|
u_int32_t psize;
|
|
|
|
psize = rman_get_size(res);
|
|
pmap_unmapdev((vm_offset_t)rman_get_virtual(res), psize);
|
|
}
|
|
|
|
return (rman_deactivate_resource(res));
|
|
}
|
|
|
|
|
|
static struct resource_list *
|
|
macio_get_resource_list (device_t dev, device_t child)
|
|
{
|
|
struct macio_devinfo *dinfo;
|
|
|
|
dinfo = device_get_ivars(child);
|
|
return (&dinfo->mdi_resources);
|
|
}
|
|
|
|
static const struct ofw_bus_devinfo *
|
|
macio_get_devinfo(device_t dev, device_t child)
|
|
{
|
|
struct macio_devinfo *dinfo;
|
|
|
|
dinfo = device_get_ivars(child);
|
|
return (&dinfo->mdi_obdinfo);
|
|
}
|
|
|
|
int
|
|
macio_enable_wireless(device_t dev, bool enable)
|
|
{
|
|
struct macio_softc *sc = device_get_softc(dev);
|
|
uint32_t x;
|
|
|
|
if (enable) {
|
|
x = bus_read_4(sc->sc_memr, KEYLARGO_FCR2);
|
|
x |= 0x4;
|
|
bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x);
|
|
|
|
/* Enable card slot. */
|
|
bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0f, 5);
|
|
DELAY(1000);
|
|
bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0f, 4);
|
|
DELAY(1000);
|
|
x = bus_read_4(sc->sc_memr, KEYLARGO_FCR2);
|
|
x &= ~0x80000000;
|
|
|
|
bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x);
|
|
/* out8(gpio + 0x10, 4); */
|
|
|
|
bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0b, 0);
|
|
bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0a, 0x28);
|
|
bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0d, 0x28);
|
|
bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0d, 0x28);
|
|
bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0e, 0x28);
|
|
bus_write_4(sc->sc_memr, 0x1c000, 0);
|
|
|
|
/* Initialize the card. */
|
|
bus_write_4(sc->sc_memr, 0x1a3e0, 0x41);
|
|
x = bus_read_4(sc->sc_memr, KEYLARGO_FCR2);
|
|
x |= 0x80000000;
|
|
bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x);
|
|
} else {
|
|
x = bus_read_4(sc->sc_memr, KEYLARGO_FCR2);
|
|
x &= ~0x4;
|
|
bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x);
|
|
/* out8(gpio + 0x10, 0); */
|
|
}
|
|
|
|
return (0);
|
|
}
|