63f02baf0e
level. The distinction was artificial. Some more movement around the deck charis is likely depending on the fallout from this one. Paths were corrected after the svn mv. Hope that's OK.
155 lines
4.3 KiB
C
155 lines
4.3 KiB
C
/*-
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* Copyright (c) 2007 Bruce M. Simpson.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* Child driver for ChipCommon core.
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* This is not MI code at the moment.
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* Two 16C550 compatible UARTs live here. On the WGT634U, uart1 is the
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* system console, and uart0 is not pinned out.
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* Because their presence is conditional, they should probably
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* be attached from here.
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* GPIO lives here.
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* The hardware watchdog lives here.
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* Clock control registers live here.
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* You don't need to read them to determine the clock speed on the 5365,
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* which is always 200MHz and thus may be hardcoded (for now).
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* Flash config registers live here. There may or may not be system flash.
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* The external interface bus lives here (conditionally).
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* There is a JTAG interface here which may be used to attach probes to
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* the SoC for debugging.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <sys/malloc.h>
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#include <machine/bus.h>
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#include <dev/siba/sibavar.h>
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#include <dev/siba/sibareg.h>
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#include <dev/siba/siba_ids.h>
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static int siba_cc_attach(device_t);
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static int siba_cc_probe(device_t);
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static void siba_cc_intr(void *v);
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static int
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siba_cc_probe(device_t dev)
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{
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if (siba_get_vendor(dev) == SIBA_VID_BROADCOM &&
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siba_get_device(dev) == SIBA_DEVID_CHIPCOMMON) {
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device_set_desc(dev, "ChipCommon core");
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return (BUS_PROBE_DEFAULT);
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}
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return (ENXIO);
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}
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struct siba_cc_softc {
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void *notused;
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};
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static int
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siba_cc_attach(device_t dev)
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{
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//struct siba_cc_softc *sc = device_get_softc(dev);
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struct resource *mem;
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struct resource *irq;
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int rid;
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/*
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* Allocate the resources which the parent bus has already
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* determined for us.
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* TODO: interrupt routing
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*/
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#define MIPS_MEM_RID 0x20
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rid = MIPS_MEM_RID;
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mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
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if (mem == NULL) {
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device_printf(dev, "unable to allocate memory\n");
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return (ENXIO);
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}
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rid = 0;
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irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 0);
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if (irq == NULL) {
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device_printf(dev, "unable to allocate irq\n");
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return (ENXIO);
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}
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/* now setup the interrupt */
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/* may be fast, exclusive or mpsafe at a later date */
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/*
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* XXX is this interrupt line in ChipCommon used for anything
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* other than the uart? in that case we shouldn't hog it ourselves
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* and let uart claim it to avoid polled mode.
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*/
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int err;
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void *cookie;
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err = bus_setup_intr(dev, irq, INTR_TYPE_TTY, NULL, siba_cc_intr, NULL,
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&cookie);
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if (err != 0) {
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device_printf(dev, "unable to setup intr\n");
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return (ENXIO);
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}
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/* TODO: attach uart child */
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return (0);
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}
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static void
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siba_cc_intr(void *v)
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{
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}
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static device_method_t siba_cc_methods[] = {
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/* Device interface */
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DEVMETHOD(device_attach, siba_cc_attach),
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DEVMETHOD(device_probe, siba_cc_probe),
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{0, 0},
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};
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static driver_t siba_cc_driver = {
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"siba_cc",
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siba_cc_methods,
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sizeof(struct siba_softc),
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};
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static devclass_t siba_cc_devclass;
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DRIVER_MODULE(siba_cc, siba, siba_cc_driver, siba_cc_devclass, 0, 0);
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