c27a7c453c
vendor/processor-trace/24982c1a6fce48f1e416461d42899805f74fbb26 Sponsored by: DARPA, AFRL
129 lines
4.0 KiB
C
129 lines
4.0 KiB
C
/*
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* Copyright (c) 2013-2018, Intel Corporation
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* * Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* * Neither the name of Intel Corporation nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#if !defined(PT_ILD_H)
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#define PT_ILD_H
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#include "pt_insn.h"
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#include "intel-pt.h"
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typedef enum {
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PTI_MAP_0, /* 1-byte opcodes. may have modrm */
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PTI_MAP_1, /* 2-byte opcodes (0x0f). may have modrm */
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PTI_MAP_2, /* 3-byte opcodes (0x0f38). has modrm */
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PTI_MAP_3, /* 3-byte opcodes (0x0f3a). has modrm */
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PTI_MAP_AMD3DNOW, /* 3d-now opcodes (0x0f0f). has modrm */
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PTI_MAP_INVALID
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} pti_map_enum_t;
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struct pt_ild {
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/* inputs */
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uint8_t const *itext;
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uint8_t max_bytes; /*1..15 bytes */
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enum pt_exec_mode mode;
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union {
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struct {
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uint32_t osz:1;
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uint32_t asz:1;
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uint32_t lock:1;
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uint32_t f3:1;
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uint32_t f2:1;
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uint32_t last_f2f3:2; /* 2 or 3 */
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/* The vex bit is set for c4/c5 VEX and EVEX. */
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uint32_t vex:1;
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/* The REX.R and REX.W bits in REX, VEX, or EVEX. */
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uint32_t rex_r:1;
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uint32_t rex_w:1;
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} s;
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uint32_t i;
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} u;
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uint8_t imm1_bytes; /* # of bytes in 1st immediate */
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uint8_t imm2_bytes; /* # of bytes in 2nd immediate */
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uint8_t disp_bytes; /* # of displacement bytes */
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uint8_t modrm_byte;
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/* 5b but valid values= 0,1,2,3 could be in bit union */
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uint8_t map;
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uint8_t rex; /* 0b0100wrxb */
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uint8_t nominal_opcode;
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uint8_t disp_pos;
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/* imm_pos can be derived from disp_pos + disp_bytes. */
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};
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static inline pti_map_enum_t pti_get_map(const struct pt_ild *ild)
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{
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return (pti_map_enum_t) ild->map;
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}
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static inline uint8_t pti_get_modrm_mod(const struct pt_ild *ild)
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{
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return ild->modrm_byte >> 6;
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}
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static inline uint8_t pti_get_modrm_reg(const struct pt_ild *ild)
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{
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return (ild->modrm_byte >> 3) & 7;
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}
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static inline uint8_t pti_get_modrm_rm(const struct pt_ild *ild)
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{
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return ild->modrm_byte & 7;
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}
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/* MAIN ENTRANCE POINTS */
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/* one time call. not thread safe init. call when single threaded. */
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extern void pt_ild_init(void);
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/* all decoding is multithread safe. */
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/* Decode one instruction.
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*
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* Input:
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*
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* @insn->ip: the virtual address of the instruction
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* @insn->raw: the memory at that virtual address
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* @insn->size: the maximal size of the instruction
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* @insn->mode: the execution mode
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*
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* Output:
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*
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* @insn->size: the actual size of the instruction
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* @insn->iclass: a coarse classification
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*
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* @iext->iclass: a finer grain classification
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* @iext->variant: instruction class dependent information
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*
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* Returns zero on success, a negative error code otherwise.
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*/
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extern int pt_ild_decode(struct pt_insn *insn, struct pt_insn_ext *iext);
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#endif /* PT_ILD_H */
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