d5157b7469
- Implement proper combined mode decoding for Intel controllers to properly identify SATA and PATA channels and associate ATA channels with SATA ports. This fixes wrong reporting and in some cases hard resets to wrong SATA ports. - Improve SATA registers support to handle hot-plug events and potentially interface errors. For ICH5/6300ESB chipsets these registers accessible via PCI config space. For later ones they may be accessible via PCI BAR(5). - For controllers not generating interrupts on hot-plug events, implement periodic status polling. Use it to detect hot-plug on Intel and VIA controllers. Same probably could also be used for Serverworks and SIS.
928 lines
24 KiB
C
928 lines
24 KiB
C
/*-
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* Copyright (c) 1998 - 2008 Søren Schmidt <sos@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification, immediately at the beginning of the file.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_ata.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/ata.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/malloc.h>
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#include <sys/sema.h>
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#include <sys/taskqueue.h>
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#include <vm/uma.h>
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#include <machine/stdarg.h>
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#include <machine/resource.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/ata/ata-all.h>
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#include <dev/ata/ata-pci.h>
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#include <ata_if.h>
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/* local vars */
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static MALLOC_DEFINE(M_ATAPCI, "ata_pci", "ATA driver PCI");
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/* misc defines */
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#define IOMASK 0xfffffffc
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/*
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* generic PCI ATA device probe
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*/
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int
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ata_pci_probe(device_t dev)
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{
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struct ata_pci_controller *ctlr = device_get_softc(dev);
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char buffer[64];
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/* is this a storage class device ? */
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if (pci_get_class(dev) != PCIC_STORAGE)
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return (ENXIO);
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/* is this an IDE/ATA type device ? */
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if (pci_get_subclass(dev) != PCIS_STORAGE_IDE)
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return (ENXIO);
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sprintf(buffer, "%s ATA controller", ata_pcivendor2str(dev));
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device_set_desc_copy(dev, buffer);
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ctlr->chipinit = ata_generic_chipinit;
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/* we are a low priority handler */
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return (BUS_PROBE_GENERIC);
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}
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int
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ata_pci_attach(device_t dev)
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{
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struct ata_pci_controller *ctlr = device_get_softc(dev);
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device_t child;
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u_int32_t cmd;
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int unit;
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/* do chipset specific setups only needed once */
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ctlr->legacy = ata_legacy(dev);
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if (ctlr->legacy || pci_read_config(dev, PCIR_BAR(2), 4) & IOMASK)
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ctlr->channels = 2;
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else
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ctlr->channels = 1;
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ctlr->ichannels = -1;
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ctlr->ch_attach = ata_pci_ch_attach;
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ctlr->ch_detach = ata_pci_ch_detach;
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ctlr->dev = dev;
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/* if needed try to enable busmastering */
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cmd = pci_read_config(dev, PCIR_COMMAND, 2);
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if (!(cmd & PCIM_CMD_BUSMASTEREN)) {
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pci_write_config(dev, PCIR_COMMAND, cmd | PCIM_CMD_BUSMASTEREN, 2);
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cmd = pci_read_config(dev, PCIR_COMMAND, 2);
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}
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/* if busmastering mode "stuck" use it */
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if ((cmd & PCIM_CMD_BUSMASTEREN) == PCIM_CMD_BUSMASTEREN) {
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ctlr->r_type1 = SYS_RES_IOPORT;
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ctlr->r_rid1 = ATA_BMADDR_RID;
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ctlr->r_res1 = bus_alloc_resource_any(dev, ctlr->r_type1, &ctlr->r_rid1,
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RF_ACTIVE);
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}
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if (ctlr->chipinit(dev))
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return ENXIO;
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/* attach all channels on this controller */
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for (unit = 0; unit < ctlr->channels; unit++) {
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if ((ctlr->ichannels & (1 << unit)) == 0)
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continue;
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child = device_add_child(dev, "ata",
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((unit == 0 || unit == 1) && ctlr->legacy) ?
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unit : devclass_find_free_unit(ata_devclass, 2));
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if (child == NULL)
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device_printf(dev, "failed to add ata child device\n");
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else
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device_set_ivars(child, (void *)(intptr_t)unit);
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}
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bus_generic_attach(dev);
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return 0;
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}
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int
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ata_pci_detach(device_t dev)
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{
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struct ata_pci_controller *ctlr = device_get_softc(dev);
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device_t *children;
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int nchildren, i;
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/* detach & delete all children */
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if (!device_get_children(dev, &children, &nchildren)) {
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for (i = 0; i < nchildren; i++)
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device_delete_child(dev, children[i]);
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free(children, M_TEMP);
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}
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if (ctlr->r_irq) {
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bus_teardown_intr(dev, ctlr->r_irq, ctlr->handle);
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bus_release_resource(dev, SYS_RES_IRQ, ctlr->r_irq_rid, ctlr->r_irq);
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if (ctlr->r_irq_rid != ATA_IRQ_RID)
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pci_release_msi(dev);
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}
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if (ctlr->r_res2)
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bus_release_resource(dev, ctlr->r_type2, ctlr->r_rid2, ctlr->r_res2);
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if (ctlr->r_res1)
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bus_release_resource(dev, ctlr->r_type1, ctlr->r_rid1, ctlr->r_res1);
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return 0;
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}
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int
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ata_pci_suspend(device_t dev)
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{
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struct ata_pci_controller *ctlr = device_get_softc(dev);
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int error = 0;
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bus_generic_suspend(dev);
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if (ctlr->suspend)
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error = ctlr->suspend(dev);
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return error;
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}
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int
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ata_pci_resume(device_t dev)
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{
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struct ata_pci_controller *ctlr = device_get_softc(dev);
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int error = 0;
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if (ctlr->resume)
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error = ctlr->resume(dev);
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bus_generic_resume(dev);
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return error;
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}
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int
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ata_pci_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
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{
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return (BUS_READ_IVAR(device_get_parent(dev), dev, which, result));
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}
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int
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ata_pci_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
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{
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return (BUS_WRITE_IVAR(device_get_parent(dev), dev, which, value));
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}
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uint32_t
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ata_pci_read_config(device_t dev, device_t child, int reg, int width)
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{
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return (pci_read_config(dev, reg, width));
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}
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void
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ata_pci_write_config(device_t dev, device_t child, int reg,
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uint32_t val, int width)
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{
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pci_write_config(dev, reg, val, width);
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}
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struct resource *
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ata_pci_alloc_resource(device_t dev, device_t child, int type, int *rid,
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u_long start, u_long end, u_long count, u_int flags)
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{
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struct ata_pci_controller *controller = device_get_softc(dev);
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struct resource *res = NULL;
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if (device_get_devclass(child) == ata_devclass) {
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int unit = ((struct ata_channel *)device_get_softc(child))->unit;
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int myrid;
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if (type == SYS_RES_IOPORT) {
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switch (*rid) {
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case ATA_IOADDR_RID:
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if (controller->legacy) {
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start = (unit ? ATA_SECONDARY : ATA_PRIMARY);
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count = ATA_IOSIZE;
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end = start + count - 1;
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}
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myrid = PCIR_BAR(0) + (unit << 3);
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res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
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SYS_RES_IOPORT, &myrid,
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start, end, count, flags);
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break;
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case ATA_CTLADDR_RID:
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if (controller->legacy) {
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start = (unit ? ATA_SECONDARY : ATA_PRIMARY) +
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ATA_CTLOFFSET;
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count = ATA_CTLIOSIZE;
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end = start + count - 1;
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}
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myrid = PCIR_BAR(1) + (unit << 3);
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res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
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SYS_RES_IOPORT, &myrid,
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start, end, count, flags);
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break;
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}
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}
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if (type == SYS_RES_IRQ && *rid == ATA_IRQ_RID) {
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if (controller->legacy) {
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int irq = (unit == 0 ? 14 : 15);
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res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
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SYS_RES_IRQ, rid, irq, irq, 1, flags);
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} else
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res = controller->r_irq;
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}
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} else {
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if (type == SYS_RES_IRQ) {
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if (*rid != ATA_IRQ_RID)
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return (NULL);
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res = controller->r_irq;
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} else {
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res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
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type, rid, start, end, count, flags);
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}
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}
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return (res);
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}
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int
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ata_pci_release_resource(device_t dev, device_t child, int type, int rid,
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struct resource *r)
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{
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if (device_get_devclass(child) == ata_devclass) {
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struct ata_pci_controller *controller = device_get_softc(dev);
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int unit = ((struct ata_channel *)device_get_softc(child))->unit;
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if (type == SYS_RES_IOPORT) {
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switch (rid) {
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case ATA_IOADDR_RID:
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return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
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SYS_RES_IOPORT,
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PCIR_BAR(0) + (unit << 3), r);
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case ATA_CTLADDR_RID:
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return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
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SYS_RES_IOPORT,
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PCIR_BAR(1) + (unit << 3), r);
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default:
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return ENOENT;
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}
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}
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if (type == SYS_RES_IRQ) {
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if (rid != ATA_IRQ_RID)
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return ENOENT;
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if (controller->legacy) {
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return BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
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SYS_RES_IRQ, rid, r);
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} else
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return 0;
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}
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} else {
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if (type == SYS_RES_IRQ) {
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if (rid != ATA_IRQ_RID)
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return (ENOENT);
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return (0);
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} else {
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return (BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
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type, rid, r));
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}
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}
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return (EINVAL);
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}
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int
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ata_pci_setup_intr(device_t dev, device_t child, struct resource *irq,
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int flags, driver_filter_t *filter, driver_intr_t *function,
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void *argument, void **cookiep)
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{
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struct ata_pci_controller *controller = device_get_softc(dev);
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if (controller->legacy) {
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return BUS_SETUP_INTR(device_get_parent(dev), child, irq,
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flags, filter, function, argument, cookiep);
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} else {
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struct ata_pci_controller *controller = device_get_softc(dev);
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int unit;
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if (filter != NULL) {
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printf("ata-pci.c: we cannot use a filter here\n");
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return (EINVAL);
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}
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if (device_get_devclass(child) == ata_devclass)
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unit = ((struct ata_channel *)device_get_softc(child))->unit;
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else
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unit = ATA_PCI_MAX_CH - 1;
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controller->interrupt[unit].function = function;
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controller->interrupt[unit].argument = argument;
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*cookiep = controller;
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return 0;
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}
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}
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int
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ata_pci_teardown_intr(device_t dev, device_t child, struct resource *irq,
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void *cookie)
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{
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struct ata_pci_controller *controller = device_get_softc(dev);
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if (controller->legacy) {
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return BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, cookie);
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} else {
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struct ata_pci_controller *controller = device_get_softc(dev);
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int unit;
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if (device_get_devclass(child) == ata_devclass)
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unit = ((struct ata_channel *)device_get_softc(child))->unit;
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else
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unit = ATA_PCI_MAX_CH - 1;
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controller->interrupt[unit].function = NULL;
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controller->interrupt[unit].argument = NULL;
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return 0;
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}
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}
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int
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ata_generic_setmode(device_t dev, int target, int mode)
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{
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return (min(mode, ATA_UDMA2));
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}
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|
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int
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ata_generic_chipinit(device_t dev)
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{
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struct ata_pci_controller *ctlr = device_get_softc(dev);
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if (ata_setup_interrupt(dev, ata_generic_intr))
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return ENXIO;
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ctlr->setmode = ata_generic_setmode;
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return 0;
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}
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|
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int
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ata_pci_ch_attach(device_t dev)
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{
|
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struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
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struct ata_channel *ch = device_get_softc(dev);
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struct resource *io = NULL, *ctlio = NULL;
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int i, rid;
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rid = ATA_IOADDR_RID;
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if (!(io = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, RF_ACTIVE)))
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return ENXIO;
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rid = ATA_CTLADDR_RID;
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if (!(ctlio = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid,RF_ACTIVE))){
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bus_release_resource(dev, SYS_RES_IOPORT, ATA_IOADDR_RID, io);
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return ENXIO;
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}
|
|
|
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ata_pci_dmainit(dev);
|
|
|
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for (i = ATA_DATA; i <= ATA_COMMAND; i ++) {
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ch->r_io[i].res = io;
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ch->r_io[i].offset = i;
|
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}
|
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ch->r_io[ATA_CONTROL].res = ctlio;
|
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ch->r_io[ATA_CONTROL].offset = ctlr->legacy ? 0 : 2;
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ch->r_io[ATA_IDX_ADDR].res = io;
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ata_default_registers(dev);
|
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if (ctlr->r_res1) {
|
|
for (i = ATA_BMCMD_PORT; i <= ATA_BMDTP_PORT; i++) {
|
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ch->r_io[i].res = ctlr->r_res1;
|
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ch->r_io[i].offset = (i - ATA_BMCMD_PORT) + (ch->unit*ATA_BMIOSIZE);
|
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}
|
|
}
|
|
|
|
ata_pci_hw(dev);
|
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return 0;
|
|
}
|
|
|
|
int
|
|
ata_pci_ch_detach(device_t dev)
|
|
{
|
|
struct ata_channel *ch = device_get_softc(dev);
|
|
|
|
ata_pci_dmafini(dev);
|
|
|
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bus_release_resource(dev, SYS_RES_IOPORT, ATA_CTLADDR_RID,
|
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ch->r_io[ATA_CONTROL].res);
|
|
bus_release_resource(dev, SYS_RES_IOPORT, ATA_IOADDR_RID,
|
|
ch->r_io[ATA_IDX_ADDR].res);
|
|
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
ata_pci_status(device_t dev)
|
|
{
|
|
struct ata_pci_controller *controller =
|
|
device_get_softc(device_get_parent(dev));
|
|
struct ata_channel *ch = device_get_softc(dev);
|
|
|
|
if ((dumping || !controller->legacy) &&
|
|
((ch->flags & ATA_ALWAYS_DMASTAT) ||
|
|
(ch->dma.flags & ATA_DMA_ACTIVE))) {
|
|
int bmstat = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
|
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|
|
if ((bmstat & ATA_BMSTAT_INTERRUPT) == 0)
|
|
return 0;
|
|
ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, bmstat & ~ATA_BMSTAT_ERROR);
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|
DELAY(1);
|
|
}
|
|
if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) {
|
|
DELAY(100);
|
|
if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY)
|
|
return 0;
|
|
}
|
|
return 1;
|
|
}
|
|
|
|
void
|
|
ata_pci_hw(device_t dev)
|
|
{
|
|
struct ata_channel *ch = device_get_softc(dev);
|
|
|
|
ata_generic_hw(dev);
|
|
ch->hw.status = ata_pci_status;
|
|
}
|
|
|
|
static int
|
|
ata_pci_dmastart(struct ata_request *request)
|
|
{
|
|
struct ata_channel *ch = device_get_softc(request->parent);
|
|
|
|
ATA_DEBUG_RQ(request, "dmastart");
|
|
|
|
ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) |
|
|
(ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR)));
|
|
ATA_IDX_OUTL(ch, ATA_BMDTP_PORT, request->dma->sg_bus);
|
|
ch->dma.flags |= ATA_DMA_ACTIVE;
|
|
ATA_IDX_OUTB(ch, ATA_BMCMD_PORT,
|
|
(ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_WRITE_READ) |
|
|
((request->flags & ATA_R_READ) ? ATA_BMCMD_WRITE_READ : 0)|
|
|
ATA_BMCMD_START_STOP);
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
ata_pci_dmastop(struct ata_request *request)
|
|
{
|
|
struct ata_channel *ch = device_get_softc(request->parent);
|
|
int error;
|
|
|
|
ATA_DEBUG_RQ(request, "dmastop");
|
|
|
|
ATA_IDX_OUTB(ch, ATA_BMCMD_PORT,
|
|
ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
|
|
ch->dma.flags &= ~ATA_DMA_ACTIVE;
|
|
error = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
|
|
ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR);
|
|
return error;
|
|
}
|
|
|
|
static void
|
|
ata_pci_dmareset(device_t dev)
|
|
{
|
|
struct ata_channel *ch = device_get_softc(dev);
|
|
struct ata_request *request;
|
|
|
|
ATA_IDX_OUTB(ch, ATA_BMCMD_PORT,
|
|
ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
|
|
ch->dma.flags &= ~ATA_DMA_ACTIVE;
|
|
ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR);
|
|
if ((request = ch->running)) {
|
|
device_printf(dev, "DMA reset calling unload\n");
|
|
ch->dma.unload(request);
|
|
}
|
|
}
|
|
|
|
void
|
|
ata_pci_dmainit(device_t dev)
|
|
{
|
|
struct ata_channel *ch = device_get_softc(dev);
|
|
|
|
ata_dmainit(dev);
|
|
ch->dma.start = ata_pci_dmastart;
|
|
ch->dma.stop = ata_pci_dmastop;
|
|
ch->dma.reset = ata_pci_dmareset;
|
|
}
|
|
|
|
void
|
|
ata_pci_dmafini(device_t dev)
|
|
{
|
|
|
|
ata_dmafini(dev);
|
|
}
|
|
|
|
int
|
|
ata_pci_child_location_str(device_t dev, device_t child, char *buf,
|
|
size_t buflen)
|
|
{
|
|
|
|
snprintf(buf, buflen, "channel=%d",
|
|
(int)(intptr_t)device_get_ivars(child));
|
|
return (0);
|
|
}
|
|
|
|
static device_method_t ata_pci_methods[] = {
|
|
/* device interface */
|
|
DEVMETHOD(device_probe, ata_pci_probe),
|
|
DEVMETHOD(device_attach, ata_pci_attach),
|
|
DEVMETHOD(device_detach, ata_pci_detach),
|
|
DEVMETHOD(device_suspend, ata_pci_suspend),
|
|
DEVMETHOD(device_resume, ata_pci_resume),
|
|
DEVMETHOD(device_shutdown, bus_generic_shutdown),
|
|
|
|
/* bus methods */
|
|
DEVMETHOD(bus_read_ivar, ata_pci_read_ivar),
|
|
DEVMETHOD(bus_write_ivar, ata_pci_write_ivar),
|
|
DEVMETHOD(bus_alloc_resource, ata_pci_alloc_resource),
|
|
DEVMETHOD(bus_release_resource, ata_pci_release_resource),
|
|
DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
|
|
DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
|
|
DEVMETHOD(bus_setup_intr, ata_pci_setup_intr),
|
|
DEVMETHOD(bus_teardown_intr, ata_pci_teardown_intr),
|
|
DEVMETHOD(pci_read_config, ata_pci_read_config),
|
|
DEVMETHOD(pci_write_config, ata_pci_write_config),
|
|
DEVMETHOD(bus_child_location_str, ata_pci_child_location_str),
|
|
|
|
{ 0, 0 }
|
|
};
|
|
|
|
devclass_t ata_pci_devclass;
|
|
|
|
static driver_t ata_pci_driver = {
|
|
"atapci",
|
|
ata_pci_methods,
|
|
sizeof(struct ata_pci_controller),
|
|
};
|
|
|
|
DRIVER_MODULE(atapci, pci, ata_pci_driver, ata_pci_devclass, 0, 0);
|
|
MODULE_VERSION(atapci, 1);
|
|
MODULE_DEPEND(atapci, ata, 1, 1, 1);
|
|
|
|
static int
|
|
ata_pcichannel_probe(device_t dev)
|
|
{
|
|
char buffer[32];
|
|
|
|
if ((intptr_t)device_get_ivars(dev) < 0)
|
|
return (ENXIO);
|
|
sprintf(buffer, "ATA channel %d", (int)(intptr_t)device_get_ivars(dev));
|
|
device_set_desc_copy(dev, buffer);
|
|
|
|
return ata_probe(dev);
|
|
}
|
|
|
|
static int
|
|
ata_pcichannel_attach(device_t dev)
|
|
{
|
|
struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
|
|
struct ata_channel *ch = device_get_softc(dev);
|
|
int error;
|
|
|
|
if (ch->attached)
|
|
return (0);
|
|
ch->attached = 1;
|
|
|
|
ch->dev = dev;
|
|
ch->unit = (intptr_t)device_get_ivars(dev);
|
|
|
|
resource_int_value(device_get_name(dev),
|
|
device_get_unit(dev), "pm_level", &ch->pm_level);
|
|
|
|
if ((error = ctlr->ch_attach(dev)))
|
|
return error;
|
|
|
|
return ata_attach(dev);
|
|
}
|
|
|
|
static int
|
|
ata_pcichannel_detach(device_t dev)
|
|
{
|
|
struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
|
|
struct ata_channel *ch = device_get_softc(dev);
|
|
int error;
|
|
|
|
if (!ch->attached)
|
|
return (0);
|
|
ch->attached = 0;
|
|
|
|
if ((error = ata_detach(dev)))
|
|
return error;
|
|
|
|
if (ctlr->ch_detach)
|
|
return (ctlr->ch_detach(dev));
|
|
|
|
return (0);
|
|
}
|
|
static int
|
|
ata_pcichannel_suspend(device_t dev)
|
|
{
|
|
struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
|
|
struct ata_channel *ch = device_get_softc(dev);
|
|
int error;
|
|
|
|
if (!ch->attached)
|
|
return (0);
|
|
|
|
if ((error = ata_suspend(dev)))
|
|
return (error);
|
|
|
|
if (ctlr->ch_suspend != NULL && (error = ctlr->ch_suspend(dev)))
|
|
return (error);
|
|
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
ata_pcichannel_resume(device_t dev)
|
|
{
|
|
struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
|
|
struct ata_channel *ch = device_get_softc(dev);
|
|
int error;
|
|
|
|
if (!ch->attached)
|
|
return (0);
|
|
|
|
if (ctlr->ch_resume != NULL && (error = ctlr->ch_resume(dev)))
|
|
return (error);
|
|
|
|
return ata_resume(dev);
|
|
}
|
|
|
|
|
|
static int
|
|
ata_pcichannel_locking(device_t dev, int mode)
|
|
{
|
|
struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
|
|
struct ata_channel *ch = device_get_softc(dev);
|
|
|
|
if (ctlr->locking)
|
|
return ctlr->locking(dev, mode);
|
|
else
|
|
return ch->unit;
|
|
}
|
|
|
|
static void
|
|
ata_pcichannel_reset(device_t dev)
|
|
{
|
|
struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
|
|
struct ata_channel *ch = device_get_softc(dev);
|
|
|
|
/* if DMA engine present reset it */
|
|
if (ch->dma.reset)
|
|
ch->dma.reset(dev);
|
|
|
|
/* reset the controller HW */
|
|
if (ctlr->reset)
|
|
ctlr->reset(dev);
|
|
else
|
|
ata_generic_reset(dev);
|
|
}
|
|
|
|
static int
|
|
ata_pcichannel_setmode(device_t dev, int target, int mode)
|
|
{
|
|
struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
|
|
|
|
if (ctlr->setmode)
|
|
return (ctlr->setmode(dev, target, mode));
|
|
else
|
|
return (ata_generic_setmode(dev, target, mode));
|
|
}
|
|
|
|
static int
|
|
ata_pcichannel_getrev(device_t dev, int target)
|
|
{
|
|
struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
|
|
struct ata_channel *ch = device_get_softc(dev);
|
|
|
|
if (ch->flags & ATA_SATA) {
|
|
if (ctlr->getrev)
|
|
return (ctlr->getrev(dev, target));
|
|
else
|
|
return (0xff);
|
|
} else
|
|
return (0);
|
|
}
|
|
|
|
static device_method_t ata_pcichannel_methods[] = {
|
|
/* device interface */
|
|
DEVMETHOD(device_probe, ata_pcichannel_probe),
|
|
DEVMETHOD(device_attach, ata_pcichannel_attach),
|
|
DEVMETHOD(device_detach, ata_pcichannel_detach),
|
|
DEVMETHOD(device_shutdown, bus_generic_shutdown),
|
|
DEVMETHOD(device_suspend, ata_pcichannel_suspend),
|
|
DEVMETHOD(device_resume, ata_pcichannel_resume),
|
|
|
|
/* ATA methods */
|
|
DEVMETHOD(ata_setmode, ata_pcichannel_setmode),
|
|
DEVMETHOD(ata_getrev, ata_pcichannel_getrev),
|
|
DEVMETHOD(ata_locking, ata_pcichannel_locking),
|
|
DEVMETHOD(ata_reset, ata_pcichannel_reset),
|
|
|
|
{ 0, 0 }
|
|
};
|
|
|
|
driver_t ata_pcichannel_driver = {
|
|
"ata",
|
|
ata_pcichannel_methods,
|
|
sizeof(struct ata_channel),
|
|
};
|
|
|
|
DRIVER_MODULE(ata, atapci, ata_pcichannel_driver, ata_devclass, 0, 0);
|
|
|
|
|
|
/*
|
|
* misc support fucntions
|
|
*/
|
|
int
|
|
ata_legacy(device_t dev)
|
|
{
|
|
return (((pci_read_config(dev, PCIR_SUBCLASS, 1) == PCIS_STORAGE_IDE) &&
|
|
(pci_read_config(dev, PCIR_PROGIF, 1)&PCIP_STORAGE_IDE_MASTERDEV)&&
|
|
((pci_read_config(dev, PCIR_PROGIF, 1) &
|
|
(PCIP_STORAGE_IDE_MODEPRIM | PCIP_STORAGE_IDE_MODESEC)) !=
|
|
(PCIP_STORAGE_IDE_MODEPRIM | PCIP_STORAGE_IDE_MODESEC))) ||
|
|
(!pci_read_config(dev, PCIR_BAR(0), 4) &&
|
|
!pci_read_config(dev, PCIR_BAR(1), 4) &&
|
|
!pci_read_config(dev, PCIR_BAR(2), 4) &&
|
|
!pci_read_config(dev, PCIR_BAR(3), 4) &&
|
|
!pci_read_config(dev, PCIR_BAR(5), 4)));
|
|
}
|
|
|
|
void
|
|
ata_generic_intr(void *data)
|
|
{
|
|
struct ata_pci_controller *ctlr = data;
|
|
struct ata_channel *ch;
|
|
int unit;
|
|
|
|
for (unit = 0; unit < ATA_PCI_MAX_CH; unit++) {
|
|
if ((ch = ctlr->interrupt[unit].argument))
|
|
ctlr->interrupt[unit].function(ch);
|
|
}
|
|
}
|
|
|
|
int
|
|
ata_setup_interrupt(device_t dev, void *intr_func)
|
|
{
|
|
struct ata_pci_controller *ctlr = device_get_softc(dev);
|
|
int i, msi = 0;
|
|
|
|
if (!ctlr->legacy) {
|
|
if (resource_int_value(device_get_name(dev),
|
|
device_get_unit(dev), "msi", &i) == 0 && i != 0)
|
|
msi = 1;
|
|
if (msi && pci_msi_count(dev) > 0 && pci_alloc_msi(dev, &msi) == 0) {
|
|
ctlr->r_irq_rid = 0x1;
|
|
} else {
|
|
msi = 0;
|
|
ctlr->r_irq_rid = ATA_IRQ_RID;
|
|
}
|
|
if (!(ctlr->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ,
|
|
&ctlr->r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) {
|
|
device_printf(dev, "unable to map interrupt\n");
|
|
if (msi)
|
|
pci_release_msi(dev);
|
|
return ENXIO;
|
|
}
|
|
if ((bus_setup_intr(dev, ctlr->r_irq, ATA_INTR_FLAGS, NULL,
|
|
intr_func, ctlr, &ctlr->handle))) {
|
|
device_printf(dev, "unable to setup interrupt\n");
|
|
bus_release_resource(dev,
|
|
SYS_RES_IRQ, ctlr->r_irq_rid, ctlr->r_irq);
|
|
if (msi)
|
|
pci_release_msi(dev);
|
|
return ENXIO;
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
void
|
|
ata_set_desc(device_t dev)
|
|
{
|
|
struct ata_pci_controller *ctlr = device_get_softc(dev);
|
|
char buffer[128];
|
|
|
|
sprintf(buffer, "%s %s %s controller",
|
|
ata_pcivendor2str(dev), ctlr->chip->text,
|
|
ata_mode2str(ctlr->chip->max_dma));
|
|
device_set_desc_copy(dev, buffer);
|
|
}
|
|
|
|
struct ata_chip_id *
|
|
ata_match_chip(device_t dev, struct ata_chip_id *index)
|
|
{
|
|
uint32_t devid;
|
|
uint8_t revid;
|
|
|
|
devid = pci_get_devid(dev);
|
|
revid = pci_get_revid(dev);
|
|
while (index->chipid != 0) {
|
|
if (devid == index->chipid && revid >= index->chiprev)
|
|
return (index);
|
|
index++;
|
|
}
|
|
return (NULL);
|
|
}
|
|
|
|
struct ata_chip_id *
|
|
ata_find_chip(device_t dev, struct ata_chip_id *index, int slot)
|
|
{
|
|
struct ata_chip_id *idx;
|
|
device_t *children;
|
|
int nchildren, i;
|
|
uint8_t s;
|
|
|
|
if (device_get_children(device_get_parent(dev), &children, &nchildren))
|
|
return (NULL);
|
|
|
|
for (i = 0; i < nchildren; i++) {
|
|
s = pci_get_slot(children[i]);
|
|
if ((slot >= 0 && s == slot) || (slot < 0 && s <= -slot)) {
|
|
idx = ata_match_chip(children[i], index);
|
|
if (idx != NULL) {
|
|
free(children, M_TEMP);
|
|
return (idx);
|
|
}
|
|
}
|
|
}
|
|
free(children, M_TEMP);
|
|
return (NULL);
|
|
}
|
|
|
|
char *
|
|
ata_pcivendor2str(device_t dev)
|
|
{
|
|
switch (pci_get_vendor(dev)) {
|
|
case ATA_ACARD_ID: return "Acard";
|
|
case ATA_ACER_LABS_ID: return "AcerLabs";
|
|
case ATA_AMD_ID: return "AMD";
|
|
case ATA_ADAPTEC_ID: return "Adaptec";
|
|
case ATA_ATI_ID: return "ATI";
|
|
case ATA_CYRIX_ID: return "Cyrix";
|
|
case ATA_CYPRESS_ID: return "Cypress";
|
|
case ATA_HIGHPOINT_ID: return "HighPoint";
|
|
case ATA_INTEL_ID: return "Intel";
|
|
case ATA_ITE_ID: return "ITE";
|
|
case ATA_JMICRON_ID: return "JMicron";
|
|
case ATA_MARVELL_ID: return "Marvell";
|
|
case ATA_MARVELL2_ID: return "Marvell";
|
|
case ATA_NATIONAL_ID: return "National";
|
|
case ATA_NETCELL_ID: return "Netcell";
|
|
case ATA_NVIDIA_ID: return "nVidia";
|
|
case ATA_PROMISE_ID: return "Promise";
|
|
case ATA_SERVERWORKS_ID: return "ServerWorks";
|
|
case ATA_SILICON_IMAGE_ID: return "SiI";
|
|
case ATA_SIS_ID: return "SiS";
|
|
case ATA_VIA_ID: return "VIA";
|
|
case ATA_CENATEK_ID: return "Cenatek";
|
|
case ATA_MICRON_ID: return "Micron";
|
|
default: return "Generic";
|
|
}
|
|
}
|
|
|
|
int
|
|
ata_mode2idx(int mode)
|
|
{
|
|
if ((mode & ATA_DMA_MASK) == ATA_UDMA0)
|
|
return (mode & ATA_MODE_MASK) + 8;
|
|
if ((mode & ATA_DMA_MASK) == ATA_WDMA0)
|
|
return (mode & ATA_MODE_MASK) + 5;
|
|
return (mode & ATA_MODE_MASK) - ATA_PIO0;
|
|
}
|
|
|