actually 16 I/O lines but the other ones are used for system devices and
interrupts.
The IXP4XX platform can set interrupts on these pins for
high/low/rising/falling/transitional but this is not implemented yet.
The Cambria has the same interface but as all the pins are assigned to system
functions the gpio header is toggled via a PLD on the i2c bus and is not
supported by this commit.