f8af716b04
The current resolution of the Xen PV clock is too high, which causes an adjustment of 5s to be applied to it. Reduce the resolution to be the same as the RTC plus one, so it's always selected as the best source when available on x86. Also don't reset the clock on resume, it's pointless and discards any previous adjustments. Sponsoted by: Citrix Systems R&D |
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timer.c | ||
timer.h |