00ff5de585
neither DEFAULT_RCLK * 2 nor DEFAULT_RCLK * 10 but plain DEFAULT_RCLK and there's no (open) source indicating otherwise. This was tested with an EXSYS EX-41098-2, whose clock is not configurable and identifies as: puc0@pci0:5:1:0: class=0x070200 card=0x06711415 chip=0x95381415 rev=0x01 hdr=0x00 vendor = 'Oxford Semiconductor Ltd' class = simple comms subclass = multiport serial Note that this exactly matches the card mentioned in PR 129665 so no sub-device/sub-vendor based quirking of the latter is possible. So maybe we should grow some sort of tunable, in case non-default cards such as the latter aren't configurable either (this also wouldn't be the first time an allegedly tested commit turns out to be wrong though). - Make the TiMedia tables const. MFC after: 1 week |
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.. | ||
puc_bfe.h | ||
puc_bus.h | ||
puc_cfg.c | ||
puc_cfg.h | ||
puc_pccard.c | ||
puc_pci.c | ||
puc.c | ||
pucdata.c |