e3d4e68217
some of the IPI mechanisms used by the common MIPS SMP code so we could use the multicast IPI facilities, on GXemul as well as on several real hardware platforms, and the ability to have multiple hard IPI types.
56 lines
2.2 KiB
C
56 lines
2.2 KiB
C
/*-
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* Copyright (c) 2004-2012 Juli Mallett <jmallett@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MIPS_GXEMUL_MPREG_H_
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#define _MIPS_GXEMUL_MPREG_H_
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#define GXEMUL_MP_DEV_BASE 0x11000000
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#define GXEMUL_MP_DEV_WHOAMI 0x0000
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#define GXEMUL_MP_DEV_NCPUS 0x0010
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#define GXEMUL_MP_DEV_START 0x0020
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#define GXEMUL_MP_DEV_STARTADDR 0x0030
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#define GXEMUL_MP_DEV_STACK 0x0070
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#define GXEMUL_MP_DEV_RANDOM 0x0080
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#define GXEMUL_MP_DEV_MEMORY 0x0090
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#define GXEMUL_MP_DEV_IPI_ONE 0x00a0
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#define GXEMUL_MP_DEV_IPI_MANY 0x00b0
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#define GXEMUL_MP_DEV_IPI_READ 0x00c0
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#define GXEMUL_MP_DEV_CYCLES 0x00d0
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#define GXEMUL_MP_DEV_FUNCTION(f) \
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(volatile uint64_t *)MIPS_PHYS_TO_DIRECT_UNCACHED(GXEMUL_MP_DEV_BASE + (f))
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#define GXEMUL_MP_DEV_READ(f) \
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(volatile uint64_t)*GXEMUL_MP_DEV_FUNCTION(f)
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#define GXEMUL_MP_DEV_WRITE(f, v) \
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*GXEMUL_MP_DEV_FUNCTION(f) = (v)
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#define GXEMUL_MP_DEV_IPI_INTERRUPT (6)
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#endif /* !_MIPS_GXEMUL_MPREG_H */
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