490 lines
13 KiB
C
490 lines
13 KiB
C
/***********************************************************************
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*
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* Module: ttime_api.h
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*
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* Author: SIS 1998
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* LM NE&SS 2001
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*
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* Description
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*
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* This header file contains data necessary for the API to the
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* True Time board. This contains all of the structure definitions
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* for the individual registers.
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*
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***********************************************************************/
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#ifndef TTIME_API_H
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#define TTIME_API_H
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#ifdef CPP
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extern "C" {
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#endif
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#include <time.h>
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typedef struct
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{
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unsigned int micro_sec;
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unsigned int milli_sec;
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struct tm gps_tm;
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} gps_time_t;
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typedef struct
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{
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unsigned char reserved_1;
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unsigned unit_ms : 4;
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unsigned filler_0 : 4;
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unsigned hun_ms : 4;
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unsigned tens_ms : 4;
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unsigned tens_sec : 4;
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unsigned unit_sec : 4;
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unsigned tens_min : 4;
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unsigned unit_min : 4;
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unsigned tens_hour : 4;
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unsigned unit_hour : 4;
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unsigned tens_day : 4;
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unsigned unit_day : 4;
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unsigned filler_1 : 4;
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unsigned hun_day : 4;
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unsigned tens_year : 4;
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unsigned unit_year : 4;
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unsigned thou_year : 4;
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unsigned hun_year : 4;
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unsigned char reserved_2[2];
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} preset_time_reg_t;
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typedef struct
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{
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unsigned n_d0 : 2;
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unsigned antenna_short_stat : 1; /* 0 = fault */
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unsigned antenna_open_stat : 1; /* 0 = fault */
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unsigned n_d1 : 1;
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unsigned rate_gen_pulse_stat : 1;
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unsigned time_cmp_pulse_stat : 1;
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unsigned ext_event_stat : 1;
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} hw_stat_reg_t;
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typedef struct
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{
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unsigned tens_us : 4;
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unsigned unit_us : 4;
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unsigned unit_ms : 4;
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unsigned hun_us : 4;
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unsigned char hw_stat; /* hw_stat_reg_t hw_stat; */
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unsigned char reserved_3;
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unsigned hun_ms : 4;
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unsigned tens_ms : 4;
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unsigned tens_sec : 4;
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unsigned unit_sec : 4;
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unsigned tens_min : 4;
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unsigned unit_min : 4;
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unsigned tens_hour : 4;
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unsigned unit_hour : 4;
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unsigned tens_day : 4;
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unsigned unit_day : 4;
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unsigned status : 4;
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unsigned hun_day : 4;
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unsigned tens_year : 4;
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unsigned unit_year : 4;
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unsigned thou_year : 4;
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unsigned hun_year : 4;
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} time_freeze_reg_t;
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typedef struct
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{
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unsigned char off_low;
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unsigned char off_high;
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unsigned char reserved_4[2];
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} sync_gen_off_reg_t;
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typedef struct
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{
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unsigned tens_min : 4;
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unsigned unit_min : 4;
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unsigned tens_hour : 4;
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unsigned unit_hour : 4;
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unsigned char sign_ascii; /* '+' or '-' */
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unsigned char reserved_5;
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} local_off_t;
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/*
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* This structure can be used for both the position freeze
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* and position preset registers.
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*/
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typedef struct
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{
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unsigned lat_tens_degee : 4;
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unsigned lat_unit_degee : 4;
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unsigned filler_0 : 4;
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unsigned lat_hun_degree : 4;
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unsigned lat_tens_min : 4;
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unsigned lat_unit_min : 4;
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unsigned char lat_north_south; /* 'N' or 'S' */
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unsigned filler_1 : 4;
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unsigned lat_tenth_sec : 4;
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unsigned lat_tens_sec : 4;
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unsigned lat_unit_sec : 4;
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unsigned long_tens_degree : 4;
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unsigned long_unit_degree : 4;
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unsigned filler_2 : 4;
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unsigned long_hun_degree : 4;
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unsigned long_tens_min : 4;
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unsigned long_unit_min : 4;
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unsigned char long_east_west; /* 'E' or 'W' */
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unsigned filler_3 : 4;
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unsigned long_tenth_sec : 4;
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unsigned long_tens_sec : 4;
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unsigned long_unit_sec : 4;
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unsigned elv_tens_km : 4;
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unsigned elv_unit_km : 4;
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unsigned char elv_sign; /* '+' or '-' */
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unsigned elv_unit_m : 4;
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unsigned elv_tenth_m : 4;
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unsigned elv_hun_m : 4;
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unsigned elv_tens_m : 4;
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} pos_reg_t;
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typedef struct
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{
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unsigned char prn1_tens_units;
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unsigned char prn1_reserved;
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unsigned char lvl1_tenths_hundredths;
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unsigned char lvl1_tens_units;
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unsigned char prn2_tens_units;
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unsigned char prn2_reserved;
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unsigned char lvl2_tenths_hundredths;
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unsigned char lvl2_tens_units;
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unsigned char prn3_tens_units;
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unsigned char prn3_reserved;
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unsigned char lvl3_tenths_hundredths;
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unsigned char lvl3_tens_units;
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unsigned char prn4_tens_units;
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unsigned char prn4_reserved;
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unsigned char lvl4_tenths_hundredths;
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unsigned char lvl4_tens_units;
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unsigned char prn5_tens_units;
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unsigned char prn5_reserved;
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unsigned char lvl5_tenths_hundredths;
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unsigned char lvl5_tens_units;
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unsigned char prn6_tens_units;
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unsigned char prn6_reserved;
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unsigned char lvl6_tenths_hundredths;
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unsigned char lvl6_tens_units;
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unsigned char flag;
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unsigned char reserved[3];
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} sig_levels_t;
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typedef struct
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{
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unsigned tens_us : 4;
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unsigned unit_us : 4;
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unsigned unit_ms : 4;
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unsigned hun_us : 4;
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unsigned hun_ms : 4;
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unsigned tens_ms : 4;
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unsigned tens_sec : 4;
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unsigned unit_sec : 4;
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unsigned tens_min : 4;
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unsigned unit_min : 4;
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unsigned tens_hour : 4;
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unsigned unit_hour : 4;
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unsigned tens_day : 4;
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unsigned unit_day : 4;
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unsigned stat : 4;
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unsigned hun_day : 4;
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unsigned tens_year : 4;
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unsigned unit_year : 4;
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unsigned thou_year : 4;
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unsigned hun_year : 4;
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unsigned char reserved_5[2];
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} ext_time_event_reg_t;
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typedef struct
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{
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unsigned tens_us : 4;
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unsigned unit_us : 4;
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unsigned unit_ms : 4;
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unsigned hun_us : 4;
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unsigned hun_ms : 4;
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unsigned tens_ms : 4;
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unsigned tens_sec : 4;
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unsigned unit_sec : 4;
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unsigned tens_min : 4;
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unsigned unit_min : 4;
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unsigned tens_hour : 4;
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unsigned unit_hour : 4;
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unsigned tens_day : 4;
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unsigned unit_day : 4;
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unsigned mask : 4;
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unsigned hun_day : 4;
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} time_cmp_reg_t;
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typedef struct
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{
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unsigned char err_stat;
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unsigned char no_def;
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unsigned char oscillator_stat[2];
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} diag_reg_t;
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typedef struct
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{
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unsigned res :2;
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unsigned rate_int_mask :1;
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unsigned cmp_int_mask :1;
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unsigned ext_int_mask :1;
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unsigned rate_stat_clr :1;
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unsigned cmp_stat_clr :1;
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unsigned ext_stat_clr :1;
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unsigned char reserved[3];
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} hw_ctl_reg_t;
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typedef struct
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{
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unsigned preset_pos_rdy :1;
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unsigned sel_pps_ref :1;
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unsigned sel_gps_ref :1;
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unsigned sel_time_code :1;
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unsigned gen_stp_run :1;
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unsigned preset_time_rdy :1;
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unsigned dst :1;
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unsigned mode_sel :1;
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unsigned ctl_am_dc :1;
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unsigned reserved :3;
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unsigned input_code :4;
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unsigned char rate_reserved;
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unsigned rate_flag :4;
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unsigned rate_reserved1 :4;
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} conf_reg_t;
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typedef struct
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{
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unsigned char mem_reserved[0xf8];
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hw_ctl_reg_t hw_ctl_reg;
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time_freeze_reg_t time_freeze_reg;
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pos_reg_t pos_freeze_reg;
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conf_reg_t conf_reg;
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diag_reg_t diag_reg;
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local_off_t local_offset;
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sync_gen_off_reg_t sync_gen_offset;
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unsigned char reserved[4];
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unsigned char config_reg2_ctl;
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unsigned char reserved2[11];
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time_cmp_reg_t time_compare_reg;
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unsigned char reserved3[24];
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preset_time_reg_t preset_time_reg;
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pos_reg_t preset_pos_reg;
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ext_time_event_reg_t extern_time_event_reg;
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unsigned char reserved4[24];
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sig_levels_t signal_levels_reg;
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unsigned char reserved5[12];
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} tt_mem_space_t;
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#define TTIME_MEMORY_SIZE 0x200
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/*
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* Defines for register offsets
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*/
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#define HW_CTL_REG 0x0f8
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#define TIME_FREEZE_REG 0x0fc
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#define HW_STAT_REG 0x0fe
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#define POS_FREEZE_REG 0x108
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#define CONFIG_REG_1 0x118
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#define DIAG_REG 0x11c
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#define LOCAL_OFF_REG 0x120
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#define SYNC_GEN_OFF_REG 0x124
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#define CONFIG_REG_2 0x12c
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#define TIME_CMP_REG 0x138
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#define PRESET_TIME_REG 0x158
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#define PRESET_POS_REG 0x164
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#define EXT_EVENT_REG 0x174
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#define SIG_LVL_PRN1 0x198
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#define SIG_LVL_PRN2 0x19c
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#define SIG_LVL_PRN3 0x1a0
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#define SIG_LVL_PRN4 0x1a4
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#define SIG_LVL_PRN5 0x1a8
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#define SIG_LVL_PRN6 0x1ac
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#define SIG_LVL_FLAG 0x1b0
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/*
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* Defines for accessing the hardware status register.
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*/
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#define HW_STAT_ANTENNA_SHORT 0 /* access the antenna short bit */
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#define HW_STAT_ANTENNA_OPEN 1 /* access the antenna open bit */
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#define HW_STAT_RATE_GEN_PULSE_STAT 2 /* access the rate gen pulse bit */
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#define HW_STAT_TIME_CMP_PULSE_STAT 3 /* access the time cmp bit */
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#define HW_STAT_EXT_EVENT_STAT 4 /* access the external event bit */
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/*
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* Defines for accessing the hardware control register
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*/
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#define HW_CTL_RATE_INT_MASK 0 /* access rate generator int mask */
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#define HW_CTL_CMP_INT_MASK 1 /* access compare interrupt mask */
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#define HW_CTL_EXT_INT_MASK 2 /* access external event interrupt mask */
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#define HW_CTL_RATE_GEN_INT_CLEAR 3 /* access rate gen. interrupt clear field */
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#define HW_CTL_TIME_CMP_INT_CLEAR 4 /* access time cmp interrupt clear field */
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#define HW_CTL_EXT_EVENT_INT_CLEAR 5 /* access external event int clear field */
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/*
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* Defines for configuration register bit fields.
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*/
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#define PRESET_POS_RDY_BIT 0 /* access the preset pos. rdy. bit */
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#define SEL_1_PPS_REF_BIT 1 /* access the select 1 pps reference bit */
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#define SEL_GPS_REF_BIT 2 /* access the select gps reference bit */
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#define SEL_TIME_CODE_REF_BIT 3 /* access the select time code reference bit */
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#define GEN_STOP_BIT 4 /* access the generator start/stop bit */
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#define PRESET_TIME_RDY_BIT 5 /* access the preset time ready bit */
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#define DST_BIT 6 /* access the DST bit */
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#define MODE_SEL_BIT 7 /* access the mode select bit */
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#define AM_DC_BIT 8 /* access the code bits AM/DC bit */
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#define IN_CODE_SEL_BIT 9 /* access the input code select bit */
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#define FLAG_BIT 10 /* access the flag bit */
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/*
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* The following defines are used to set modes in the
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* configuration register.
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*/
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#define CONF_SET_AM 0 /* Set code to AM */
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#define CONF_SET_DC 1 /* Set code to DC */
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#define CONF_SET_IRIG_B 0 /* Set code IRIG B */
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#define CONF_SET_IRIG_A 1 /* Set code IRIG A */
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#define CONF_FLAG_DISABLE 0 /* Disable pulse */
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#define CONF_FLAG_10K_PPS 1 /* Set rate to 10k PPS */
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#define CONF_FLAG_1K_PPS 2 /* Set rate to 1k PPS */
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#define CONF_FLAG_100_PPS 3 /* Set rate to 100 PPS */
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#define CONF_FLAG_10_PPS 4 /* Set rate to 10 PPS */
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#define CONF_FLAG_1_PPS 5 /* Set rate to 1 PPS */
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/*
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* Defines for read commands
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*/
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#define TT_RD_FREEZE_REG 0x01
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#define TT_RD_HW_CTL_REG 0x02
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#define TT_RD_CNFG_REG 0x03
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#define TT_RD_DIAG_REG 0x04
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#define TT_RD_LCL_OFFSET 0x05
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#define TT_RD_SYNC_GEN_OFF 0x06
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#define TT_RD_CNFG_REG_2 0x07
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#define TT_RD_TIME_CMP_REG 0x08
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#define TT_RD_PRESET_REG 0x09
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#define TT_RD_EXT_EVNT_REG 0x0a
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#define TT_RD_SIG_LVL_REG 0x0b
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/*
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* Defines for write commands
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*/
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#define TT_WRT_FREEZE_REG 0x0c
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#define TT_WRT_HW_CTL_REG 0x0d
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#define TT_WRT_CNFG_REG 0x0e
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#define TT_WRT_DIAG_REG 0x0f
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#define TT_WRT_LCL_OFFSET 0x10
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#define TT_WRT_SYNC_GEN_OFF 0x11
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#define TT_WRT_CNFG_REG_2 0x12
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#define TT_WRT_TIME_CMP_REG 0x13
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#define TT_WRT_PRESET_REG 0x14
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#define TT_WRT_EXT_EVNT_REG 0x15
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#define TT_WRT_SIG_LVL_REG 0x16
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/*
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* Define the length of the buffers to move (in 32 bit words).
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*/
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#define HW_CTL_REG_LEN 1
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#define CNFG_REG_1_LEN 1
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#define DIAG_REG_LEN 1
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#define LCL_OFFSET_LEN 1
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#define SYNC_GEN_OFF_LEN 1
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#define CNFG_REG_2_LEN 1
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#define TIME_CMP_REG_LEN 2
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#define PRESET_TIME_REG_LEN 3
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#define PRESET_POS_REG_LEN 4
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#define PRESET_REG_LEN (PRESET_TIME_REG_LEN+PRESET_POS_REG_LEN)
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#define TIME_FREEZE_REG_LEN 3
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#define POSN_FREEZE_REG_LEN 4
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#define FREEZE_REG_LEN (TIME_FREEZE_REG_LEN+POSN_FREEZE_REG_LEN)
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#define EXT_EVNT_REG_LEN 3
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#define SIG_LVL_REG_LEN 7
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#define GPS_TIME_LEN 7
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/*
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* Define BCD - INT - BCD macros.
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*/
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#define BCDTOI(a) ( ( ( ( (a) & 0xf0 ) >> 4 ) * 10 ) + ( (a) & 0x0f ) )
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#define ITOBCD(a) ( ( ( ( (a) ) / 10) << 4 ) + ( ( (a) ) % 10) )
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#define LTOBCD(a) ( ( ( ( (uint64_t)(a) ) / 10) << 4 ) + ( ( (uint64_t)(a) ) % 10) )
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extern int init_560 ( );
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extern void close_560 ( );
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extern int write_hw_ctl_reg (hw_ctl_reg_t *);
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extern int write_hw_ctl_reg_bitfield (int, int );
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extern int read_conf_reg (conf_reg_t *);
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extern int read_conf_reg_bitfield (int );
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extern int write_conf_reg (conf_reg_t *);
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extern int write_conf_reg_bitfield (int, unsigned char );
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extern int read_hw_stat_reg_bitfield (int );
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extern int read_local_offset_reg (local_off_t *);
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extern int write_local_offset_reg (local_off_t *);
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extern int read_sync_offset_reg (sync_gen_off_reg_t *);
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extern int write_sync_offset_reg (sync_gen_off_reg_t *);
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extern int read_time_cmp_reg (time_cmp_reg_t *);
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extern int write_time_cmp_reg (time_cmp_reg_t *);
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extern int read_preset_time_reg (preset_time_reg_t *);
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extern int write_preset_time_reg (preset_time_reg_t *);
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extern int reset_time ( );
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extern int set_new_time (preset_time_reg_t *);
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extern int read_preset_position_reg (pos_reg_t *);
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extern int write_preset_position_reg (pos_reg_t *);
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extern int read_external_event_reg (ext_time_event_reg_t *);
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extern int read_signal_level_reg (sig_levels_t *);
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extern int freeze_time ( );
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extern int snapshot_time (time_freeze_reg_t *);
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extern int read_position_freeze_reg (pos_reg_t *);
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extern int read_diag_reg (diag_reg_t *);
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#ifdef CPP
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}
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#endif
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#endif
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