30743982ca
should be easily adapted to SD 2.0 (aka SDHC), SDIO, MMC and MMCplus cards. At the present time, there's only one bridge driver for the ARM9 based Atmel AT91RM9200.
327 lines
10 KiB
C
327 lines
10 KiB
C
/*-
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* Copyright (c) 2006 M. Warner Losh. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef DEV_MMC_MMCREG_H
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#define DEV_MMC_MMCREG_H
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/*
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* This file contains the register definitions for the mmc and sd busses.
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* They are taken from publicly available sources.
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*/
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struct mmc_data;
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struct mmc_request;
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struct mmc_command {
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uint32_t opcode;
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uint32_t arg;
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uint32_t resp[4];
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uint32_t flags; /* Expected responses */
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#define MMC_RSP_PRESENT (1ul << 0) /* Response */
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#define MMC_RSP_136 (1ul << 1) /* 136 bit response */
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#define MMC_RSP_CRC (1ul << 2) /* Expect valid crc */
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#define MMC_RSP_BUSY (1ul << 3) /* Card may send busy */
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#define MMC_RSP_OPCODE (1ul << 4) /* Response include opcode */
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#define MMC_RSP_MASK 0x1ful
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#define MMC_CMD_AC (0ul << 5) /* Addressed Command, no data */
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#define MMC_CMD_ADTC (1ul << 5) /* Addressed Data transfer cmd */
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#define MMC_CMD_BC (2ul << 5) /* Broadcast command, no response */
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#define MMC_CMD_BCR (3ul << 5) /* Broadcast command with response */
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#define MMC_CMD_MASK (3ul << 5)
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/* Possible response types defined in the standard: */
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#define MMC_RSP_NONE (0)
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#define MMC_RSP_R1 (MMC_RSP_PRESENT | MMC_RSP_CRC | MMC_RSP_OPCODE)
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#define MMC_RSP_R1B (MMC_RSP_PRESENT | MMC_RSP_CRC | MMC_RSP_OPCODE | MMC_RSP_BUSY)
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#define MMC_RSP_R2 (MMC_RSP_PRESENT | MMC_RSP_136 | MMC_RSP_CRC)
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#define MMC_RSP_R3 (MMC_RSP_PRESENT)
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#define MMC_RSP_R6 (MMC_RSP_PRESENT | MMC_RSP_CRC)
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/* R7 -- new in sd 2.0 */
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#define MMC_RSP(x) ((x) & MMC_RSP_MASK)
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uint32_t retries;
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uint32_t error;
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#define MMC_ERR_NONE 0
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#define MMC_ERR_TIMEOUT 1
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#define MMC_ERR_BADCRC 2
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#define MMC_ERR_FIFO 3
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#define MMC_ERR_FAILED 4
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#define MMC_ERR_INVALID 5
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#define MMC_ERR_NO_MEMORY 6
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struct mmc_data *data; /* Data segment with cmd */
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struct mmc_request *mrq; /* backpointer to request */
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};
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/*
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* R1 responses
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*
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* Types (per SD 2.0 standard)
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* e : error bit
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* s : status bit
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* r : detected and set for the actual command response
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* x : Detected and set during command execution. The host can get
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* the status by issuing a command with R1 response.
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*
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* Clear Condition (per SD 2.0 standard)
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* a : according to the card current state.
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* b : always related to the previous command. reception of a valid
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* command will clear it (with a delay of one command).
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* c : clear by read
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*/
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#define R1_OUT_OF_RANGE (1u << 31) /* erx, c */
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#define R1_ADDRESS_ERROR (1u << 30) /* erx, c */
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#define R1_BLOCK_LEN_ERROR (1u << 29) /* erx, c */
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#define R1_ERASE_SEQ_ERROR (1u << 28) /* er, c */
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#define R1_ERASE_PARAM (1u << 27) /* erx, c */
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#define R1_WP_VIOLATION (1u << 26) /* erx, c */
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#define R1_CARD_IS_LOCKED (1u << 25) /* sx, a */
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#define R1_LOCK_UNLOCK_FAILED (1u << 24) /* erx, c */
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#define R1_COM_CRC_ERROR (1u << 23) /* er, b */
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#define R1_ILLEGAL_COMMAND (1u << 22) /* er, b */
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#define R1_CARD_ECC_FAILED (1u << 21) /* erx, c */
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#define R1_CC_ERROR (1u << 20) /* erx, c */
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#define R1_ERROR (1u << 19) /* erx, c */
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#define R1_CSD_OVERWRITE (1u << 16) /* erx, c */
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#define R1_WP_ERASE_SKIP (1u << 15) /* erx, c */
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#define R1_CARD_ECC_DISABLED (1u << 14) /* sx, a */
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#define R1_ERASE_RESET (1u << 13) /* sr, c */
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#define R1_CURRENT_STATE_MASK (0xfu << 9) /* sx, b */
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#define R1_READY_FOR_DATA (1u << 8) /* sx, a */
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#define R1_APP_CMD (1u << 5) /* sr, c */
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#define R1_AKE_SEQ_ERROR (1u << 3) /* er, c */
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#define R1_STATUS(x) (x & 0xFFFFE000
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#define R1_CURRENT_STATE(x) ((x) & R1_CURRENT_STATE_MASK) >> 9
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#define R1_STATE_IDLE 0
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#define R1_STATE_READY 1
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#define R1_STATE_IDENT 2
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#define R1_STATE_STBY 3
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#define R1_STATE_TRAN 4
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#define R1_STATE_DATA 5
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#define R1_STATE_RCV 6
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#define R1_STATE_PRG 7
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#define R1_STATE_DIS 8
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struct mmc_data {
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size_t len; /* size of the data */
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size_t xfer_len;
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void *data; /* data buffer */
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uint32_t flags;
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#define MMC_DATA_WRITE (1UL << 0)
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#define MMC_DATA_READ (1UL << 1)
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#define MMC_DATA_STREAM (1UL << 2)
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#define MMC_DATA_MULTI (1UL << 3)
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struct mmc_request *mrq;
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};
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struct mmc_request {
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struct mmc_command *cmd;
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struct mmc_command *stop;
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void (*done)(struct mmc_request *); /* Completion function */
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void *done_data; /* requestor set data */
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uint32_t flags;
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#define MMC_REQ_DONE 1
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};
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/* Command definitions */
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/* Class 0 and 1: Basic commands & read stream commands */
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#define MMC_GO_IDLE_STATE 0
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#define MMC_SEND_OP_COND 1
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#define MMC_ALL_SEND_CID 2
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#define MMC_SET_RELATIVE_ADDR 3
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#define SD_SEND_RELATIVE_ADDR 3
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#define MMC_SET_DSR 4
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/* reserved: 5 */
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#define MMC_SELECT_CARD 7
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#define MMC_DESELECT_CARD 7
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#define MMC_SEND_IF_COND 8
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#define MMC_SEND_CSD 9
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#define MMC_SEND_CID 10
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#define MMC_READ_DAT_UNTIL_STOP 11
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#define MMC_STOP_TRANSMISSION 12
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#define MMC_SEND_STATUS 13
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/* reserved: 14 */
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#define MMC_GO_INACTIVE_STATE 15
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/* Class 2: Block oriented read commands */
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#define MMC_SET_BLOCKLEN 16
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#define MMC_READ_SINGLE_BLOCK 17
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#define MMC_READ_MULTIPLE_BLOCK 18
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/* reserved: 19 */
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/* Class 3: Stream write commands */
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#define MMC_WRITE_DAT_UNTIL_STOP 20
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/* reserved: 21 */
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/* reserved: 22 */
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/* Class 4: Block oriented write commands */
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#define MMC_SET_BLOCK_COUNT 23
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#define MMC_WRITE_BLOCK 24
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#define MMC_WRITE_MULTIPLE_BLOCK 25
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#define MMC_PROGARM_CID 26
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#define MMC_PROGRAM_CSD 27
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/* Class 6: Block oriented write protection commands */
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#define MMC_SET_WRITE_PROT 28
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#define MMC_CLR_WRITE_PROT 29
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#define MMC_SEND_WRITE_PROT 30
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/* reserved: 31 */
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/* Class 5: Erase commands */
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#define SD_ERASE_WR_BLK_START 32
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#define SD_ERASE_WR_BLK_END 33
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/* 34 -- reserved old command */
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#define MMC_ERASE_GROUP_START 35
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#define MMC_ERASE_GROUP_END 36
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/* 37 -- reserved old command */
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#define MMC_ERASE 38
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/* Class 9: I/O mode commands */
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#define MMC_FAST_IO 39
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#define MMC_GO_IRQ_STATE 40
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/* reserved: 41 */
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/* Class 7: Lock card */
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#define MMC_LOCK_UNLOCK 42
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/* reserved: 43 */
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/* reserved: 44 */
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/* reserved: 45 */
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/* reserved: 46 */
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/* reserved: 47 */
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/* reserved: 48 */
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/* reserved: 49 */
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/* reserved: 50 */
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/* reserved: 51 */
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/* reserved: 54 */
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/* Class 8: Application specific commands */
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#define MMC_APP_CMD 55
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#define MMC_GEN_CMD 56
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/* reserved: 57 */
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/* reserved: 58 */
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/* reserved: 59 */
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/* reserved for mfg: 60 */
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/* reserved for mfg: 61 */
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/* reserved for mfg: 62 */
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/* reserved for mfg: 63 */
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/* Class 9: I/O cards (sd) */
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#define SD_IO_RW_DIRECT 52
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#define SD_IO_RW_EXTENDED 53
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/* Class 10: Switch function commands */
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#define SD_SWITCH_FUNC 6
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/* reserved: 34 */
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/* reserved: 35 */
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/* reserved: 36 */
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/* reserved: 37 */
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/* reserved: 50 */
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/* reserved: 57 */
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/* Application specific commands for SD */
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#define ACMD_SET_BUS_WIDTH 6
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#define ACMD_SD_STATUS 13
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#define ACMD_SEND_NUM_WR_BLOCKS 22
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#define ACMD_SET_WR_BLK_ERASE_COUNT 23
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#define ACMD_SD_SEND_OP_COND 41
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#define ACMD_SET_CLR_CARD_DETECT 42
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#define ACMD_SEND_SCR 51
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/* OCR bits */
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/*
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* in SD 2.0 spec, bits 8-14 are now marked reserved
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* Low voltage in SD2.0 spec is bit 7, TBD voltage
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* Low voltage in MC 3.31 spec is bit 7, 1.65-1.95V
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* Specs prior to MMC 3.31 defined bits 0-7 as voltages down to 1.5V.
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* 3.31 redefined them to be reserved and also said that cards had to
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* support the 2.7-3.6V and fixed the OCR to be 0xfff8000 for high voltage
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* cards. MMC 4.0 says that a dual voltage card responds with 0xfff8080.
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* Looks like the fine-grained control of the voltage tolerance ranges
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* was abandoned.
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*
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* The MMC_OCR_CCS appears to be valid for only SD cards.
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*/
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#define MMC_OCR_LOW_VOLTAGE (1u << 7) /* Low Voltage Range -- tbd */
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#define MMC_OCR_200_210 (1U << 8) /* Vdd voltage 2.00 ~ 2.10 */
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#define MMC_OCR_210_220 (1U << 9) /* Vdd voltage 2.10 ~ 2.20 */
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#define MMC_OCR_220_230 (1U << 10) /* Vdd voltage 2.20 ~ 2.30 */
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#define MMC_OCR_230_240 (1U << 11) /* Vdd voltage 2.30 ~ 2.40 */
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#define MMC_OCR_240_250 (1U << 12) /* Vdd voltage 2.40 ~ 2.50 */
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#define MMC_OCR_250_260 (1U << 13) /* Vdd voltage 2.50 ~ 2.60 */
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#define MMC_OCR_260_270 (1U << 14) /* Vdd voltage 2.60 ~ 2.70 */
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#define MMC_OCR_270_280 (1U << 15) /* Vdd voltage 2.70 ~ 2.80 */
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#define MMC_OCR_280_290 (1U << 16) /* Vdd voltage 2.80 ~ 2.90 */
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#define MMC_OCR_290_300 (1U << 17) /* Vdd voltage 2.90 ~ 3.00 */
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#define MMC_OCR_300_310 (1U << 18) /* Vdd voltage 3.00 ~ 3.10 */
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#define MMC_OCR_310_320 (1U << 19) /* Vdd voltage 3.10 ~ 3.20 */
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#define MMC_OCR_320_330 (1U << 20) /* Vdd voltage 3.20 ~ 3.30 */
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#define MMC_OCR_330_340 (1U << 21) /* Vdd voltage 3.30 ~ 3.40 */
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#define MMC_OCR_340_350 (1U << 22) /* Vdd voltage 3.40 ~ 3.50 */
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#define MMC_OCR_350_360 (1U << 23) /* Vdd voltage 3.50 ~ 3.60 */
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#define MMC_OCR_CCS (1u << 30) /* Card Capacity status (SD vs SDHC) */
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#define MMC_OCR_CARD_BUSY (1U << 31) /* Card Power up status */
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/* CSD -- decoded structure */
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struct mmc_cid {
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uint32_t mid;
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char pnm[8];
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uint32_t psn;
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uint16_t oid;
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uint16_t mdt_year;
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uint8_t mdt_month;
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uint8_t prv;
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uint8_t fwrev;
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};
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struct mmc_csd
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{
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uint8_t csd_structure;
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uint16_t ccc;
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uint16_t tacc;
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uint32_t nsac;
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uint32_t r2w_factor;
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uint32_t tran_speed;
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uint32_t read_bl_len;
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uint32_t write_bl_len;
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uint32_t vdd_r_curr_min;
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uint32_t vdd_r_curr_max;
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uint32_t vdd_w_curr_min;
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uint32_t vdd_w_curr_max;
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uint32_t wp_grp_size;
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uint32_t sector_size; /* Erase sector size! */
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uint64_t capacity;
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unsigned int read_bl_partial:1,
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read_blk_misalign:1,
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write_bl_partial:1,
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write_blk_misalign:1,
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dsr_imp:1,
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erase_blk_en:1,
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wp_grp_enable:1;
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};
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#endif /* DEV_MMCREG_H */
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