dc7e38ac4d
from Mellanox Technologies. The current driver supports ethernet speeds up to and including 100 GBit/s. Infiniband support will be done later. The code added is not compiled by default, which will be done by a separate commit. Sponsored by: Mellanox Technologies MFC after: 2 weeks
170 lines
4.9 KiB
C
170 lines
4.9 KiB
C
/*-
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* Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef MLX5_CORE_CQ_H
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#define MLX5_CORE_CQ_H
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#include <rdma/ib_verbs.h>
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#include <dev/mlx5/driver.h>
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#include <dev/mlx5/mlx5_ifc.h>
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struct mlx5_core_cq {
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u32 cqn;
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int cqe_sz;
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__be32 *set_ci_db;
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__be32 *arm_db;
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atomic_t refcount;
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struct completion free;
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unsigned vector;
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int irqn;
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void (*comp) (struct mlx5_core_cq *);
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void (*event) (struct mlx5_core_cq *, int);
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struct mlx5_uar *uar;
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u32 cons_index;
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unsigned arm_sn;
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struct mlx5_rsc_debug *dbg;
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int pid;
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};
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enum {
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MLX5_CQE_SYNDROME_LOCAL_LENGTH_ERR = 0x01,
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MLX5_CQE_SYNDROME_LOCAL_QP_OP_ERR = 0x02,
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MLX5_CQE_SYNDROME_LOCAL_PROT_ERR = 0x04,
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MLX5_CQE_SYNDROME_WR_FLUSH_ERR = 0x05,
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MLX5_CQE_SYNDROME_MW_BIND_ERR = 0x06,
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MLX5_CQE_SYNDROME_BAD_RESP_ERR = 0x10,
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MLX5_CQE_SYNDROME_LOCAL_ACCESS_ERR = 0x11,
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MLX5_CQE_SYNDROME_REMOTE_INVAL_REQ_ERR = 0x12,
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MLX5_CQE_SYNDROME_REMOTE_ACCESS_ERR = 0x13,
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MLX5_CQE_SYNDROME_REMOTE_OP_ERR = 0x14,
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MLX5_CQE_SYNDROME_TRANSPORT_RETRY_EXC_ERR = 0x15,
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MLX5_CQE_SYNDROME_RNR_RETRY_EXC_ERR = 0x16,
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MLX5_CQE_SYNDROME_REMOTE_ABORTED_ERR = 0x22,
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};
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enum {
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MLX5_CQE_OWNER_MASK = 1,
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MLX5_CQE_REQ = 0,
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MLX5_CQE_RESP_WR_IMM = 1,
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MLX5_CQE_RESP_SEND = 2,
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MLX5_CQE_RESP_SEND_IMM = 3,
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MLX5_CQE_RESP_SEND_INV = 4,
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MLX5_CQE_RESIZE_CQ = 5,
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MLX5_CQE_SIG_ERR = 12,
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MLX5_CQE_REQ_ERR = 13,
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MLX5_CQE_RESP_ERR = 14,
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MLX5_CQE_INVALID = 15,
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};
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enum {
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MLX5_CQ_MODIFY_PERIOD = 1 << 0,
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MLX5_CQ_MODIFY_COUNT = 1 << 1,
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MLX5_CQ_MODIFY_OVERRUN = 1 << 2,
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};
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enum {
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MLX5_CQ_OPMOD_RESIZE = 1,
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MLX5_MODIFY_CQ_MASK_LOG_SIZE = 1 << 0,
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MLX5_MODIFY_CQ_MASK_PG_OFFSET = 1 << 1,
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MLX5_MODIFY_CQ_MASK_PG_SIZE = 1 << 2,
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};
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struct mlx5_cq_modify_params {
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int type;
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union {
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struct {
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u32 page_offset;
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u8 log_cq_size;
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} resize;
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struct {
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} moder;
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struct {
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} mapping;
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} params;
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};
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static inline int cqe_sz_to_mlx_sz(u8 size)
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{
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return size == 64 ? CQE_SIZE_64 : CQE_SIZE_128;
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}
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static inline void mlx5_cq_set_ci(struct mlx5_core_cq *cq)
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{
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*cq->set_ci_db = cpu_to_be32(cq->cons_index & 0xffffff);
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}
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enum {
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MLX5_CQ_DB_REQ_NOT_SOL = 1 << 24,
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MLX5_CQ_DB_REQ_NOT = 0 << 24
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};
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static inline void mlx5_cq_arm(struct mlx5_core_cq *cq, u32 cmd,
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void __iomem *uar_page,
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spinlock_t *doorbell_lock,
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u32 cons_index)
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{
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__be32 doorbell[2];
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u32 sn;
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u32 ci;
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sn = cq->arm_sn & 3;
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ci = cons_index & 0xffffff;
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*cq->arm_db = cpu_to_be32(sn << 28 | cmd | ci);
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/* Make sure that the doorbell record in host memory is
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* written before ringing the doorbell via PCI MMIO.
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*/
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wmb();
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doorbell[0] = cpu_to_be32(sn << 28 | cmd | ci);
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doorbell[1] = cpu_to_be32(cq->cqn);
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mlx5_write64(doorbell, uar_page + MLX5_CQ_DOORBELL, doorbell_lock);
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}
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int mlx5_init_cq_table(struct mlx5_core_dev *dev);
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void mlx5_cleanup_cq_table(struct mlx5_core_dev *dev);
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int mlx5_core_create_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq,
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struct mlx5_create_cq_mbox_in *in, int inlen);
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int mlx5_core_destroy_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq);
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int mlx5_core_query_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq,
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struct mlx5_query_cq_mbox_out *out);
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int mlx5_core_modify_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq,
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struct mlx5_modify_cq_mbox_in *in, int in_sz);
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int mlx5_core_modify_cq_moderation(struct mlx5_core_dev *dev,
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struct mlx5_core_cq *cq, u16 cq_period,
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u16 cq_max_count);
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int mlx5_debug_cq_add(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq);
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void mlx5_debug_cq_remove(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq);
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#endif /* MLX5_CORE_CQ_H */
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