Marcin Wojtas d5b20eaafc sdhci_fsl_fdt: specify base clk divisor per SoC ... Only LS1046A and LS1028A require the base clk to be divided by 2. Implement that by moving the divider to a SoC specific data. This commit fixes base clk setup for the entire SoC family, including the already suported LS2160A. Submitted by: Lukasz Hajec <lha@semihalf.com> Reviewed by: manu Obtained from: Semihalf Sponsored by: Alstom Group Differential Revision: https://reviews.freebsd.org/D30120		2021-05-07 03:48:54 +02:00
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fsl_sdhci.c	sdhci: clean up empty lines in .c and .h files	2020-09-01 21:54:16 +00:00
sdhci_acpi.c
sdhci_fdt_gpio.c
sdhci_fdt_gpio.h
sdhci_fdt.c	sdhci: clean up empty lines in .c and .h files	2020-09-01 21:54:16 +00:00
sdhci_fsl_fdt.c	sdhci_fsl_fdt: specify base clk divisor per SoC	2021-05-07 03:48:54 +02:00
sdhci_if.m	Regularize my copyright notice	2019-12-04 16:56:11 +00:00
sdhci_pci.c	sdhci(4): Recognize the Texas Instruments PCIxx12 card reader.	2020-08-25 18:32:43 +00:00
sdhci_xenon.c	Add support for the GPIO SD Card VCC regulator/switch and the GPIO SD Card	2019-06-10 21:50:07 +00:00
sdhci_xenon.h
sdhci.c	Make MAXPHYS tunable. Bump MAXPHYS to 1M.	2020-11-28 12:12:51 +00:00
sdhci.h