e9d8b9c383
and the igb driver static in the kernel. But it also reflects some other bug fixes in my development stream at Intel. PR 122373 is also fixed in this code.
684 lines
20 KiB
C
684 lines
20 KiB
C
/******************************************************************************
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Copyright (c) 2001-2008, Intel Corporation
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. Neither the name of the Intel Corporation nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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******************************************************************************/
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/*$FreeBSD$*/
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/* e1000_82540
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* e1000_82545
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* e1000_82546
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* e1000_82545_rev_3
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* e1000_82546_rev_3
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*/
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#include "e1000_api.h"
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static s32 e1000_init_phy_params_82540(struct e1000_hw *hw);
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static s32 e1000_init_nvm_params_82540(struct e1000_hw *hw);
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static s32 e1000_init_mac_params_82540(struct e1000_hw *hw);
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static s32 e1000_adjust_serdes_amplitude_82540(struct e1000_hw *hw);
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static void e1000_clear_hw_cntrs_82540(struct e1000_hw *hw);
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static s32 e1000_init_hw_82540(struct e1000_hw *hw);
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static s32 e1000_reset_hw_82540(struct e1000_hw *hw);
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static s32 e1000_set_phy_mode_82540(struct e1000_hw *hw);
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static s32 e1000_set_vco_speed_82540(struct e1000_hw *hw);
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static s32 e1000_setup_copper_link_82540(struct e1000_hw *hw);
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static s32 e1000_setup_fiber_serdes_link_82540(struct e1000_hw *hw);
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static void e1000_power_down_phy_copper_82540(struct e1000_hw *hw);
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/**
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* e1000_init_phy_params_82540 - Init PHY func ptrs.
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* @hw: pointer to the HW structure
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*
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* This is a function pointer entry point called by the api module.
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**/
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static s32 e1000_init_phy_params_82540(struct e1000_hw *hw)
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{
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struct e1000_phy_info *phy = &hw->phy;
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s32 ret_val = E1000_SUCCESS;
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phy->addr = 1;
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phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT;
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phy->reset_delay_us = 10000;
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phy->type = e1000_phy_m88;
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/* Function Pointers */
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phy->ops.check_polarity = e1000_check_polarity_m88;
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phy->ops.commit = e1000_phy_sw_reset_generic;
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phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_m88;
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phy->ops.get_cable_length = e1000_get_cable_length_m88;
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phy->ops.get_cfg_done = e1000_get_cfg_done_generic;
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phy->ops.read_reg = e1000_read_phy_reg_m88;
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phy->ops.reset = e1000_phy_hw_reset_generic;
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phy->ops.write_reg = e1000_write_phy_reg_m88;
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phy->ops.get_info = e1000_get_phy_info_m88;
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phy->ops.power_up = e1000_power_up_phy_copper;
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phy->ops.power_down = e1000_power_down_phy_copper_82540;
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ret_val = e1000_get_phy_id(hw);
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if (ret_val)
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goto out;
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/* Verify phy id */
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switch (hw->mac.type) {
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case e1000_82540:
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case e1000_82545:
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case e1000_82545_rev_3:
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case e1000_82546:
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case e1000_82546_rev_3:
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if (phy->id == M88E1011_I_PHY_ID)
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break;
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/* Fall Through */
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default:
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ret_val = -E1000_ERR_PHY;
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goto out;
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break;
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}
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out:
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return ret_val;
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}
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/**
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* e1000_init_nvm_params_82540 - Init NVM func ptrs.
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* @hw: pointer to the HW structure
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*
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* This is a function pointer entry point called by the api module.
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**/
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static s32 e1000_init_nvm_params_82540(struct e1000_hw *hw)
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{
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struct e1000_nvm_info *nvm = &hw->nvm;
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u32 eecd = E1000_READ_REG(hw, E1000_EECD);
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DEBUGFUNC("e1000_init_nvm_params_82540");
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nvm->type = e1000_nvm_eeprom_microwire;
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nvm->delay_usec = 50;
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nvm->opcode_bits = 3;
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switch (nvm->override) {
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case e1000_nvm_override_microwire_large:
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nvm->address_bits = 8;
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nvm->word_size = 256;
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break;
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case e1000_nvm_override_microwire_small:
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nvm->address_bits = 6;
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nvm->word_size = 64;
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break;
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default:
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nvm->address_bits = eecd & E1000_EECD_SIZE ? 8 : 6;
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nvm->word_size = eecd & E1000_EECD_SIZE ? 256 : 64;
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break;
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}
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/* Function Pointers */
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nvm->ops.acquire = e1000_acquire_nvm_generic;
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nvm->ops.read = e1000_read_nvm_microwire;
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nvm->ops.release = e1000_release_nvm_generic;
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nvm->ops.update = e1000_update_nvm_checksum_generic;
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nvm->ops.valid_led_default = e1000_valid_led_default_generic;
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nvm->ops.validate = e1000_validate_nvm_checksum_generic;
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nvm->ops.write = e1000_write_nvm_microwire;
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return E1000_SUCCESS;
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}
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/**
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* e1000_init_mac_params_82540 - Init MAC func ptrs.
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* @hw: pointer to the HW structure
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*
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* This is a function pointer entry point called by the api module.
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**/
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static s32 e1000_init_mac_params_82540(struct e1000_hw *hw)
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{
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struct e1000_mac_info *mac = &hw->mac;
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s32 ret_val = E1000_SUCCESS;
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DEBUGFUNC("e1000_init_mac_params_82540");
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/* Set media type */
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switch (hw->device_id) {
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case E1000_DEV_ID_82545EM_FIBER:
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case E1000_DEV_ID_82545GM_FIBER:
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case E1000_DEV_ID_82546EB_FIBER:
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case E1000_DEV_ID_82546GB_FIBER:
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hw->phy.media_type = e1000_media_type_fiber;
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break;
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case E1000_DEV_ID_82545GM_SERDES:
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case E1000_DEV_ID_82546GB_SERDES:
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hw->phy.media_type = e1000_media_type_internal_serdes;
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break;
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default:
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hw->phy.media_type = e1000_media_type_copper;
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break;
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}
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/* Set mta register count */
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mac->mta_reg_count = 128;
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/* Set rar entry count */
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mac->rar_entry_count = E1000_RAR_ENTRIES;
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/* Function pointers */
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/* bus type/speed/width */
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mac->ops.get_bus_info = e1000_get_bus_info_pci_generic;
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/* reset */
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mac->ops.reset_hw = e1000_reset_hw_82540;
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/* hw initialization */
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mac->ops.init_hw = e1000_init_hw_82540;
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/* link setup */
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mac->ops.setup_link = e1000_setup_link_generic;
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/* physical interface setup */
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mac->ops.setup_physical_interface =
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(hw->phy.media_type == e1000_media_type_copper)
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? e1000_setup_copper_link_82540
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: e1000_setup_fiber_serdes_link_82540;
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/* check for link */
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switch (hw->phy.media_type) {
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case e1000_media_type_copper:
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mac->ops.check_for_link = e1000_check_for_copper_link_generic;
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break;
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case e1000_media_type_fiber:
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mac->ops.check_for_link = e1000_check_for_fiber_link_generic;
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break;
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case e1000_media_type_internal_serdes:
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mac->ops.check_for_link = e1000_check_for_serdes_link_generic;
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break;
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default:
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ret_val = -E1000_ERR_CONFIG;
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goto out;
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break;
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}
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/* link info */
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mac->ops.get_link_up_info =
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(hw->phy.media_type == e1000_media_type_copper)
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? e1000_get_speed_and_duplex_copper_generic
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: e1000_get_speed_and_duplex_fiber_serdes_generic;
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/* multicast address update */
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mac->ops.update_mc_addr_list = e1000_update_mc_addr_list_generic;
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/* writing VFTA */
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mac->ops.write_vfta = e1000_write_vfta_generic;
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/* clearing VFTA */
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mac->ops.clear_vfta = e1000_clear_vfta_generic;
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/* setting MTA */
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mac->ops.mta_set = e1000_mta_set_generic;
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/* setup LED */
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mac->ops.setup_led = e1000_setup_led_generic;
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/* cleanup LED */
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mac->ops.cleanup_led = e1000_cleanup_led_generic;
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/* turn on/off LED */
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mac->ops.led_on = e1000_led_on_generic;
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mac->ops.led_off = e1000_led_off_generic;
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/* clear hardware counters */
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mac->ops.clear_hw_cntrs = e1000_clear_hw_cntrs_82540;
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out:
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return ret_val;
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}
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/**
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* e1000_init_function_pointers_82540 - Init func ptrs.
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* @hw: pointer to the HW structure
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*
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* The only function explicitly called by the api module to initialize
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* all function pointers and parameters.
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**/
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void e1000_init_function_pointers_82540(struct e1000_hw *hw)
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{
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DEBUGFUNC("e1000_init_function_pointers_82540");
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hw->mac.ops.init_params = e1000_init_mac_params_82540;
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hw->nvm.ops.init_params = e1000_init_nvm_params_82540;
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hw->phy.ops.init_params = e1000_init_phy_params_82540;
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}
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/**
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* e1000_reset_hw_82540 - Reset hardware
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* @hw: pointer to the HW structure
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*
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* This resets the hardware into a known state. This is a
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* function pointer entry point called by the api module.
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**/
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static s32 e1000_reset_hw_82540(struct e1000_hw *hw)
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{
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u32 ctrl, icr, manc;
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s32 ret_val = E1000_SUCCESS;
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DEBUGFUNC("e1000_reset_hw_82540");
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DEBUGOUT("Masking off all interrupts\n");
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E1000_WRITE_REG(hw, E1000_IMC, 0xFFFFFFFF);
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E1000_WRITE_REG(hw, E1000_RCTL, 0);
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E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP);
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E1000_WRITE_FLUSH(hw);
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/*
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* Delay to allow any outstanding PCI transactions to complete
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* before resetting the device.
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*/
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msec_delay(10);
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ctrl = E1000_READ_REG(hw, E1000_CTRL);
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DEBUGOUT("Issuing a global reset to 82540/82545/82546 MAC\n");
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switch (hw->mac.type) {
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case e1000_82545_rev_3:
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case e1000_82546_rev_3:
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E1000_WRITE_REG(hw, E1000_CTRL_DUP, ctrl | E1000_CTRL_RST);
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break;
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default:
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/*
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* These controllers can't ack the 64-bit write when
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* issuing the reset, so we use IO-mapping as a
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* workaround to issue the reset.
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*/
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E1000_WRITE_REG_IO(hw, E1000_CTRL, ctrl | E1000_CTRL_RST);
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break;
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}
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/* Wait for EEPROM reload */
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msec_delay(5);
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/* Disable HW ARPs on ASF enabled adapters */
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manc = E1000_READ_REG(hw, E1000_MANC);
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manc &= ~E1000_MANC_ARP_EN;
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E1000_WRITE_REG(hw, E1000_MANC, manc);
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E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
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icr = E1000_READ_REG(hw, E1000_ICR);
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return ret_val;
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}
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/**
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* e1000_init_hw_82540 - Initialize hardware
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* @hw: pointer to the HW structure
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*
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* This inits the hardware readying it for operation. This is a
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* function pointer entry point called by the api module.
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**/
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static s32 e1000_init_hw_82540(struct e1000_hw *hw)
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{
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struct e1000_mac_info *mac = &hw->mac;
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u32 txdctl, ctrl_ext;
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s32 ret_val = E1000_SUCCESS;
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u16 i;
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DEBUGFUNC("e1000_init_hw_82540");
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/* Initialize identification LED */
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ret_val = e1000_id_led_init_generic(hw);
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if (ret_val) {
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DEBUGOUT("Error initializing identification LED\n");
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/* This is not fatal and we should not stop init due to this */
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}
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/* Disabling VLAN filtering */
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DEBUGOUT("Initializing the IEEE VLAN\n");
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if (mac->type < e1000_82545_rev_3)
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E1000_WRITE_REG(hw, E1000_VET, 0);
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mac->ops.clear_vfta(hw);
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/* Setup the receive address. */
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e1000_init_rx_addrs_generic(hw, mac->rar_entry_count);
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/* Zero out the Multicast HASH table */
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DEBUGOUT("Zeroing the MTA\n");
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for (i = 0; i < mac->mta_reg_count; i++) {
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E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);
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/*
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* Avoid back to back register writes by adding the register
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* read (flush). This is to protect against some strange
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* bridge configurations that may issue Memory Write Block
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* (MWB) to our register space. The *_rev_3 hardware at
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* least doesn't respond correctly to every other dword in an
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* MWB to our register space.
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*/
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E1000_WRITE_FLUSH(hw);
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}
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if (mac->type < e1000_82545_rev_3)
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e1000_pcix_mmrbc_workaround_generic(hw);
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/* Setup link and flow control */
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ret_val = mac->ops.setup_link(hw);
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txdctl = E1000_READ_REG(hw, E1000_TXDCTL(0));
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txdctl = (txdctl & ~E1000_TXDCTL_WTHRESH) |
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E1000_TXDCTL_FULL_TX_DESC_WB;
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E1000_WRITE_REG(hw, E1000_TXDCTL(0), txdctl);
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/*
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* Clear all of the statistics registers (clear on read). It is
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* important that we do this after we have tried to establish link
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* because the symbol error count will increment wildly if there
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* is no link.
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*/
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e1000_clear_hw_cntrs_82540(hw);
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if ((hw->device_id == E1000_DEV_ID_82546GB_QUAD_COPPER) ||
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(hw->device_id == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3)) {
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ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
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/*
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* Relaxed ordering must be disabled to avoid a parity
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* error crash in a PCI slot.
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*/
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ctrl_ext |= E1000_CTRL_EXT_RO_DIS;
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E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
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}
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return ret_val;
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}
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|
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/**
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* e1000_setup_copper_link_82540 - Configure copper link settings
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* @hw: pointer to the HW structure
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*
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* Calls the appropriate function to configure the link for auto-neg or forced
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* speed and duplex. Then we check for link, once link is established calls
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* to configure collision distance and flow control are called. If link is
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* not established, we return -E1000_ERR_PHY (-2). This is a function
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* pointer entry point called by the api module.
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**/
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static s32 e1000_setup_copper_link_82540(struct e1000_hw *hw)
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{
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u32 ctrl;
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s32 ret_val = E1000_SUCCESS;
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u16 data;
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DEBUGFUNC("e1000_setup_copper_link_82540");
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ctrl = E1000_READ_REG(hw, E1000_CTRL);
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ctrl |= E1000_CTRL_SLU;
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ctrl &= ~(E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX);
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E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
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ret_val = e1000_set_phy_mode_82540(hw);
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if (ret_val)
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goto out;
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if (hw->mac.type == e1000_82545_rev_3 ||
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hw->mac.type == e1000_82546_rev_3) {
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ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &data);
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if (ret_val)
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goto out;
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data |= 0x00000008;
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ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, data);
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if (ret_val)
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goto out;
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}
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ret_val = e1000_copper_link_setup_m88(hw);
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if (ret_val)
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goto out;
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ret_val = e1000_setup_copper_link_generic(hw);
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out:
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return ret_val;
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}
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/**
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* e1000_setup_fiber_serdes_link_82540 - Setup link for fiber/serdes
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* @hw: pointer to the HW structure
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*
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* Set the output amplitude to the value in the EEPROM and adjust the VCO
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* speed to improve Bit Error Rate (BER) performance. Configures collision
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* distance and flow control for fiber and serdes links. Upon successful
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* setup, poll for link. This is a function pointer entry point called by
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* the api module.
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**/
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static s32 e1000_setup_fiber_serdes_link_82540(struct e1000_hw *hw)
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{
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struct e1000_mac_info *mac = &hw->mac;
|
|
s32 ret_val = E1000_SUCCESS;
|
|
|
|
DEBUGFUNC("e1000_setup_fiber_serdes_link_82540");
|
|
|
|
switch (mac->type) {
|
|
case e1000_82545_rev_3:
|
|
case e1000_82546_rev_3:
|
|
if (hw->phy.media_type == e1000_media_type_internal_serdes) {
|
|
/*
|
|
* If we're on serdes media, adjust the output
|
|
* amplitude to value set in the EEPROM.
|
|
*/
|
|
ret_val = e1000_adjust_serdes_amplitude_82540(hw);
|
|
if (ret_val)
|
|
goto out;
|
|
}
|
|
/* Adjust VCO speed to improve BER performance */
|
|
ret_val = e1000_set_vco_speed_82540(hw);
|
|
if (ret_val)
|
|
goto out;
|
|
default:
|
|
break;
|
|
}
|
|
|
|
ret_val = e1000_setup_fiber_serdes_link_generic(hw);
|
|
|
|
out:
|
|
return ret_val;
|
|
}
|
|
|
|
/**
|
|
* e1000_adjust_serdes_amplitude_82540 - Adjust amplitude based on EEPROM
|
|
* @hw: pointer to the HW structure
|
|
*
|
|
* Adjust the SERDES output amplitude based on the EEPROM settings.
|
|
**/
|
|
static s32 e1000_adjust_serdes_amplitude_82540(struct e1000_hw *hw)
|
|
{
|
|
s32 ret_val = E1000_SUCCESS;
|
|
u16 nvm_data;
|
|
|
|
DEBUGFUNC("e1000_adjust_serdes_amplitude_82540");
|
|
|
|
ret_val = hw->nvm.ops.read(hw, NVM_SERDES_AMPLITUDE, 1, &nvm_data);
|
|
if (ret_val)
|
|
goto out;
|
|
|
|
if (nvm_data != NVM_RESERVED_WORD) {
|
|
/* Adjust serdes output amplitude only. */
|
|
nvm_data &= NVM_SERDES_AMPLITUDE_MASK;
|
|
ret_val = hw->phy.ops.write_reg(hw,
|
|
M88E1000_PHY_EXT_CTRL,
|
|
nvm_data);
|
|
if (ret_val)
|
|
goto out;
|
|
}
|
|
|
|
out:
|
|
return ret_val;
|
|
}
|
|
|
|
/**
|
|
* e1000_set_vco_speed_82540 - Set VCO speed for better performance
|
|
* @hw: pointer to the HW structure
|
|
*
|
|
* Set the VCO speed to improve Bit Error Rate (BER) performance.
|
|
**/
|
|
static s32 e1000_set_vco_speed_82540(struct e1000_hw *hw)
|
|
{
|
|
s32 ret_val = E1000_SUCCESS;
|
|
u16 default_page = 0;
|
|
u16 phy_data;
|
|
|
|
DEBUGFUNC("e1000_set_vco_speed_82540");
|
|
|
|
/* Set PHY register 30, page 5, bit 8 to 0 */
|
|
|
|
ret_val = hw->phy.ops.read_reg(hw,
|
|
M88E1000_PHY_PAGE_SELECT,
|
|
&default_page);
|
|
if (ret_val)
|
|
goto out;
|
|
|
|
ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0005);
|
|
if (ret_val)
|
|
goto out;
|
|
|
|
ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_GEN_CONTROL, &phy_data);
|
|
if (ret_val)
|
|
goto out;
|
|
|
|
phy_data &= ~M88E1000_PHY_VCO_REG_BIT8;
|
|
ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, phy_data);
|
|
if (ret_val)
|
|
goto out;
|
|
|
|
/* Set PHY register 30, page 4, bit 11 to 1 */
|
|
|
|
ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0004);
|
|
if (ret_val)
|
|
goto out;
|
|
|
|
ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_GEN_CONTROL, &phy_data);
|
|
if (ret_val)
|
|
goto out;
|
|
|
|
phy_data |= M88E1000_PHY_VCO_REG_BIT11;
|
|
ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, phy_data);
|
|
if (ret_val)
|
|
goto out;
|
|
|
|
ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT,
|
|
default_page);
|
|
|
|
out:
|
|
return ret_val;
|
|
}
|
|
|
|
/**
|
|
* e1000_set_phy_mode_82540 - Set PHY to class A mode
|
|
* @hw: pointer to the HW structure
|
|
*
|
|
* Sets the PHY to class A mode and assumes the following operations will
|
|
* follow to enable the new class mode:
|
|
* 1. Do a PHY soft reset.
|
|
* 2. Restart auto-negotiation or force link.
|
|
**/
|
|
static s32 e1000_set_phy_mode_82540(struct e1000_hw *hw)
|
|
{
|
|
struct e1000_phy_info *phy = &hw->phy;
|
|
s32 ret_val = E1000_SUCCESS;
|
|
u16 nvm_data;
|
|
|
|
DEBUGFUNC("e1000_set_phy_mode_82540");
|
|
|
|
if (hw->mac.type != e1000_82545_rev_3)
|
|
goto out;
|
|
|
|
ret_val = hw->nvm.ops.read(hw, NVM_PHY_CLASS_WORD, 1, &nvm_data);
|
|
if (ret_val) {
|
|
ret_val = -E1000_ERR_PHY;
|
|
goto out;
|
|
}
|
|
|
|
if ((nvm_data != NVM_RESERVED_WORD) && (nvm_data & NVM_PHY_CLASS_A)) {
|
|
ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT,
|
|
0x000B);
|
|
if (ret_val) {
|
|
ret_val = -E1000_ERR_PHY;
|
|
goto out;
|
|
}
|
|
ret_val = hw->phy.ops.write_reg(hw,
|
|
M88E1000_PHY_GEN_CONTROL,
|
|
0x8104);
|
|
if (ret_val) {
|
|
ret_val = -E1000_ERR_PHY;
|
|
goto out;
|
|
}
|
|
|
|
phy->reset_disable = FALSE;
|
|
}
|
|
|
|
out:
|
|
return ret_val;
|
|
}
|
|
|
|
/**
|
|
* e1000_power_down_phy_copper_82540 - Remove link in case of PHY power down
|
|
* @hw: pointer to the HW structure
|
|
*
|
|
* In the case of a PHY power down to save power, or to turn off link during a
|
|
* driver unload, or wake on lan is not enabled, remove the link.
|
|
**/
|
|
static void e1000_power_down_phy_copper_82540(struct e1000_hw *hw)
|
|
{
|
|
/* If the management interface is not enabled, then power down */
|
|
if (!(E1000_READ_REG(hw, E1000_MANC) & E1000_MANC_SMBUS_EN))
|
|
e1000_power_down_phy_copper(hw);
|
|
|
|
return;
|
|
}
|
|
|
|
/**
|
|
* e1000_clear_hw_cntrs_82540 - Clear device specific hardware counters
|
|
* @hw: pointer to the HW structure
|
|
*
|
|
* Clears the hardware counters by reading the counter registers.
|
|
**/
|
|
static void e1000_clear_hw_cntrs_82540(struct e1000_hw *hw)
|
|
{
|
|
volatile u32 temp;
|
|
|
|
DEBUGFUNC("e1000_clear_hw_cntrs_82540");
|
|
|
|
e1000_clear_hw_cntrs_base_generic(hw);
|
|
|
|
temp = E1000_READ_REG(hw, E1000_PRC64);
|
|
temp = E1000_READ_REG(hw, E1000_PRC127);
|
|
temp = E1000_READ_REG(hw, E1000_PRC255);
|
|
temp = E1000_READ_REG(hw, E1000_PRC511);
|
|
temp = E1000_READ_REG(hw, E1000_PRC1023);
|
|
temp = E1000_READ_REG(hw, E1000_PRC1522);
|
|
temp = E1000_READ_REG(hw, E1000_PTC64);
|
|
temp = E1000_READ_REG(hw, E1000_PTC127);
|
|
temp = E1000_READ_REG(hw, E1000_PTC255);
|
|
temp = E1000_READ_REG(hw, E1000_PTC511);
|
|
temp = E1000_READ_REG(hw, E1000_PTC1023);
|
|
temp = E1000_READ_REG(hw, E1000_PTC1522);
|
|
|
|
temp = E1000_READ_REG(hw, E1000_ALGNERRC);
|
|
temp = E1000_READ_REG(hw, E1000_RXERRC);
|
|
temp = E1000_READ_REG(hw, E1000_TNCRS);
|
|
temp = E1000_READ_REG(hw, E1000_CEXTERR);
|
|
temp = E1000_READ_REG(hw, E1000_TSCTC);
|
|
temp = E1000_READ_REG(hw, E1000_TSCTFC);
|
|
|
|
temp = E1000_READ_REG(hw, E1000_MGTPRC);
|
|
temp = E1000_READ_REG(hw, E1000_MGTPDC);
|
|
temp = E1000_READ_REG(hw, E1000_MGTPTC);
|
|
}
|
|
|