21faca2ee7
priorities of the technologies supported by 802.3 Selector Field value. 1000BASE-T full duplex 1000BASE-T 100BASE-T2 full duplex 100BASE-TX full duplex 100BASE-T2 100BASE-T4 100BASE-TX 10BASE-T full duplex 10BAST-T However PHY drivers didn't honor the order such that 100BASE-T4 had higher priority than 100BASE-TX full duplex. Fix that long standing bugs such that have PHY drivers choose the highest common denominator ability. Fix a bug in dcphy which inadvertently aceepts 100BASE-T4. PR: 92599
453 lines
12 KiB
C
453 lines
12 KiB
C
/*-
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* Copyright (c) 1997, 1998, 1999
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* Bill Paul <wpaul@ee.columbia.edu>. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Bill Paul.
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* 4. Neither the name of the author nor the names of any co-contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* Pseudo-driver for internal NWAY support on DEC 21143 and workalike
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* controllers. Technically we're abusing the miibus code to handle
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* media selection and NWAY support here since there is no MII
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* interface. However the logical operations are roughly the same,
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* and the alternative is to create a fake MII interface in the driver,
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* which is harder to do.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/socket.h>
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#include <sys/errno.h>
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#include <sys/lock.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <sys/bus.h>
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#include <net/if.h>
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#include <net/if_arp.h>
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#include <net/if_media.h>
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#include "miidevs.h"
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <sys/bus.h>
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#include <dev/pci/pcivar.h>
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#include <dev/dc/if_dcreg.h>
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#include "miibus_if.h"
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#define DC_SETBIT(sc, reg, x) \
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CSR_WRITE_4(sc, reg, \
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CSR_READ_4(sc, reg) | x)
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#define DC_CLRBIT(sc, reg, x) \
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CSR_WRITE_4(sc, reg, \
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CSR_READ_4(sc, reg) & ~x)
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#define MIIF_AUTOTIMEOUT 0x0004
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/*
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* This is the subsystem ID for the built-in 21143 ethernet
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* in several Compaq Presario systems. Apparently these are
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* 10Mbps only, so we need to treat them specially.
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*/
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#define COMPAQ_PRESARIO_ID 0xb0bb0e11
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static int dcphy_probe(device_t);
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static int dcphy_attach(device_t);
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static device_method_t dcphy_methods[] = {
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/* device interface */
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DEVMETHOD(device_probe, dcphy_probe),
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DEVMETHOD(device_attach, dcphy_attach),
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DEVMETHOD(device_detach, mii_phy_detach),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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{ 0, 0 }
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};
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static devclass_t dcphy_devclass;
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static driver_t dcphy_driver = {
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"dcphy",
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dcphy_methods,
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sizeof(struct mii_softc)
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};
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DRIVER_MODULE(dcphy, miibus, dcphy_driver, dcphy_devclass, 0, 0);
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static int dcphy_service(struct mii_softc *, struct mii_data *, int);
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static void dcphy_status(struct mii_softc *);
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static void dcphy_reset(struct mii_softc *);
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static int dcphy_auto(struct mii_softc *);
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static int
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dcphy_probe(device_t dev)
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{
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struct mii_attach_args *ma;
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ma = device_get_ivars(dev);
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/*
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* The dc driver will report the 21143 vendor and device
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* ID to let us know that it wants us to attach.
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*/
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if (ma->mii_id1 != DC_VENDORID_DEC ||
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ma->mii_id2 != DC_DEVICEID_21143)
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return(ENXIO);
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device_set_desc(dev, "Intel 21143 NWAY media interface");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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dcphy_attach(device_t dev)
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{
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struct mii_softc *sc;
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struct mii_attach_args *ma;
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struct mii_data *mii;
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struct dc_softc *dc_sc;
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device_t brdev;
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sc = device_get_softc(dev);
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ma = device_get_ivars(dev);
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sc->mii_dev = device_get_parent(dev);
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mii = device_get_softc(sc->mii_dev);
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LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
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sc->mii_inst = mii->mii_instance;
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sc->mii_phy = ma->mii_phyno;
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sc->mii_service = dcphy_service;
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sc->mii_pdata = mii;
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sc->mii_flags |= MIIF_NOISOLATE;
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mii->mii_instance++;
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#define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL)
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ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),
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BMCR_ISO);
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/*dcphy_reset(sc);*/
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dc_sc = mii->mii_ifp->if_softc;
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CSR_WRITE_4(dc_sc, DC_10BTSTAT, 0);
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CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0);
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brdev = device_get_parent(sc->mii_dev);
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switch (pci_get_subdevice(brdev) << 16 | pci_get_subvendor(brdev)) {
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case COMPAQ_PRESARIO_ID:
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/* Example of how to only allow 10Mbps modes. */
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sc->mii_capabilities = BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX;
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break;
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default:
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if (dc_sc->dc_pmode == DC_PMODE_SIA) {
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sc->mii_capabilities =
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BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX;
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} else {
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ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP,
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sc->mii_inst), BMCR_LOOP|BMCR_S100);
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sc->mii_capabilities =
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BMSR_ANEG|BMSR_100TXFDX|BMSR_100TXHDX|
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BMSR_10TFDX|BMSR_10THDX;
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}
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break;
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}
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sc->mii_capabilities &= ma->mii_capmask;
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device_printf(dev, " ");
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mii_add_media(sc);
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printf("\n");
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#undef ADD
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MIIBUS_MEDIAINIT(sc->mii_dev);
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return(0);
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}
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static int
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dcphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
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{
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struct dc_softc *dc_sc;
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struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
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int reg;
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u_int32_t mode;
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dc_sc = mii->mii_ifp->if_softc;
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switch (cmd) {
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case MII_POLLSTAT:
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/*
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* If we're not polling our PHY instance, just return.
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*/
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if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
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return (0);
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}
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break;
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case MII_MEDIACHG:
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/*
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* If the media indicates a different PHY instance,
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* isolate ourselves.
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*/
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if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
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return (0);
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}
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/*
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* If the interface is not up, don't do anything.
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*/
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if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
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break;
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sc->mii_flags = 0;
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mii->mii_media_active = IFM_NONE;
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mode = CSR_READ_4(dc_sc, DC_NETCFG);
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mode &= ~(DC_NETCFG_FULLDUPLEX|DC_NETCFG_PORTSEL|
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DC_NETCFG_PCS|DC_NETCFG_SCRAMBLER|DC_NETCFG_SPEEDSEL);
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switch (IFM_SUBTYPE(ife->ifm_media)) {
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case IFM_AUTO:
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/*dcphy_reset(sc);*/
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(void) dcphy_auto(sc);
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break;
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case IFM_100_T4:
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/*
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* XXX Not supported as a manual setting right now.
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*/
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return (EINVAL);
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case IFM_100_TX:
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dcphy_reset(sc);
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DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
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mode |= DC_NETCFG_PORTSEL|DC_NETCFG_PCS|
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DC_NETCFG_SCRAMBLER;
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if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
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mode |= DC_NETCFG_FULLDUPLEX;
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else
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mode &= ~DC_NETCFG_FULLDUPLEX;
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CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
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break;
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case IFM_10_T:
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DC_CLRBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
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DC_CLRBIT(dc_sc, DC_10BTCTRL, 0xFFFF);
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if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
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DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3D);
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else
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DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3F);
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DC_SETBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
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DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
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mode &= ~DC_NETCFG_PORTSEL;
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mode |= DC_NETCFG_SPEEDSEL;
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if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
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mode |= DC_NETCFG_FULLDUPLEX;
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else
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mode &= ~DC_NETCFG_FULLDUPLEX;
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CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
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break;
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default:
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return(EINVAL);
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}
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break;
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case MII_TICK:
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/*
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* If we're not currently selected, just return.
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*/
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if (IFM_INST(ife->ifm_media) != sc->mii_inst)
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return (0);
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/*
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* Is the interface even up?
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*/
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if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
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return (0);
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/*
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* Only used for autonegotiation.
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*/
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if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
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break;
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reg = CSR_READ_4(dc_sc, DC_10BTSTAT);
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if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100))
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break;
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/*
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* Only retry autonegotiation every 5 seconds.
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*
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* Otherwise, fall through to calling dcphy_status()
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* since real Intel 21143 chips don't show valid link
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* status until autonegotiation is switched off, and
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* that only happens in dcphy_status(). Without this,
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* successful autonegotiation is never recognised on
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* these chips.
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*/
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if (++sc->mii_ticks <= 50)
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break;
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sc->mii_ticks = 0;
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dcphy_auto(sc);
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break;
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}
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/* Update the media status. */
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dcphy_status(sc);
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/* Callback if something changed. */
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mii_phy_update(sc, cmd);
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return (0);
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}
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static void
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dcphy_status(struct mii_softc *sc)
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{
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struct mii_data *mii = sc->mii_pdata;
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int reg, anlpar, tstat = 0;
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struct dc_softc *dc_sc;
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dc_sc = mii->mii_ifp->if_softc;
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mii->mii_media_status = IFM_AVALID;
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mii->mii_media_active = IFM_ETHER;
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if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
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return;
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reg = CSR_READ_4(dc_sc, DC_10BTSTAT);
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if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100))
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mii->mii_media_status |= IFM_ACTIVE;
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if (CSR_READ_4(dc_sc, DC_10BTCTRL) & DC_TCTL_AUTONEGENBL) {
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/* Erg, still trying, I guess... */
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tstat = CSR_READ_4(dc_sc, DC_10BTSTAT);
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if ((tstat & DC_TSTAT_ANEGSTAT) != DC_ASTAT_AUTONEGCMP) {
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if ((DC_IS_MACRONIX(dc_sc) || DC_IS_PNICII(dc_sc)) &&
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(tstat & DC_TSTAT_ANEGSTAT) == DC_ASTAT_DISABLE)
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goto skip;
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mii->mii_media_active |= IFM_NONE;
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return;
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}
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if (tstat & DC_TSTAT_LP_CAN_NWAY) {
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anlpar = tstat >> 16;
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if (anlpar & ANLPAR_TX_FD &&
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sc->mii_capabilities & BMSR_100TXFDX)
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mii->mii_media_active |= IFM_100_TX|IFM_FDX;
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else if (anlpar & ANLPAR_T4 &&
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sc->mii_capabilities & BMSR_100T4)
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mii->mii_media_active |= IFM_100_T4;
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else if (anlpar & ANLPAR_TX &&
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sc->mii_capabilities & BMSR_100TXHDX)
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mii->mii_media_active |= IFM_100_TX;
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else if (anlpar & ANLPAR_10_FD)
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mii->mii_media_active |= IFM_10_T|IFM_FDX;
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else if (anlpar & ANLPAR_10)
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mii->mii_media_active |= IFM_10_T;
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else
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mii->mii_media_active |= IFM_NONE;
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if (DC_IS_INTEL(dc_sc))
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DC_CLRBIT(dc_sc, DC_10BTCTRL,
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DC_TCTL_AUTONEGENBL);
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return;
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}
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/*
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* If the other side doesn't support NWAY, then the
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* best we can do is determine if we have a 10Mbps or
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* 100Mbps link. There's no way to know if the link
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* is full or half duplex, so we default to half duplex
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* and hope that the user is clever enough to manually
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* change the media settings if we're wrong.
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*/
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if (!(reg & DC_TSTAT_LS100))
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mii->mii_media_active |= IFM_100_TX;
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else if (!(reg & DC_TSTAT_LS10))
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mii->mii_media_active |= IFM_10_T;
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else
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mii->mii_media_active |= IFM_NONE;
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if (DC_IS_INTEL(dc_sc))
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DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
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return;
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}
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skip:
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if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_SPEEDSEL)
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mii->mii_media_active |= IFM_10_T;
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else
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mii->mii_media_active |= IFM_100_TX;
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if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_FULLDUPLEX)
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mii->mii_media_active |= IFM_FDX;
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return;
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}
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static int
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dcphy_auto(struct mii_softc *mii)
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{
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struct dc_softc *sc;
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sc = mii->mii_pdata->mii_ifp->if_softc;
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DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL);
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DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_FULLDUPLEX);
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DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET);
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if (mii->mii_capabilities & BMSR_100TXHDX)
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CSR_WRITE_4(sc, DC_10BTCTRL, 0x3FFFF);
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else
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CSR_WRITE_4(sc, DC_10BTCTRL, 0xFFFF);
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DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET);
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DC_SETBIT(sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
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DC_SETBIT(sc, DC_10BTSTAT, DC_ASTAT_TXDISABLE);
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return(EJUSTRETURN);
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}
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static void
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dcphy_reset(struct mii_softc *mii)
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{
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struct dc_softc *sc;
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sc = mii->mii_pdata->mii_ifp->if_softc;
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DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET);
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DELAY(1000);
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DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET);
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return;
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}
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