c563d53362
so that all implemented variants have proper prototypes. The 8-bit, 16-bit and 64-bit variants are not implemented. This really fixes the current build breakages caused by type casting and struct aliasing rules.
533 lines
13 KiB
C
533 lines
13 KiB
C
/*-
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* Copyright (c) 2008 Marcel Moolenaar
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* Copyright (c) 2001 Benno Rice
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* Copyright (c) 2001 David E. O'Brien
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* Copyright (c) 1998 Doug Rabson
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_ATOMIC_H_
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#define _MACHINE_ATOMIC_H_
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#ifndef _SYS_CDEFS_H_
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#error this file needs sys/cdefs.h as a prerequisite
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#endif
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#define __ATOMIC_BARRIER \
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__asm __volatile("sync" : : : "memory")
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/*
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* atomic_add(p, v)
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* { *p += v; }
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*/
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#define __ATOMIC_ADD_8(p, v, t) \
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8-bit atomic_add not implemented
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#define __ATOMIC_ADD_16(p, v, t) \
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16-bit atomic_add not implemented
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#define __ATOMIC_ADD_32(p, v, t) \
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__asm __volatile( \
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"1: lwarx %0, 0, %2\n" \
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" add %0, %3, %0\n" \
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" stwcx. %0, 0, %2\n" \
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" bne- 1b\n" \
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: "=&r" (t), "=m" (*p) \
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: "r" (p), "r" (v), "m" (*p) \
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: "cc", "memory") \
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/* __ATOMIC_ADD_32 */
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#define __ATOMIC_ADD_64(p, v, t) \
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64-bit atomic_add not implemented
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#define _ATOMIC_ADD(width, suffix, type) \
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static __inline void \
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atomic_add_##suffix(volatile type *p, type v) { \
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type t; \
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__ATOMIC_ADD_##width(p, v, t); \
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} \
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\
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static __inline void \
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atomic_add_acq_##suffix(volatile type *p, type v) { \
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type t; \
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__ATOMIC_ADD_##width(p, v, t); \
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__ATOMIC_BARRIER; \
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} \
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\
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static __inline void \
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atomic_add_rel_##suffix(volatile type *p, type v) { \
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type t; \
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__ATOMIC_BARRIER; \
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__ATOMIC_ADD_##width(p, v, t); \
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} \
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/* _ATOMIC_ADD */
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#if 0
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_ATOMIC_ADD(8, 8, uint8_t)
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_ATOMIC_ADD(8, char, u_char)
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_ATOMIC_ADD(16, 16, uint16_t)
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_ATOMIC_ADD(16, short, u_short)
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#endif
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_ATOMIC_ADD(32, 32, uint32_t)
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_ATOMIC_ADD(32, int, u_int)
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_ATOMIC_ADD(32, long, u_long)
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_ATOMIC_ADD(32, ptr, uintptr_t)
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#if 0
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_ATOMIC_ADD(64, 64, uint64_t)
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_ATOMIC_ADD(64, long_long, u_long_long)
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#endif
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#undef _ATOMIC_ADD
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#undef __ATOMIC_ADD_64
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#undef __ATOMIC_ADD_32
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#undef __ATOMIC_ADD_16
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#undef __ATOMIC_ADD_8
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/*
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* atomic_clear(p, v)
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* { *p &= ~v; }
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*/
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#define __ATOMIC_CLEAR_8(p, v, t) \
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8-bit atomic_add not implemented
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#define __ATOMIC_CLEAR_16(p, v, t) \
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16-bit atomic_add not implemented
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#define __ATOMIC_CLEAR_32(p, v, t) \
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__asm __volatile( \
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"1: lwarx %0, 0, %2\n" \
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" andc %0, %0, %3\n" \
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" stwcx. %0, 0, %2\n" \
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" bne- 1b\n" \
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: "=&r" (t), "=m" (*p) \
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: "r" (p), "r" (v), "m" (*p) \
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: "cc", "memory") \
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/* __ATOMIC_CLEAR_32 */
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#define __ATOMIC_CLEAR_64(p, v, t) \
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64-bit atomic_add not implemented
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#define _ATOMIC_CLEAR(width, suffix, type) \
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static __inline void \
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atomic_clear_##suffix(volatile type *p, type v) { \
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type t; \
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__ATOMIC_CLEAR_##width(p, v, t); \
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} \
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\
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static __inline void \
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atomic_clear_acq_##suffix(volatile type *p, type v) { \
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type t; \
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__ATOMIC_CLEAR_##width(p, v, t); \
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__ATOMIC_BARRIER; \
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} \
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\
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static __inline void \
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atomic_clear_rel_##suffix(volatile type *p, type v) { \
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type t; \
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__ATOMIC_BARRIER; \
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__ATOMIC_CLEAR_##width(p, v, t); \
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} \
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/* _ATOMIC_CLEAR */
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#if 0
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_ATOMIC_CLEAR(8, 8, uint8_t)
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_ATOMIC_CLEAR(8, char, u_char)
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_ATOMIC_CLEAR(16, 16, uint16_t)
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_ATOMIC_CLEAR(16, short, u_short)
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#endif
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_ATOMIC_CLEAR(32, 32, uint32_t)
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_ATOMIC_CLEAR(32, int, u_int)
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_ATOMIC_CLEAR(32, long, u_long)
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_ATOMIC_CLEAR(32, ptr, uintptr_t)
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#if 0
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_ATOMIC_CLEAR(64, 64, uint64_t)
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_ATOMIC_CLEAR(64, long_long, u_long_long)
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#endif
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#undef _ATOMIC_CLEAR
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#undef __ATOMIC_CLEAR_64
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#undef __ATOMIC_CLEAR_32
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#undef __ATOMIC_CLEAR_16
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#undef __ATOMIC_CLEAR_8
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/*
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* atomic_cmpset(p, o, n)
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*/
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/* TODO -- see below */
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/*
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* atomic_load_acq(p)
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*/
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/* TODO -- see below */
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/*
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* atomic_readandclear(p)
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*/
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/* TODO -- see below */
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/*
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* atomic_set(p, v)
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* { *p |= v; }
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*/
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#define __ATOMIC_SET_8(p, v, t) \
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8-bit atomic_set not implemented
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#define __ATOMIC_SET_16(p, v, t) \
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16-bit atomic_set not implemented
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#define __ATOMIC_SET_32(p, v, t) \
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__asm __volatile( \
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"1: lwarx %0, 0, %2\n" \
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" or %0, %3, %0\n" \
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" stwcx. %0, 0, %2\n" \
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" bne- 1b\n" \
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: "=&r" (t), "=m" (*p) \
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: "r" (p), "r" (v), "m" (*p) \
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: "cc", "memory") \
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/* __ATOMIC_SET_32 */
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#define __ATOMIC_SET_64(p, v, t) \
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64-bit atomic_set not implemented
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#define _ATOMIC_SET(width, suffix, type) \
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static __inline void \
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atomic_set_##suffix(volatile type *p, type v) { \
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type t; \
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__ATOMIC_SET_##width(p, v, t); \
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} \
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\
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static __inline void \
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atomic_set_acq_##suffix(volatile type *p, type v) { \
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type t; \
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__ATOMIC_SET_##width(p, v, t); \
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__ATOMIC_BARRIER; \
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} \
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\
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static __inline void \
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atomic_set_rel_##suffix(volatile type *p, type v) { \
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type t; \
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__ATOMIC_BARRIER; \
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__ATOMIC_SET_##width(p, v, t); \
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} \
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/* _ATOMIC_SET */
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#if 0
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_ATOMIC_SET(8, 8, uint8_t)
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_ATOMIC_SET(8, char, u_char)
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_ATOMIC_SET(16, 16, uint16_t)
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_ATOMIC_SET(16, short, u_short)
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#endif
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_ATOMIC_SET(32, 32, uint32_t)
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_ATOMIC_SET(32, int, u_int)
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_ATOMIC_SET(32, long, u_long)
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_ATOMIC_SET(32, ptr, uintptr_t)
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#if 0
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_ATOMIC_SET(64, 64, uint64_t)
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_ATOMIC_SET(64, long_long, u_long_long)
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#endif
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#undef _ATOMIC_SET
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#undef __ATOMIC_SET_64
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#undef __ATOMIC_SET_32
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#undef __ATOMIC_SET_16
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#undef __ATOMIC_SET_8
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/*
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* atomic_subtract(p, v)
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* { *p -= v; }
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*/
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#define __ATOMIC_SUBTRACT_8(p, v, t) \
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8-bit atomic_subtract not implemented
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#define __ATOMIC_SUBTRACT_16(p, v, t) \
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16-bit atomic_subtract not implemented
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#define __ATOMIC_SUBTRACT_32(p, v, t) \
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__asm __volatile( \
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"1: lwarx %0, 0, %2\n" \
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" subf %0, %3, %0\n" \
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" stwcx. %0, 0, %2\n" \
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" bne- 1b\n" \
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: "=&r" (t), "=m" (*p) \
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: "r" (p), "r" (v), "m" (*p) \
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: "cc", "memory") \
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/* __ATOMIC_SUBTRACT_32 */
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#define __ATOMIC_SUBTRACT_64(p, v, t) \
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64-bit atomic_subtract not implemented
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#define _ATOMIC_SUBTRACT(width, suffix, type) \
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static __inline void \
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atomic_subtract_##suffix(volatile type *p, type v) { \
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type t; \
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__ATOMIC_SUBTRACT_##width(p, v, t); \
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} \
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\
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static __inline void \
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atomic_subtract_acq_##suffix(volatile type *p, type v) { \
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type t; \
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__ATOMIC_SUBTRACT_##width(p, v, t); \
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__ATOMIC_BARRIER; \
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} \
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\
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static __inline void \
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atomic_subtract_rel_##suffix(volatile type *p, type v) { \
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type t; \
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__ATOMIC_BARRIER; \
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__ATOMIC_SUBTRACT_##width(p, v, t); \
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} \
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/* _ATOMIC_SUBTRACT */
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#if 0
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_ATOMIC_SUBTRACT(8, 8, uint8_t)
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_ATOMIC_SUBTRACT(8, char, u_char)
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_ATOMIC_SUBTRACT(16, 16, uint16_t)
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_ATOMIC_SUBTRACT(16, short, u_short)
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#endif
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_ATOMIC_SUBTRACT(32, 32, uint32_t)
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_ATOMIC_SUBTRACT(32, int, u_int)
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_ATOMIC_SUBTRACT(32, long, u_long)
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_ATOMIC_SUBTRACT(32, ptr, uintptr_t)
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#if 0
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_ATOMIC_SUBTRACT(64, 64, uint64_t)
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_ATOMIC_SUBTRACT(64, long_long, u_long_long)
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#endif
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#undef _ATOMIC_SUBTRACT
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#undef __ATOMIC_SUBTRACT_64
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#undef __ATOMIC_SUBTRACT_32
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#undef __ATOMIC_SUBTRACT_16
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#undef __ATOMIC_SUBTRACT_8
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/*
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* atomic_store_rel(p, v)
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*/
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/* TODO -- see below */
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/*
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* Old/original implementations that still need revisiting.
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*/
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static __inline uint32_t
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atomic_readandclear_32(volatile uint32_t *addr)
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{
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uint32_t result,temp;
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#ifdef __GNUCLIKE_ASM
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__asm __volatile (
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"\tsync\n" /* drain writes */
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"1:\tlwarx %0, 0, %3\n\t" /* load old value */
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"li %1, 0\n\t" /* load new value */
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"stwcx. %1, 0, %3\n\t" /* attempt to store */
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"bne- 1b\n\t" /* spin if failed */
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: "=&r"(result), "=&r"(temp), "=m" (*addr)
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: "r" (addr), "m" (*addr)
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: "cc", "memory");
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#endif
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return (result);
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}
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#define atomic_readandclear_int atomic_readandclear_32
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#define atomic_readandclear_long atomic_readandclear_32
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#define atomic_readandclear_ptr atomic_readandclear_32
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/*
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* We assume that a = b will do atomic loads and stores.
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*/
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#define ATOMIC_STORE_LOAD(TYPE, WIDTH) \
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static __inline u_##TYPE \
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atomic_load_acq_##WIDTH(volatile u_##TYPE *p) \
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{ \
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u_##TYPE v; \
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\
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v = *p; \
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__ATOMIC_BARRIER; \
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return (v); \
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} \
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\
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static __inline void \
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atomic_store_rel_##WIDTH(volatile u_##TYPE *p, u_##TYPE v) \
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{ \
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__ATOMIC_BARRIER; \
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*p = v; \
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} \
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\
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static __inline u_##TYPE \
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atomic_load_acq_##TYPE(volatile u_##TYPE *p) \
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{ \
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u_##TYPE v; \
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\
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v = *p; \
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__ATOMIC_BARRIER; \
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return (v); \
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} \
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\
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static __inline void \
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atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v) \
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{ \
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__ATOMIC_BARRIER; \
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*p = v; \
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}
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ATOMIC_STORE_LOAD(char, 8)
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ATOMIC_STORE_LOAD(short, 16)
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ATOMIC_STORE_LOAD(int, 32)
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#define atomic_load_acq_long atomic_load_acq_32
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#define atomic_store_rel_long atomic_store_rel_32
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#define atomic_load_acq_ptr atomic_load_acq_32
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#define atomic_store_rel_ptr atomic_store_rel_32
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#undef ATOMIC_STORE_LOAD
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/*
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* Atomically compare the value stored at *p with cmpval and if the
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* two values are equal, update the value of *p with newval. Returns
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* zero if the compare failed, nonzero otherwise.
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*/
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static __inline uint32_t
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atomic_cmpset_32(volatile uint32_t* p, uint32_t cmpval, uint32_t newval)
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{
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uint32_t ret;
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#ifdef __GNUCLIKE_ASM
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__asm __volatile (
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"1:\tlwarx %0, 0, %2\n\t" /* load old value */
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"cmplw %3, %0\n\t" /* compare */
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"bne 2f\n\t" /* exit if not equal */
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"stwcx. %4, 0, %2\n\t" /* attempt to store */
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"bne- 1b\n\t" /* spin if failed */
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"li %0, 1\n\t" /* success - retval = 1 */
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"b 3f\n\t" /* we've succeeded */
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"2:\n\t"
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"stwcx. %0, 0, %2\n\t" /* clear reservation (74xx) */
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"li %0, 0\n\t" /* failure - retval = 0 */
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"3:\n\t"
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: "=&r" (ret), "=m" (*p)
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: "r" (p), "r" (cmpval), "r" (newval), "m" (*p)
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: "cc", "memory");
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#endif
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return (ret);
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}
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static __inline u_long
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atomic_cmpset_long(volatile u_long* p, u_long cmpval, u_long newval)
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{
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uint32_t ret;
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#ifdef __GNUCLIKE_ASM
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__asm __volatile (
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"1:\tlwarx %0, 0, %2\n\t" /* load old value */
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"cmplw %3, %0\n\t" /* compare */
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"bne 2f\n\t" /* exit if not equal */
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"stwcx. %4, 0, %2\n\t" /* attempt to store */
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"bne- 1b\n\t" /* spin if failed */
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"li %0, 1\n\t" /* success - retval = 1 */
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"b 3f\n\t" /* we've succeeded */
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"2:\n\t"
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"stwcx. %0, 0, %2\n\t" /* clear reservation (74xx) */
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"li %0, 0\n\t" /* failure - retval = 0 */
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"3:\n\t"
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: "=&r" (ret), "=m" (*p)
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: "r" (p), "r" (cmpval), "r" (newval), "m" (*p)
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: "cc", "memory");
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#endif
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return (ret);
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}
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#define atomic_cmpset_int atomic_cmpset_32
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#define atomic_cmpset_ptr(dst, old, new) \
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atomic_cmpset_32((volatile u_int *)(dst), (u_int)(old), (u_int)(new))
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static __inline uint32_t
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atomic_cmpset_acq_32(volatile uint32_t *p, uint32_t cmpval, uint32_t newval)
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|
{
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int retval;
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|
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retval = atomic_cmpset_32(p, cmpval, newval);
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__ATOMIC_BARRIER;
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return (retval);
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}
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|
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static __inline uint32_t
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atomic_cmpset_rel_32(volatile uint32_t *p, uint32_t cmpval, uint32_t newval)
|
|
{
|
|
__ATOMIC_BARRIER;
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|
return (atomic_cmpset_32(p, cmpval, newval));
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|
}
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|
|
|
static __inline u_long
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|
atomic_cmpset_acq_long(volatile u_long *p, u_long cmpval, u_long newval)
|
|
{
|
|
int retval;
|
|
|
|
retval = atomic_cmpset_long(p, cmpval, newval);
|
|
__ATOMIC_BARRIER;
|
|
return (retval);
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|
}
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|
|
|
static __inline uint32_t
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|
atomic_cmpset_rel_long(volatile u_long *p, u_long cmpval, u_long newval)
|
|
{
|
|
__ATOMIC_BARRIER;
|
|
return (atomic_cmpset_long(p, cmpval, newval));
|
|
}
|
|
|
|
#define atomic_cmpset_acq_int atomic_cmpset_acq_32
|
|
#define atomic_cmpset_rel_int atomic_cmpset_rel_32
|
|
|
|
#define atomic_cmpset_acq_ptr(dst, old, new) \
|
|
atomic_cmpset_acq_32((volatile u_int *)(dst), (u_int)(old), (u_int)(new))
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|
#define atomic_cmpset_rel_ptr(dst, old, new) \
|
|
atomic_cmpset_rel_32((volatile u_int *)(dst), (u_int)(old), (u_int)(new))
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|
|
|
static __inline uint32_t
|
|
atomic_fetchadd_32(volatile uint32_t *p, uint32_t v)
|
|
{
|
|
uint32_t value;
|
|
|
|
do {
|
|
value = *p;
|
|
} while (!atomic_cmpset_32(p, value, value + v));
|
|
return (value);
|
|
}
|
|
|
|
#define atomic_fetchadd_int atomic_fetchadd_32
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|
#define atomic_fetchadd_long(p, v) \
|
|
(u_long)atomic_fetchadd_32((volatile u_int *)(p), (u_int)(v))
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|
|
|
#undef __ATOMIC_BARRIER
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|
|
|
#endif /* ! _MACHINE_ATOMIC_H_ */
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