1a7aa92745
The 802.11-2012 spec talks about this - section 10.1.3.2 - Beacon Generation in Infrastructure Networks. So yes, we should be expecting beacons to be going out in multiples of intval. Silly adrian. So: * fix the FreeBSD APs that are sending beacons at incorrect TBTTs (target beacon transmit time); and * yes indeed we will have to wake up out of network sleep until we sync a beacon.
1206 lines
34 KiB
C
1206 lines
34 KiB
C
/*-
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* Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
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* redistribution must be conditioned upon including a substantially
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* similar Disclaimer requirement for further binary redistribution.
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*
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
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* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
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* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
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* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGES.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* Driver for the Atheros Wireless LAN controller.
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*
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* This software is derived from work of Atsushi Onoe; his contribution
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* is greatly appreciated.
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*/
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#include "opt_inet.h"
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#include "opt_ath.h"
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/*
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* This is needed for register operations which are performed
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* by the driver - eg, calls to ath_hal_gettsf32().
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*
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* It's also required for any AH_DEBUG checks in here, eg the
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* module dependencies.
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*/
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#include "opt_ah.h"
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#include "opt_wlan.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/sysctl.h>
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#include <sys/mbuf.h>
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#include <sys/malloc.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/kernel.h>
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#include <sys/socket.h>
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#include <sys/sockio.h>
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#include <sys/errno.h>
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#include <sys/callout.h>
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#include <sys/bus.h>
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#include <sys/endian.h>
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#include <sys/kthread.h>
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#include <sys/taskqueue.h>
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#include <sys/priv.h>
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#include <sys/module.h>
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#include <sys/ktr.h>
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#include <sys/smp.h> /* for mp_ncpus */
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#include <machine/bus.h>
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#include <net/if.h>
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#include <net/if_var.h>
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#include <net/if_dl.h>
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#include <net/if_media.h>
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#include <net/if_types.h>
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#include <net/if_arp.h>
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#include <net/ethernet.h>
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#include <net/if_llc.h>
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#include <net80211/ieee80211_var.h>
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#include <net80211/ieee80211_regdomain.h>
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#ifdef IEEE80211_SUPPORT_SUPERG
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#include <net80211/ieee80211_superg.h>
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#endif
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#include <net/bpf.h>
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#ifdef INET
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#include <netinet/in.h>
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#include <netinet/if_ether.h>
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#endif
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#include <dev/ath/if_athvar.h>
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#include <dev/ath/if_ath_debug.h>
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#include <dev/ath/if_ath_misc.h>
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#include <dev/ath/if_ath_tx.h>
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#include <dev/ath/if_ath_beacon.h>
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#ifdef ATH_TX99_DIAG
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#include <dev/ath/ath_tx99/ath_tx99.h>
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#endif
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/*
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* Setup a h/w transmit queue for beacons.
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*/
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int
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ath_beaconq_setup(struct ath_softc *sc)
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{
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struct ath_hal *ah = sc->sc_ah;
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HAL_TXQ_INFO qi;
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memset(&qi, 0, sizeof(qi));
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qi.tqi_aifs = HAL_TXQ_USEDEFAULT;
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qi.tqi_cwmin = HAL_TXQ_USEDEFAULT;
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qi.tqi_cwmax = HAL_TXQ_USEDEFAULT;
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/* NB: for dynamic turbo, don't enable any other interrupts */
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qi.tqi_qflags = HAL_TXQ_TXDESCINT_ENABLE;
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if (sc->sc_isedma)
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qi.tqi_qflags |= HAL_TXQ_TXOKINT_ENABLE |
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HAL_TXQ_TXERRINT_ENABLE;
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return ath_hal_setuptxqueue(ah, HAL_TX_QUEUE_BEACON, &qi);
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}
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/*
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* Setup the transmit queue parameters for the beacon queue.
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*/
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int
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ath_beaconq_config(struct ath_softc *sc)
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{
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#define ATH_EXPONENT_TO_VALUE(v) ((1<<(v))-1)
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struct ieee80211com *ic = &sc->sc_ic;
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struct ath_hal *ah = sc->sc_ah;
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HAL_TXQ_INFO qi;
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ath_hal_gettxqueueprops(ah, sc->sc_bhalq, &qi);
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if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
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ic->ic_opmode == IEEE80211_M_MBSS) {
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/*
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* Always burst out beacon and CAB traffic.
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*/
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qi.tqi_aifs = ATH_BEACON_AIFS_DEFAULT;
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qi.tqi_cwmin = ATH_BEACON_CWMIN_DEFAULT;
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qi.tqi_cwmax = ATH_BEACON_CWMAX_DEFAULT;
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} else {
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struct wmeParams *wmep =
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&ic->ic_wme.wme_chanParams.cap_wmeParams[WME_AC_BE];
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/*
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* Adhoc mode; important thing is to use 2x cwmin.
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*/
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qi.tqi_aifs = wmep->wmep_aifsn;
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qi.tqi_cwmin = 2*ATH_EXPONENT_TO_VALUE(wmep->wmep_logcwmin);
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qi.tqi_cwmax = ATH_EXPONENT_TO_VALUE(wmep->wmep_logcwmax);
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}
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if (!ath_hal_settxqueueprops(ah, sc->sc_bhalq, &qi)) {
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device_printf(sc->sc_dev, "unable to update parameters for "
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"beacon hardware queue!\n");
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return 0;
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} else {
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ath_hal_resettxqueue(ah, sc->sc_bhalq); /* push to h/w */
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return 1;
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}
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#undef ATH_EXPONENT_TO_VALUE
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}
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/*
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* Allocate and setup an initial beacon frame.
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*/
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int
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ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_node *ni)
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{
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struct ieee80211vap *vap = ni->ni_vap;
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struct ath_vap *avp = ATH_VAP(vap);
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struct ath_buf *bf;
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struct mbuf *m;
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int error;
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bf = avp->av_bcbuf;
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DPRINTF(sc, ATH_DEBUG_NODE, "%s: bf_m=%p, bf_node=%p\n",
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__func__, bf->bf_m, bf->bf_node);
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if (bf->bf_m != NULL) {
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bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
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m_freem(bf->bf_m);
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bf->bf_m = NULL;
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}
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if (bf->bf_node != NULL) {
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ieee80211_free_node(bf->bf_node);
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bf->bf_node = NULL;
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}
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/*
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* NB: the beacon data buffer must be 32-bit aligned;
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* we assume the mbuf routines will return us something
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* with this alignment (perhaps should assert).
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*/
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m = ieee80211_beacon_alloc(ni);
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if (m == NULL) {
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device_printf(sc->sc_dev, "%s: cannot get mbuf\n", __func__);
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sc->sc_stats.ast_be_nombuf++;
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return ENOMEM;
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}
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error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m,
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bf->bf_segs, &bf->bf_nseg,
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BUS_DMA_NOWAIT);
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if (error != 0) {
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device_printf(sc->sc_dev,
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"%s: cannot map mbuf, bus_dmamap_load_mbuf_sg returns %d\n",
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__func__, error);
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m_freem(m);
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return error;
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}
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/*
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* Calculate a TSF adjustment factor required for staggered
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* beacons. Note that we assume the format of the beacon
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* frame leaves the tstamp field immediately following the
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* header.
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*/
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if (sc->sc_stagbeacons && avp->av_bslot > 0) {
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uint64_t tsfadjust;
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struct ieee80211_frame *wh;
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/*
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* The beacon interval is in TU's; the TSF is in usecs.
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* We figure out how many TU's to add to align the timestamp
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* then convert to TSF units and handle byte swapping before
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* inserting it in the frame. The hardware will then add this
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* each time a beacon frame is sent. Note that we align vap's
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* 1..N and leave vap 0 untouched. This means vap 0 has a
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* timestamp in one beacon interval while the others get a
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* timstamp aligned to the next interval.
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*/
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tsfadjust = ni->ni_intval *
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(ATH_BCBUF - avp->av_bslot) / ATH_BCBUF;
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tsfadjust = htole64(tsfadjust << 10); /* TU -> TSF */
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DPRINTF(sc, ATH_DEBUG_BEACON,
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"%s: %s beacons bslot %d intval %u tsfadjust %llu\n",
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__func__, sc->sc_stagbeacons ? "stagger" : "burst",
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avp->av_bslot, ni->ni_intval,
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(long long unsigned) le64toh(tsfadjust));
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wh = mtod(m, struct ieee80211_frame *);
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memcpy(&wh[1], &tsfadjust, sizeof(tsfadjust));
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}
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bf->bf_m = m;
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bf->bf_node = ieee80211_ref_node(ni);
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return 0;
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}
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/*
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* Setup the beacon frame for transmit.
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*/
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static void
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ath_beacon_setup(struct ath_softc *sc, struct ath_buf *bf)
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{
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#define USE_SHPREAMBLE(_ic) \
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(((_ic)->ic_flags & (IEEE80211_F_SHPREAMBLE | IEEE80211_F_USEBARKER))\
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== IEEE80211_F_SHPREAMBLE)
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struct ieee80211_node *ni = bf->bf_node;
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struct ieee80211com *ic = ni->ni_ic;
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struct mbuf *m = bf->bf_m;
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struct ath_hal *ah = sc->sc_ah;
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struct ath_desc *ds;
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int flags, antenna;
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const HAL_RATE_TABLE *rt;
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u_int8_t rix, rate;
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HAL_DMA_ADDR bufAddrList[4];
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uint32_t segLenList[4];
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HAL_11N_RATE_SERIES rc[4];
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DPRINTF(sc, ATH_DEBUG_BEACON_PROC, "%s: m %p len %u\n",
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__func__, m, m->m_len);
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/* setup descriptors */
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ds = bf->bf_desc;
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bf->bf_last = bf;
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bf->bf_lastds = ds;
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flags = HAL_TXDESC_NOACK;
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if (ic->ic_opmode == IEEE80211_M_IBSS && sc->sc_hasveol) {
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/* self-linked descriptor */
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ath_hal_settxdesclink(sc->sc_ah, ds, bf->bf_daddr);
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flags |= HAL_TXDESC_VEOL;
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/*
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* Let hardware handle antenna switching.
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*/
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antenna = sc->sc_txantenna;
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} else {
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ath_hal_settxdesclink(sc->sc_ah, ds, 0);
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/*
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* Switch antenna every 4 beacons.
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* XXX assumes two antenna
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*/
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if (sc->sc_txantenna != 0)
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antenna = sc->sc_txantenna;
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else if (sc->sc_stagbeacons && sc->sc_nbcnvaps != 0)
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antenna = ((sc->sc_stats.ast_be_xmit / sc->sc_nbcnvaps) & 4 ? 2 : 1);
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else
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antenna = (sc->sc_stats.ast_be_xmit & 4 ? 2 : 1);
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}
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KASSERT(bf->bf_nseg == 1,
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("multi-segment beacon frame; nseg %u", bf->bf_nseg));
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/*
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* Calculate rate code.
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* XXX everything at min xmit rate
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*/
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rix = 0;
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rt = sc->sc_currates;
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rate = rt->info[rix].rateCode;
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if (USE_SHPREAMBLE(ic))
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rate |= rt->info[rix].shortPreamble;
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ath_hal_setuptxdesc(ah, ds
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, m->m_len + IEEE80211_CRC_LEN /* frame length */
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, sizeof(struct ieee80211_frame)/* header length */
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, HAL_PKT_TYPE_BEACON /* Atheros packet type */
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, ieee80211_get_node_txpower(ni) /* txpower XXX */
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, rate, 1 /* series 0 rate/tries */
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, HAL_TXKEYIX_INVALID /* no encryption */
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, antenna /* antenna mode */
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, flags /* no ack, veol for beacons */
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, 0 /* rts/cts rate */
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, 0 /* rts/cts duration */
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);
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/*
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* The EDMA HAL currently assumes that _all_ rate control
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* settings are done in ath_hal_set11nratescenario(), rather
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* than in ath_hal_setuptxdesc().
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*/
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if (sc->sc_isedma) {
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memset(&rc, 0, sizeof(rc));
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rc[0].ChSel = sc->sc_txchainmask;
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rc[0].Tries = 1;
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rc[0].Rate = rt->info[rix].rateCode;
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rc[0].RateIndex = rix;
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rc[0].tx_power_cap = 0x3f;
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rc[0].PktDuration =
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ath_hal_computetxtime(ah, rt, roundup(m->m_len, 4),
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rix, 0, AH_TRUE);
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ath_hal_set11nratescenario(ah, ds, 0, 0, rc, 4, flags);
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}
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/* NB: beacon's BufLen must be a multiple of 4 bytes */
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segLenList[0] = roundup(m->m_len, 4);
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segLenList[1] = segLenList[2] = segLenList[3] = 0;
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bufAddrList[0] = bf->bf_segs[0].ds_addr;
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bufAddrList[1] = bufAddrList[2] = bufAddrList[3] = 0;
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ath_hal_filltxdesc(ah, ds
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, bufAddrList
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, segLenList
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, 0 /* XXX desc id */
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, sc->sc_bhalq /* hardware TXQ */
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, AH_TRUE /* first segment */
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, AH_TRUE /* last segment */
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, ds /* first descriptor */
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);
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#if 0
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ath_desc_swap(ds);
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#endif
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#undef USE_SHPREAMBLE
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}
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void
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ath_beacon_update(struct ieee80211vap *vap, int item)
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{
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struct ieee80211_beacon_offsets *bo = &vap->iv_bcn_off;
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setbit(bo->bo_flags, item);
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}
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/*
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* Handle a beacon miss.
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*/
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void
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ath_beacon_miss(struct ath_softc *sc)
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{
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HAL_SURVEY_SAMPLE hs;
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HAL_BOOL ret;
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uint32_t hangs;
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bzero(&hs, sizeof(hs));
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ret = ath_hal_get_mib_cycle_counts(sc->sc_ah, &hs);
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if (ath_hal_gethangstate(sc->sc_ah, 0xffff, &hangs) && hangs != 0) {
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DPRINTF(sc, ATH_DEBUG_BEACON,
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"%s: hang=0x%08x\n",
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__func__,
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hangs);
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}
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#ifdef ATH_DEBUG_ALQ
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if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_MISSED_BEACON))
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if_ath_alq_post(&sc->sc_alq, ATH_ALQ_MISSED_BEACON, 0, NULL);
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#endif
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DPRINTF(sc, ATH_DEBUG_BEACON,
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"%s: valid=%d, txbusy=%u, rxbusy=%u, chanbusy=%u, "
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"extchanbusy=%u, cyclecount=%u\n",
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__func__,
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ret,
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hs.tx_busy,
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hs.rx_busy,
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hs.chan_busy,
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hs.ext_chan_busy,
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hs.cycle_count);
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}
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/*
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* Transmit a beacon frame at SWBA. Dynamic updates to the
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* frame contents are done as needed and the slot time is
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* also adjusted based on current state.
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*/
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void
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ath_beacon_proc(void *arg, int pending)
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{
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struct ath_softc *sc = arg;
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struct ath_hal *ah = sc->sc_ah;
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struct ieee80211vap *vap;
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struct ath_buf *bf;
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int slot, otherant;
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uint32_t bfaddr;
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DPRINTF(sc, ATH_DEBUG_BEACON_PROC, "%s: pending %u\n",
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__func__, pending);
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/*
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* Check if the previous beacon has gone out. If
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* not don't try to post another, skip this period
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* and wait for the next. Missed beacons indicate
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* a problem and should not occur. If we miss too
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* many consecutive beacons reset the device.
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*/
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if (ath_hal_numtxpending(ah, sc->sc_bhalq) != 0) {
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sc->sc_bmisscount++;
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sc->sc_stats.ast_be_missed++;
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ath_beacon_miss(sc);
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DPRINTF(sc, ATH_DEBUG_BEACON,
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"%s: missed %u consecutive beacons\n",
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__func__, sc->sc_bmisscount);
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if (sc->sc_bmisscount >= ath_bstuck_threshold)
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taskqueue_enqueue(sc->sc_tq, &sc->sc_bstucktask);
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return;
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}
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if (sc->sc_bmisscount != 0) {
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DPRINTF(sc, ATH_DEBUG_BEACON,
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"%s: resume beacon xmit after %u misses\n",
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__func__, sc->sc_bmisscount);
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sc->sc_bmisscount = 0;
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#ifdef ATH_DEBUG_ALQ
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if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_RESUME_BEACON))
|
|
if_ath_alq_post(&sc->sc_alq, ATH_ALQ_RESUME_BEACON, 0, NULL);
|
|
#endif
|
|
}
|
|
|
|
if (sc->sc_stagbeacons) { /* staggered beacons */
|
|
struct ieee80211com *ic = &sc->sc_ic;
|
|
uint32_t tsftu;
|
|
|
|
tsftu = ath_hal_gettsf32(ah) >> 10;
|
|
/* XXX lintval */
|
|
slot = ((tsftu % ic->ic_lintval) * ATH_BCBUF) / ic->ic_lintval;
|
|
vap = sc->sc_bslot[(slot+1) % ATH_BCBUF];
|
|
bfaddr = 0;
|
|
if (vap != NULL && vap->iv_state >= IEEE80211_S_RUN) {
|
|
bf = ath_beacon_generate(sc, vap);
|
|
if (bf != NULL)
|
|
bfaddr = bf->bf_daddr;
|
|
}
|
|
} else { /* burst'd beacons */
|
|
uint32_t *bflink = &bfaddr;
|
|
|
|
for (slot = 0; slot < ATH_BCBUF; slot++) {
|
|
vap = sc->sc_bslot[slot];
|
|
if (vap != NULL && vap->iv_state >= IEEE80211_S_RUN) {
|
|
bf = ath_beacon_generate(sc, vap);
|
|
/*
|
|
* XXX TODO: this should use settxdesclinkptr()
|
|
* otherwise it won't work for EDMA chipsets!
|
|
*/
|
|
if (bf != NULL) {
|
|
/* XXX should do this using the ds */
|
|
*bflink = bf->bf_daddr;
|
|
ath_hal_gettxdesclinkptr(sc->sc_ah,
|
|
bf->bf_desc, &bflink);
|
|
}
|
|
}
|
|
}
|
|
/*
|
|
* XXX TODO: this should use settxdesclinkptr()
|
|
* otherwise it won't work for EDMA chipsets!
|
|
*/
|
|
*bflink = 0; /* terminate list */
|
|
}
|
|
|
|
/*
|
|
* Handle slot time change when a non-ERP station joins/leaves
|
|
* an 11g network. The 802.11 layer notifies us via callback,
|
|
* we mark updateslot, then wait one beacon before effecting
|
|
* the change. This gives associated stations at least one
|
|
* beacon interval to note the state change.
|
|
*/
|
|
/* XXX locking */
|
|
if (sc->sc_updateslot == UPDATE) {
|
|
sc->sc_updateslot = COMMIT; /* commit next beacon */
|
|
sc->sc_slotupdate = slot;
|
|
} else if (sc->sc_updateslot == COMMIT && sc->sc_slotupdate == slot)
|
|
ath_setslottime(sc); /* commit change to h/w */
|
|
|
|
/*
|
|
* Check recent per-antenna transmit statistics and flip
|
|
* the default antenna if noticeably more frames went out
|
|
* on the non-default antenna.
|
|
* XXX assumes 2 anntenae
|
|
*/
|
|
if (!sc->sc_diversity && (!sc->sc_stagbeacons || slot == 0)) {
|
|
otherant = sc->sc_defant & 1 ? 2 : 1;
|
|
if (sc->sc_ant_tx[otherant] > sc->sc_ant_tx[sc->sc_defant] + 2)
|
|
ath_setdefantenna(sc, otherant);
|
|
sc->sc_ant_tx[1] = sc->sc_ant_tx[2] = 0;
|
|
}
|
|
|
|
/* Program the CABQ with the contents of the CABQ txq and start it */
|
|
ATH_TXQ_LOCK(sc->sc_cabq);
|
|
ath_beacon_cabq_start(sc);
|
|
ATH_TXQ_UNLOCK(sc->sc_cabq);
|
|
|
|
/* Program the new beacon frame if we have one for this interval */
|
|
if (bfaddr != 0) {
|
|
/*
|
|
* Stop any current dma and put the new frame on the queue.
|
|
* This should never fail since we check above that no frames
|
|
* are still pending on the queue.
|
|
*/
|
|
if (! sc->sc_isedma) {
|
|
if (!ath_hal_stoptxdma(ah, sc->sc_bhalq)) {
|
|
DPRINTF(sc, ATH_DEBUG_ANY,
|
|
"%s: beacon queue %u did not stop?\n",
|
|
__func__, sc->sc_bhalq);
|
|
}
|
|
}
|
|
/* NB: cabq traffic should already be queued and primed */
|
|
|
|
ath_hal_puttxbuf(ah, sc->sc_bhalq, bfaddr);
|
|
ath_hal_txstart(ah, sc->sc_bhalq);
|
|
|
|
sc->sc_stats.ast_be_xmit++;
|
|
}
|
|
}
|
|
|
|
static void
|
|
ath_beacon_cabq_start_edma(struct ath_softc *sc)
|
|
{
|
|
struct ath_buf *bf, *bf_last;
|
|
struct ath_txq *cabq = sc->sc_cabq;
|
|
#if 0
|
|
struct ath_buf *bfi;
|
|
int i = 0;
|
|
#endif
|
|
|
|
ATH_TXQ_LOCK_ASSERT(cabq);
|
|
|
|
if (TAILQ_EMPTY(&cabq->axq_q))
|
|
return;
|
|
bf = TAILQ_FIRST(&cabq->axq_q);
|
|
bf_last = TAILQ_LAST(&cabq->axq_q, axq_q_s);
|
|
|
|
/*
|
|
* This is a dirty, dirty hack to push the contents of
|
|
* the cabq staging queue into the FIFO.
|
|
*
|
|
* This ideally should live in the EDMA code file
|
|
* and only push things into the CABQ if there's a FIFO
|
|
* slot.
|
|
*
|
|
* We can't treat this like a normal TX queue because
|
|
* in the case of multi-VAP traffic, we may have to flush
|
|
* the CABQ each new (staggered) beacon that goes out.
|
|
* But for non-staggered beacons, we could in theory
|
|
* handle multicast traffic for all VAPs in one FIFO
|
|
* push. Just keep all of this in mind if you're wondering
|
|
* how to correctly/better handle multi-VAP CABQ traffic
|
|
* with EDMA.
|
|
*/
|
|
|
|
/*
|
|
* Is the CABQ FIFO free? If not, complain loudly and
|
|
* don't queue anything. Maybe we'll flush the CABQ
|
|
* traffic, maybe we won't. But that'll happen next
|
|
* beacon interval.
|
|
*/
|
|
if (cabq->axq_fifo_depth >= HAL_TXFIFO_DEPTH) {
|
|
device_printf(sc->sc_dev,
|
|
"%s: Q%d: CAB FIFO queue=%d?\n",
|
|
__func__,
|
|
cabq->axq_qnum,
|
|
cabq->axq_fifo_depth);
|
|
return;
|
|
}
|
|
|
|
/*
|
|
* Ok, so here's the gymnastics reqiured to make this
|
|
* all sensible.
|
|
*/
|
|
|
|
/*
|
|
* Tag the first/last buffer appropriately.
|
|
*/
|
|
bf->bf_flags |= ATH_BUF_FIFOPTR;
|
|
bf_last->bf_flags |= ATH_BUF_FIFOEND;
|
|
|
|
#if 0
|
|
i = 0;
|
|
TAILQ_FOREACH(bfi, &cabq->axq_q, bf_list) {
|
|
ath_printtxbuf(sc, bf, cabq->axq_qnum, i, 0);
|
|
i++;
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* We now need to push this set of frames onto the tail
|
|
* of the FIFO queue. We don't adjust the aggregate
|
|
* count, only the queue depth counter(s).
|
|
* We also need to blank the link pointer now.
|
|
*/
|
|
TAILQ_CONCAT(&cabq->fifo.axq_q, &cabq->axq_q, bf_list);
|
|
cabq->axq_link = NULL;
|
|
cabq->fifo.axq_depth += cabq->axq_depth;
|
|
cabq->axq_depth = 0;
|
|
|
|
/* Bump FIFO queue */
|
|
cabq->axq_fifo_depth++;
|
|
|
|
/* Push the first entry into the hardware */
|
|
ath_hal_puttxbuf(sc->sc_ah, cabq->axq_qnum, bf->bf_daddr);
|
|
cabq->axq_flags |= ATH_TXQ_PUTRUNNING;
|
|
|
|
/* NB: gated by beacon so safe to start here */
|
|
ath_hal_txstart(sc->sc_ah, cabq->axq_qnum);
|
|
|
|
}
|
|
|
|
static void
|
|
ath_beacon_cabq_start_legacy(struct ath_softc *sc)
|
|
{
|
|
struct ath_buf *bf;
|
|
struct ath_txq *cabq = sc->sc_cabq;
|
|
|
|
ATH_TXQ_LOCK_ASSERT(cabq);
|
|
if (TAILQ_EMPTY(&cabq->axq_q))
|
|
return;
|
|
bf = TAILQ_FIRST(&cabq->axq_q);
|
|
|
|
/* Push the first entry into the hardware */
|
|
ath_hal_puttxbuf(sc->sc_ah, cabq->axq_qnum, bf->bf_daddr);
|
|
cabq->axq_flags |= ATH_TXQ_PUTRUNNING;
|
|
|
|
/* NB: gated by beacon so safe to start here */
|
|
ath_hal_txstart(sc->sc_ah, cabq->axq_qnum);
|
|
}
|
|
|
|
/*
|
|
* Start CABQ transmission - this assumes that all frames are prepped
|
|
* and ready in the CABQ.
|
|
*/
|
|
void
|
|
ath_beacon_cabq_start(struct ath_softc *sc)
|
|
{
|
|
struct ath_txq *cabq = sc->sc_cabq;
|
|
|
|
ATH_TXQ_LOCK_ASSERT(cabq);
|
|
|
|
if (TAILQ_EMPTY(&cabq->axq_q))
|
|
return;
|
|
|
|
if (sc->sc_isedma)
|
|
ath_beacon_cabq_start_edma(sc);
|
|
else
|
|
ath_beacon_cabq_start_legacy(sc);
|
|
}
|
|
|
|
struct ath_buf *
|
|
ath_beacon_generate(struct ath_softc *sc, struct ieee80211vap *vap)
|
|
{
|
|
struct ath_vap *avp = ATH_VAP(vap);
|
|
struct ath_txq *cabq = sc->sc_cabq;
|
|
struct ath_buf *bf;
|
|
struct mbuf *m;
|
|
int nmcastq, error;
|
|
|
|
KASSERT(vap->iv_state >= IEEE80211_S_RUN,
|
|
("not running, state %d", vap->iv_state));
|
|
KASSERT(avp->av_bcbuf != NULL, ("no beacon buffer"));
|
|
|
|
/*
|
|
* Update dynamic beacon contents. If this returns
|
|
* non-zero then we need to remap the memory because
|
|
* the beacon frame changed size (probably because
|
|
* of the TIM bitmap).
|
|
*/
|
|
bf = avp->av_bcbuf;
|
|
m = bf->bf_m;
|
|
/* XXX lock mcastq? */
|
|
nmcastq = avp->av_mcastq.axq_depth;
|
|
|
|
if (ieee80211_beacon_update(bf->bf_node, m, nmcastq)) {
|
|
/* XXX too conservative? */
|
|
bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
|
|
error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m,
|
|
bf->bf_segs, &bf->bf_nseg,
|
|
BUS_DMA_NOWAIT);
|
|
if (error != 0) {
|
|
if_printf(vap->iv_ifp,
|
|
"%s: bus_dmamap_load_mbuf_sg failed, error %u\n",
|
|
__func__, error);
|
|
return NULL;
|
|
}
|
|
}
|
|
if ((vap->iv_bcn_off.bo_tim[4] & 1) && cabq->axq_depth) {
|
|
DPRINTF(sc, ATH_DEBUG_BEACON,
|
|
"%s: cabq did not drain, mcastq %u cabq %u\n",
|
|
__func__, nmcastq, cabq->axq_depth);
|
|
sc->sc_stats.ast_cabq_busy++;
|
|
if (sc->sc_nvaps > 1 && sc->sc_stagbeacons) {
|
|
/*
|
|
* CABQ traffic from a previous vap is still pending.
|
|
* We must drain the q before this beacon frame goes
|
|
* out as otherwise this vap's stations will get cab
|
|
* frames from a different vap.
|
|
* XXX could be slow causing us to miss DBA
|
|
*/
|
|
/*
|
|
* XXX TODO: this doesn't stop CABQ DMA - it assumes
|
|
* that since we're about to transmit a beacon, we've
|
|
* already stopped transmitting on the CABQ. But this
|
|
* doesn't at all mean that the CABQ DMA QCU will
|
|
* accept a new TXDP! So what, should we do a DMA
|
|
* stop? What if it fails?
|
|
*
|
|
* More thought is required here.
|
|
*/
|
|
/*
|
|
* XXX can we even stop TX DMA here? Check what the
|
|
* reference driver does for cabq for beacons, given
|
|
* that stopping TX requires RX is paused.
|
|
*/
|
|
ath_tx_draintxq(sc, cabq);
|
|
}
|
|
}
|
|
ath_beacon_setup(sc, bf);
|
|
bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
|
|
|
|
/*
|
|
* Enable the CAB queue before the beacon queue to
|
|
* insure cab frames are triggered by this beacon.
|
|
*/
|
|
if (vap->iv_bcn_off.bo_tim[4] & 1) {
|
|
|
|
/* NB: only at DTIM */
|
|
ATH_TXQ_LOCK(&avp->av_mcastq);
|
|
if (nmcastq) {
|
|
struct ath_buf *bfm, *bfc_last;
|
|
|
|
/*
|
|
* Move frames from the s/w mcast q to the h/w cab q.
|
|
*
|
|
* XXX TODO: if we chain together multiple VAPs
|
|
* worth of CABQ traffic, should we keep the
|
|
* MORE data bit set on the last frame of each
|
|
* intermediary VAP (ie, only clear the MORE
|
|
* bit of the last frame on the last vap?)
|
|
*/
|
|
bfm = TAILQ_FIRST(&avp->av_mcastq.axq_q);
|
|
ATH_TXQ_LOCK(cabq);
|
|
|
|
/*
|
|
* If there's already a frame on the CABQ, we
|
|
* need to link to the end of the last frame.
|
|
* We can't use axq_link here because
|
|
* EDMA descriptors require some recalculation
|
|
* (checksum) to occur.
|
|
*/
|
|
bfc_last = ATH_TXQ_LAST(cabq, axq_q_s);
|
|
if (bfc_last != NULL) {
|
|
ath_hal_settxdesclink(sc->sc_ah,
|
|
bfc_last->bf_lastds,
|
|
bfm->bf_daddr);
|
|
}
|
|
ath_txqmove(cabq, &avp->av_mcastq);
|
|
ATH_TXQ_UNLOCK(cabq);
|
|
/*
|
|
* XXX not entirely accurate, in case a mcast
|
|
* queue frame arrived before we grabbed the TX
|
|
* lock.
|
|
*/
|
|
sc->sc_stats.ast_cabq_xmit += nmcastq;
|
|
}
|
|
ATH_TXQ_UNLOCK(&avp->av_mcastq);
|
|
}
|
|
return bf;
|
|
}
|
|
|
|
void
|
|
ath_beacon_start_adhoc(struct ath_softc *sc, struct ieee80211vap *vap)
|
|
{
|
|
struct ath_vap *avp = ATH_VAP(vap);
|
|
struct ath_hal *ah = sc->sc_ah;
|
|
struct ath_buf *bf;
|
|
struct mbuf *m;
|
|
int error;
|
|
|
|
KASSERT(avp->av_bcbuf != NULL, ("no beacon buffer"));
|
|
|
|
/*
|
|
* Update dynamic beacon contents. If this returns
|
|
* non-zero then we need to remap the memory because
|
|
* the beacon frame changed size (probably because
|
|
* of the TIM bitmap).
|
|
*/
|
|
bf = avp->av_bcbuf;
|
|
m = bf->bf_m;
|
|
if (ieee80211_beacon_update(bf->bf_node, m, 0)) {
|
|
/* XXX too conservative? */
|
|
bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
|
|
error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m,
|
|
bf->bf_segs, &bf->bf_nseg,
|
|
BUS_DMA_NOWAIT);
|
|
if (error != 0) {
|
|
if_printf(vap->iv_ifp,
|
|
"%s: bus_dmamap_load_mbuf_sg failed, error %u\n",
|
|
__func__, error);
|
|
return;
|
|
}
|
|
}
|
|
ath_beacon_setup(sc, bf);
|
|
bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
|
|
|
|
/* NB: caller is known to have already stopped tx dma */
|
|
ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr);
|
|
ath_hal_txstart(ah, sc->sc_bhalq);
|
|
}
|
|
|
|
/*
|
|
* Reclaim beacon resources and return buffer to the pool.
|
|
*/
|
|
void
|
|
ath_beacon_return(struct ath_softc *sc, struct ath_buf *bf)
|
|
{
|
|
|
|
DPRINTF(sc, ATH_DEBUG_NODE, "%s: free bf=%p, bf_m=%p, bf_node=%p\n",
|
|
__func__, bf, bf->bf_m, bf->bf_node);
|
|
if (bf->bf_m != NULL) {
|
|
bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
|
|
m_freem(bf->bf_m);
|
|
bf->bf_m = NULL;
|
|
}
|
|
if (bf->bf_node != NULL) {
|
|
ieee80211_free_node(bf->bf_node);
|
|
bf->bf_node = NULL;
|
|
}
|
|
TAILQ_INSERT_TAIL(&sc->sc_bbuf, bf, bf_list);
|
|
}
|
|
|
|
/*
|
|
* Reclaim beacon resources.
|
|
*/
|
|
void
|
|
ath_beacon_free(struct ath_softc *sc)
|
|
{
|
|
struct ath_buf *bf;
|
|
|
|
TAILQ_FOREACH(bf, &sc->sc_bbuf, bf_list) {
|
|
DPRINTF(sc, ATH_DEBUG_NODE,
|
|
"%s: free bf=%p, bf_m=%p, bf_node=%p\n",
|
|
__func__, bf, bf->bf_m, bf->bf_node);
|
|
if (bf->bf_m != NULL) {
|
|
bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
|
|
m_freem(bf->bf_m);
|
|
bf->bf_m = NULL;
|
|
}
|
|
if (bf->bf_node != NULL) {
|
|
ieee80211_free_node(bf->bf_node);
|
|
bf->bf_node = NULL;
|
|
}
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Configure the beacon and sleep timers.
|
|
*
|
|
* When operating as an AP this resets the TSF and sets
|
|
* up the hardware to notify us when we need to issue beacons.
|
|
*
|
|
* When operating in station mode this sets up the beacon
|
|
* timers according to the timestamp of the last received
|
|
* beacon and the current TSF, configures PCF and DTIM
|
|
* handling, programs the sleep registers so the hardware
|
|
* will wakeup in time to receive beacons, and configures
|
|
* the beacon miss handling so we'll receive a BMISS
|
|
* interrupt when we stop seeing beacons from the AP
|
|
* we've associated with.
|
|
*/
|
|
void
|
|
ath_beacon_config(struct ath_softc *sc, struct ieee80211vap *vap)
|
|
{
|
|
#define TSF_TO_TU(_h,_l) \
|
|
((((u_int32_t)(_h)) << 22) | (((u_int32_t)(_l)) >> 10))
|
|
#define FUDGE 2
|
|
struct ath_hal *ah = sc->sc_ah;
|
|
struct ieee80211com *ic = &sc->sc_ic;
|
|
struct ieee80211_node *ni;
|
|
u_int32_t nexttbtt, intval, tsftu;
|
|
u_int32_t nexttbtt_u8, intval_u8;
|
|
u_int64_t tsf, tsf_beacon;
|
|
|
|
if (vap == NULL)
|
|
vap = TAILQ_FIRST(&ic->ic_vaps); /* XXX */
|
|
/*
|
|
* Just ensure that we aren't being called when the last
|
|
* VAP is destroyed.
|
|
*/
|
|
if (vap == NULL) {
|
|
device_printf(sc->sc_dev, "%s: called with no VAPs\n",
|
|
__func__);
|
|
return;
|
|
}
|
|
|
|
ni = ieee80211_ref_node(vap->iv_bss);
|
|
|
|
ATH_LOCK(sc);
|
|
ath_power_set_power_state(sc, HAL_PM_AWAKE);
|
|
ATH_UNLOCK(sc);
|
|
|
|
/* extract tstamp from last beacon and convert to TU */
|
|
nexttbtt = TSF_TO_TU(le32dec(ni->ni_tstamp.data + 4),
|
|
le32dec(ni->ni_tstamp.data));
|
|
|
|
tsf_beacon = ((uint64_t) le32dec(ni->ni_tstamp.data + 4)) << 32;
|
|
tsf_beacon |= le32dec(ni->ni_tstamp.data);
|
|
|
|
if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
|
|
ic->ic_opmode == IEEE80211_M_MBSS) {
|
|
/*
|
|
* For multi-bss ap/mesh support beacons are either staggered
|
|
* evenly over N slots or burst together. For the former
|
|
* arrange for the SWBA to be delivered for each slot.
|
|
* Slots that are not occupied will generate nothing.
|
|
*/
|
|
/* NB: the beacon interval is kept internally in TU's */
|
|
intval = ni->ni_intval & HAL_BEACON_PERIOD;
|
|
if (sc->sc_stagbeacons)
|
|
intval /= ATH_BCBUF;
|
|
} else {
|
|
/* NB: the beacon interval is kept internally in TU's */
|
|
intval = ni->ni_intval & HAL_BEACON_PERIOD;
|
|
}
|
|
|
|
/*
|
|
* Note: rounding up to the next intval can cause problems with
|
|
* bad APs when we're in powersave mode.
|
|
*
|
|
* In STA mode with powersave enabled, beacons are only received
|
|
* whenever the beacon timer fires to wake up the hardware.
|
|
* Now, if this is rounded up to the next intval, it assumes
|
|
* that the AP has started transmitting beacons at TSF values that
|
|
* are multiples of intval, versus say being 25 TU off.
|
|
*
|
|
* The specification (802.11-2012 10.1.3.2 - Beacon Generation in
|
|
* Infrastructure Networks) requires APs be beaconing at a
|
|
* mutiple of intval. So, if bintval=100, then we shouldn't
|
|
* get beacons at intervals other than around multiples of 100.
|
|
*/
|
|
if (nexttbtt == 0) /* e.g. for ap mode */
|
|
nexttbtt = intval;
|
|
else
|
|
nexttbtt = roundup(nexttbtt, intval);
|
|
|
|
DPRINTF(sc, ATH_DEBUG_BEACON, "%s: nexttbtt %u intval %u (%u)\n",
|
|
__func__, nexttbtt, intval, ni->ni_intval);
|
|
if (ic->ic_opmode == IEEE80211_M_STA && !sc->sc_swbmiss) {
|
|
HAL_BEACON_STATE bs;
|
|
int dtimperiod, dtimcount;
|
|
int cfpperiod, cfpcount;
|
|
|
|
/*
|
|
* Setup dtim and cfp parameters according to
|
|
* last beacon we received (which may be none).
|
|
*/
|
|
dtimperiod = ni->ni_dtim_period;
|
|
if (dtimperiod <= 0) /* NB: 0 if not known */
|
|
dtimperiod = 1;
|
|
dtimcount = ni->ni_dtim_count;
|
|
if (dtimcount >= dtimperiod) /* NB: sanity check */
|
|
dtimcount = 0; /* XXX? */
|
|
cfpperiod = 1; /* NB: no PCF support yet */
|
|
cfpcount = 0;
|
|
/*
|
|
* Pull nexttbtt forward to reflect the current
|
|
* TSF and calculate dtim+cfp state for the result.
|
|
*/
|
|
tsf = ath_hal_gettsf64(ah);
|
|
tsftu = TSF_TO_TU(tsf>>32, tsf) + FUDGE;
|
|
|
|
DPRINTF(sc, ATH_DEBUG_BEACON,
|
|
"%s: beacon tsf=%llu, hw tsf=%llu, nexttbtt=%u, tsftu=%u\n",
|
|
__func__,
|
|
(unsigned long long) tsf_beacon,
|
|
(unsigned long long) tsf,
|
|
nexttbtt,
|
|
tsftu);
|
|
DPRINTF(sc, ATH_DEBUG_BEACON,
|
|
"%s: beacon tsf=%llu, hw tsf=%llu, tsf delta=%lld\n",
|
|
__func__,
|
|
(unsigned long long) tsf_beacon,
|
|
(unsigned long long) tsf,
|
|
(long long) tsf -
|
|
(long long) tsf_beacon);
|
|
|
|
DPRINTF(sc, ATH_DEBUG_BEACON,
|
|
"%s: nexttbtt=%llu, beacon tsf delta=%lld\n",
|
|
__func__,
|
|
(unsigned long long) nexttbtt,
|
|
(long long) ((long long) nexttbtt * 1024LL) - (long long) tsf_beacon);
|
|
|
|
/* XXX cfpcount? */
|
|
|
|
if (nexttbtt > tsftu) {
|
|
uint32_t countdiff, oldtbtt, remainder;
|
|
|
|
oldtbtt = nexttbtt;
|
|
remainder = (nexttbtt - tsftu) % intval;
|
|
nexttbtt = tsftu + remainder;
|
|
|
|
countdiff = (oldtbtt - nexttbtt) / intval % dtimperiod;
|
|
if (dtimcount > countdiff) {
|
|
dtimcount -= countdiff;
|
|
} else {
|
|
dtimcount += dtimperiod - countdiff;
|
|
}
|
|
} else { //nexttbtt <= tsftu
|
|
uint32_t countdiff, oldtbtt, remainder;
|
|
|
|
oldtbtt = nexttbtt;
|
|
remainder = (tsftu - nexttbtt) % intval;
|
|
nexttbtt = tsftu - remainder + intval;
|
|
countdiff = (nexttbtt - oldtbtt) / intval % dtimperiod;
|
|
if (dtimcount > countdiff) {
|
|
dtimcount -= countdiff;
|
|
} else {
|
|
dtimcount += dtimperiod - countdiff;
|
|
}
|
|
}
|
|
|
|
DPRINTF(sc, ATH_DEBUG_BEACON,
|
|
"%s: adj nexttbtt=%llu, rx tsf delta=%lld\n",
|
|
__func__,
|
|
(unsigned long long) nexttbtt,
|
|
(long long) ((long long)nexttbtt * 1024LL) - (long long)tsf);
|
|
|
|
memset(&bs, 0, sizeof(bs));
|
|
bs.bs_intval = intval;
|
|
bs.bs_nexttbtt = nexttbtt;
|
|
bs.bs_dtimperiod = dtimperiod*intval;
|
|
bs.bs_nextdtim = bs.bs_nexttbtt + dtimcount*intval;
|
|
bs.bs_cfpperiod = cfpperiod*bs.bs_dtimperiod;
|
|
bs.bs_cfpnext = bs.bs_nextdtim + cfpcount*bs.bs_dtimperiod;
|
|
bs.bs_cfpmaxduration = 0;
|
|
#if 0
|
|
/*
|
|
* The 802.11 layer records the offset to the DTIM
|
|
* bitmap while receiving beacons; use it here to
|
|
* enable h/w detection of our AID being marked in
|
|
* the bitmap vector (to indicate frames for us are
|
|
* pending at the AP).
|
|
* XXX do DTIM handling in s/w to WAR old h/w bugs
|
|
* XXX enable based on h/w rev for newer chips
|
|
*/
|
|
bs.bs_timoffset = ni->ni_timoff;
|
|
#endif
|
|
/*
|
|
* Calculate the number of consecutive beacons to miss
|
|
* before taking a BMISS interrupt.
|
|
* Note that we clamp the result to at most 10 beacons.
|
|
*/
|
|
bs.bs_bmissthreshold = vap->iv_bmissthreshold;
|
|
if (bs.bs_bmissthreshold > 10)
|
|
bs.bs_bmissthreshold = 10;
|
|
else if (bs.bs_bmissthreshold <= 0)
|
|
bs.bs_bmissthreshold = 1;
|
|
|
|
/*
|
|
* Calculate sleep duration. The configuration is
|
|
* given in ms. We insure a multiple of the beacon
|
|
* period is used. Also, if the sleep duration is
|
|
* greater than the DTIM period then it makes senses
|
|
* to make it a multiple of that.
|
|
*
|
|
* XXX fixed at 100ms
|
|
*/
|
|
bs.bs_sleepduration =
|
|
roundup(IEEE80211_MS_TO_TU(100), bs.bs_intval);
|
|
if (bs.bs_sleepduration > bs.bs_dtimperiod)
|
|
bs.bs_sleepduration = roundup(bs.bs_sleepduration, bs.bs_dtimperiod);
|
|
|
|
DPRINTF(sc, ATH_DEBUG_BEACON,
|
|
"%s: tsf %ju tsf:tu %u intval %u nexttbtt %u dtim %u "
|
|
"nextdtim %u bmiss %u sleep %u cfp:period %u "
|
|
"maxdur %u next %u timoffset %u\n"
|
|
, __func__
|
|
, tsf
|
|
, tsftu
|
|
, bs.bs_intval
|
|
, bs.bs_nexttbtt
|
|
, bs.bs_dtimperiod
|
|
, bs.bs_nextdtim
|
|
, bs.bs_bmissthreshold
|
|
, bs.bs_sleepduration
|
|
, bs.bs_cfpperiod
|
|
, bs.bs_cfpmaxduration
|
|
, bs.bs_cfpnext
|
|
, bs.bs_timoffset
|
|
);
|
|
ath_hal_intrset(ah, 0);
|
|
ath_hal_beacontimers(ah, &bs);
|
|
sc->sc_imask |= HAL_INT_BMISS;
|
|
ath_hal_intrset(ah, sc->sc_imask);
|
|
} else {
|
|
ath_hal_intrset(ah, 0);
|
|
if (nexttbtt == intval)
|
|
intval |= HAL_BEACON_RESET_TSF;
|
|
if (ic->ic_opmode == IEEE80211_M_IBSS) {
|
|
/*
|
|
* In IBSS mode enable the beacon timers but only
|
|
* enable SWBA interrupts if we need to manually
|
|
* prepare beacon frames. Otherwise we use a
|
|
* self-linked tx descriptor and let the hardware
|
|
* deal with things.
|
|
*/
|
|
intval |= HAL_BEACON_ENA;
|
|
if (!sc->sc_hasveol)
|
|
sc->sc_imask |= HAL_INT_SWBA;
|
|
if ((intval & HAL_BEACON_RESET_TSF) == 0) {
|
|
/*
|
|
* Pull nexttbtt forward to reflect
|
|
* the current TSF.
|
|
*/
|
|
tsf = ath_hal_gettsf64(ah);
|
|
tsftu = TSF_TO_TU(tsf>>32, tsf) + FUDGE;
|
|
do {
|
|
nexttbtt += intval;
|
|
} while (nexttbtt < tsftu);
|
|
}
|
|
ath_beaconq_config(sc);
|
|
} else if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
|
|
ic->ic_opmode == IEEE80211_M_MBSS) {
|
|
/*
|
|
* In AP/mesh mode we enable the beacon timers
|
|
* and SWBA interrupts to prepare beacon frames.
|
|
*/
|
|
intval |= HAL_BEACON_ENA;
|
|
sc->sc_imask |= HAL_INT_SWBA; /* beacon prepare */
|
|
ath_beaconq_config(sc);
|
|
}
|
|
|
|
/*
|
|
* Now dirty things because for now, the EDMA HAL has
|
|
* nexttbtt and intval is TU/8.
|
|
*/
|
|
if (sc->sc_isedma) {
|
|
nexttbtt_u8 = (nexttbtt << 3);
|
|
intval_u8 = (intval << 3);
|
|
if (intval & HAL_BEACON_ENA)
|
|
intval_u8 |= HAL_BEACON_ENA;
|
|
if (intval & HAL_BEACON_RESET_TSF)
|
|
intval_u8 |= HAL_BEACON_RESET_TSF;
|
|
ath_hal_beaconinit(ah, nexttbtt_u8, intval_u8);
|
|
} else
|
|
ath_hal_beaconinit(ah, nexttbtt, intval);
|
|
sc->sc_bmisscount = 0;
|
|
ath_hal_intrset(ah, sc->sc_imask);
|
|
/*
|
|
* When using a self-linked beacon descriptor in
|
|
* ibss mode load it once here.
|
|
*/
|
|
if (ic->ic_opmode == IEEE80211_M_IBSS && sc->sc_hasveol)
|
|
ath_beacon_start_adhoc(sc, vap);
|
|
}
|
|
ieee80211_free_node(ni);
|
|
|
|
ATH_LOCK(sc);
|
|
ath_power_restore_power_state(sc);
|
|
ATH_UNLOCK(sc);
|
|
#undef FUDGE
|
|
#undef TSF_TO_TU
|
|
}
|