df4d502619
changes: 01 - Enhanced LRO: LRO feature is extended to support multi-buffer mode. Previously, Ethernet frames received in contiguous buffers were offloaded. Now, frames received in multiple non-contiguous buffers can be offloaded, as well. The driver now supports LRO for jumbo frames. 02 - Locks Optimization: The driver code was re-organized to limit the use of locks. Moreover, lock contention was reduced by replacing wait locks with try locks. 03 - Code Optimization: The driver code was re-factored to eliminate some memcpy operations. Fast path loops were optimized. 04 - Tag Creations: Physical Buffer Tags are now optimized based upon frame size. For better performance, Physical Memory Maps are now re-used. 05 - Configuration: Features such as TSO, LRO, and Interrupt Mode can be configured either at load or at run time. Rx buffer mode (mode 1 or mode 2) can be configured at load time through kenv. 06 - Driver Statistics: Run time statistics are enhanced to provide better visibility into the driver performance. 07 - Bug Fixes: The driver contains fixes for the problems discovered and reported since last submission. 08 - MSI support: Added Message Signaled Interrupt feature which currently uses 1 message. 09 Removed feature: Rx 3 buffer mode feature has been removed. Driver now supports 1, 2 and 5 buffer modes of which 2 and 5 buffer modes can be used for header separation. 10 Compiler warning: Fixed compiler warning when compiled for 32 bit system. 11 Copyright notice: Source files are updated with the proper copyright notice. MFC after: 3 days Submitted by: Alicia Pena <Alicia dot Pena at neterion dot com>, Muhammad Shafiq <Muhammad dot Shafiq at neterion dot com>
414 lines
17 KiB
C
414 lines
17 KiB
C
/*-
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* Copyright (c) 2002-2007 Neterion, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _IF_XGE_H
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#define _IF_XGE_H
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#include <dev/nxge/include/xgehal.h>
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#include <dev/nxge/xge-osdep.h>
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/* Printing description, Copyright */
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#define XGE_DRIVER_VERSION \
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XGELL_VERSION_MAJOR"."XGELL_VERSION_MINOR"." \
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XGELL_VERSION_FIX"."XGELL_VERSION_BUILD
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#define XGE_COPYRIGHT "Copyright(c) 2002-2007 Neterion Inc."
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/* Printing */
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#define xge_trace(trace, fmt, args...) xge_debug_ll(trace, fmt, ## args);
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#define XGE_ALIGN_TO(buffer_length, to) { \
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if((buffer_length % to) != 0) { \
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buffer_length += (to - (buffer_length % to)); \
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} \
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}
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#define XGE_EXIT_ON_ERR(text, label, return_value) { \
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xge_trace(XGE_ERR, "%s (Status: %d)", text, return_value); \
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status = return_value; \
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goto label; \
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}
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#define XGE_SET_BUFFER_MODE_IN_RINGS(mode) { \
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for(index = 0; index < XGE_RING_COUNT; index++) \
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ring_config->queue[index].buffer_mode = mode; \
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}
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#define XGE_DEFAULT_USER_HARDCODED -1
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#define XGE_MAX_SEGS 100 /* Maximum number of segments */
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#define XGE_TX_LEVEL_LOW 16
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#define XGE_FIFO_COUNT XGE_HAL_MIN_FIFO_NUM
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#define XGE_RING_COUNT XGE_HAL_MIN_RING_NUM
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#define XGE_BUFFER_SIZE 20
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#define XGE_LRO_DEFAULT_ENTRIES 12
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#define XGE_BAUDRATE 1000000000
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/* Default values to configuration parameters */
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#define XGE_DEFAULT_ENABLED_TSO 1
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#define XGE_DEFAULT_ENABLED_LRO 1
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#define XGE_DEFAULT_ENABLED_MSI 1
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#define XGE_DEFAULT_BUFFER_MODE 1
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#define XGE_DEFAULT_INITIAL_MTU 1500
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#define XGE_DEFAULT_LATENCY_TIMER -1
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#define XGE_DEFAULT_MAX_SPLITS_TRANS -1
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#define XGE_DEFAULT_MMRB_COUNT -1
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#define XGE_DEFAULT_SHARED_SPLITS 0
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#define XGE_DEFAULT_ISR_POLLING_CNT 8
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#define XGE_DEFAULT_STATS_REFRESH_TIME_SEC 4
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#define XGE_DEFAULT_MAC_RMAC_BCAST_EN 1
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#define XGE_DEFAULT_MAC_TMAC_UTIL_PERIOD 5
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#define XGE_DEFAULT_MAC_RMAC_UTIL_PERIOD 5
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#define XGE_DEFAULT_MAC_RMAC_PAUSE_GEN_EN 1
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#define XGE_DEFAULT_MAC_RMAC_PAUSE_RCV_EN 1
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#define XGE_DEFAULT_MAC_RMAC_PAUSE_TIME 65535
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#define XGE_DEFAULT_MAC_MC_PAUSE_THRESHOLD_Q0Q3 187
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#define XGE_DEFAULT_MAC_MC_PAUSE_THRESHOLD_Q4Q7 187
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#define XGE_DEFAULT_FIFO_MEMBLOCK_SIZE PAGE_SIZE
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#define XGE_DEFAULT_FIFO_RESERVE_THRESHOLD 0
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#define XGE_DEFAULT_FIFO_MAX_FRAGS 64
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#define XGE_DEFAULT_FIFO_QUEUE_INTR 0
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#define XGE_DEFAULT_FIFO_QUEUE_MAX 2048
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#define XGE_DEFAULT_FIFO_QUEUE_INITIAL 2048
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#define XGE_DEFAULT_FIFO_QUEUE_TTI_URANGE_A 5
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#define XGE_DEFAULT_FIFO_QUEUE_TTI_URANGE_B 10
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#define XGE_DEFAULT_FIFO_QUEUE_TTI_URANGE_C 20
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#define XGE_DEFAULT_FIFO_QUEUE_TTI_UFC_A 15
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#define XGE_DEFAULT_FIFO_QUEUE_TTI_UFC_B 30
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#define XGE_DEFAULT_FIFO_QUEUE_TTI_UFC_C 45
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#define XGE_DEFAULT_FIFO_QUEUE_TTI_UFC_D 60
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#define XGE_DEFAULT_FIFO_QUEUE_TTI_TIMER_CI_EN 1
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#define XGE_DEFAULT_FIFO_QUEUE_TTI_TIMER_AC_EN 1
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#define XGE_DEFAULT_FIFO_QUEUE_TTI_TIMER_VAL_US 8000
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#define XGE_DEFAULT_FIFO_ALIGNMENT_SIZE sizeof(u64)
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#define XGE_DEFAULT_RING_MEMBLOCK_SIZE PAGE_SIZE
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#define XGE_DEFAULT_RING_STRIP_VLAN_TAG 1
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#define XGE_DEFAULT_RING_QUEUE_MAX 16
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#define XGE_DEFAULT_RING_QUEUE_INITIAL 16
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#define XGE_DEFAULT_RING_QUEUE_DRAM_SIZE_MB 32
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#define XGE_DEFAULT_RING_QUEUE_INDICATE_MAX_PKTS 16
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#define XGE_DEFAULT_RING_QUEUE_BACKOFF_INTERVAL_US 1000
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#define XGE_DEFAULT_RING_QUEUE_RTI_URANGE_A 5
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#define XGE_DEFAULT_RING_QUEUE_RTI_URANGE_B 10
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#define XGE_DEFAULT_RING_QUEUE_RTI_URANGE_C 50
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#define XGE_DEFAULT_RING_QUEUE_RTI_UFC_A 1
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#define XGE_DEFAULT_RING_QUEUE_RTI_UFC_B 8
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#define XGE_DEFAULT_RING_QUEUE_RTI_UFC_C 16
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#define XGE_DEFAULT_RING_QUEUE_RTI_UFC_D 32
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#define XGE_DEFAULT_RING_QUEUE_RTI_TIMER_AC_EN 1
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#define XGE_DEFAULT_RING_QUEUE_RTI_TIMER_VAL_US 250
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#define XGE_DRV_STATS(param) (lldev->driver_stats.param++)
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#define XGE_SAVE_PARAM(to, what, value) to.what = value;
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#define XGE_GET_PARAM(str_kenv, to, param, hardcode) { \
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static int param##__LINE__; \
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if(testenv(str_kenv) == 1) { \
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getenv_int(str_kenv, ¶m##__LINE__); \
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} \
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else { \
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param##__LINE__ = hardcode; \
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} \
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XGE_SAVE_PARAM(to, param, param##__LINE__); \
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}
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#define XGE_GET_PARAM_MAC(str_kenv, param, hardcode) \
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XGE_GET_PARAM(str_kenv, ((*dconfig).mac), param, hardcode);
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#define XGE_GET_PARAM_FIFO(str_kenv, param, hardcode) \
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XGE_GET_PARAM(str_kenv, ((*dconfig).fifo), param, hardcode);
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#define XGE_GET_PARAM_FIFO_QUEUE(str_kenv, param, qindex, hardcode) \
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XGE_GET_PARAM(str_kenv, ((*dconfig).fifo.queue[qindex]), param, \
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hardcode);
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#define XGE_GET_PARAM_FIFO_QUEUE_TTI(str_kenv, param, qindex, tindex, hardcode)\
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XGE_GET_PARAM(str_kenv, ((*dconfig).fifo.queue[qindex].tti[tindex]), \
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param, hardcode);
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#define XGE_GET_PARAM_RING(str_kenv, param, hardcode) \
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XGE_GET_PARAM(str_kenv, ((*dconfig).ring), param, hardcode);
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#define XGE_GET_PARAM_RING_QUEUE(str_kenv, param, qindex, hardcode) \
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XGE_GET_PARAM(str_kenv, ((*dconfig).ring.queue[qindex]), param, \
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hardcode);
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#define XGE_GET_PARAM_RING_QUEUE_RTI(str_kenv, param, qindex, hardcode) \
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XGE_GET_PARAM(str_kenv, ((*dconfig).ring.queue[qindex].rti), param, \
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hardcode);
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/* Values to identify the requests from getinfo tool in ioctl */
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#define XGE_QUERY_STATS 1
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#define XGE_QUERY_PCICONF 2
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#define XGE_QUERY_DEVSTATS 3
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#define XGE_QUERY_DEVCONF 4
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#define XGE_READ_VERSION 5
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#define XGE_QUERY_SWSTATS 6
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#define XGE_QUERY_DRIVERSTATS 7
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#define XGE_SET_BUFFER_MODE_1 8
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#define XGE_SET_BUFFER_MODE_2 9
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#define XGE_SET_BUFFER_MODE_5 10
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#define XGE_QUERY_BUFFER_MODE 11
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#define XGE_OFFSET_OF_LAST_REG 0x3180
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#define VENDOR_ID_AMD 0x1022
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#define DEVICE_ID_8131_PCI_BRIDGE 0x7450
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typedef struct mbuf *mbuf_t;
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typedef enum xge_lables {
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xge_free_all = 0,
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xge_free_mutex = 1,
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xge_free_terminate_hal_driver = 2,
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xge_free_hal_device = 3,
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xge_free_pci_info = 4,
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xge_free_bar0 = 5,
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xge_free_bar0_resource = 6,
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xge_free_bar1 = 7,
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xge_free_bar1_resource = 8,
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xge_free_irq_resource = 9,
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xge_free_terminate_hal_device = 10,
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xge_free_media_interface = 11,
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} xge_lables_e;
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typedef enum xge_option {
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XGE_CHANGE_LRO = 0,
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XGE_SET_MTU = 1
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} xge_option_e;
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typedef enum xge_event_e {
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XGE_LL_EVENT_TRY_XMIT_AGAIN = XGE_LL_EVENT_BASE + 1,
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XGE_LL_EVENT_DEVICE_RESETTING = XGE_LL_EVENT_BASE + 2
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} xge_event_e;
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typedef struct xge_msi_info {
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u16 msi_control; /* MSI control 0x42 */
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u32 msi_lower_address; /* MSI lower address 0x44 */
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u32 msi_higher_address; /* MSI higher address 0x48 */
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u16 msi_data; /* MSI data */
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} xge_msi_info_t;
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typedef struct xge_driver_stats_t {
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/* ISR statistics */
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u64 isr_filter;
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u64 isr_line;
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u64 isr_msi;
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/* Tx statistics */
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u64 tx_calls;
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u64 tx_completions;
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u64 tx_desc_compl;
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u64 tx_tcode;
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u64 tx_defrag;
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u64 tx_no_txd;
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u64 tx_map_fail;
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u64 tx_max_frags;
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u64 tx_tso;
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u64 tx_posted;
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u64 tx_again;
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u64 tx_lock_fail;
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/* Rx statistics */
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u64 rx_completions;
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u64 rx_desc_compl;
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u64 rx_tcode;
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u64 rx_no_buf;
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u64 rx_map_fail;
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/* LRO statistics */
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u64 lro_uncapable;
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u64 lro_begin;
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u64 lro_end1;
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u64 lro_end2;
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u64 lro_end3;
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u64 lro_append;
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u64 lro_session_exceeded;
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u64 lro_close;
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} xge_driver_stats_t;
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typedef struct xge_lro_entry_t {
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SLIST_ENTRY(xge_lro_entry_t) next;
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struct mbuf *m_head;
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struct mbuf *m_tail;
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struct ip *lro_header_ip;
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int timestamp;
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u32 tsval;
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u32 tsecr;
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u32 source_ip;
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u32 dest_ip;
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u32 next_seq;
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u32 ack_seq;
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u32 len;
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u32 data_csum;
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u16 window;
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u16 source_port;
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u16 dest_port;
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u16 append_cnt;
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u16 mss;
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} xge_lro_entry_t;
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SLIST_HEAD(lro_head, xge_lro_entry_t);
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/* Adapter structure */
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typedef struct xge_lldev_t {
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device_t device; /* Device */
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struct ifnet *ifnetp; /* Interface ifnet structure */
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struct resource *irq; /* Resource structure for IRQ */
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void *irqhandle; /* IRQ handle */
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xge_pci_info_t *pdev; /* PCI info */
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xge_hal_device_t *devh; /* HAL: Device Handle */
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struct mtx mtx_drv; /* Mutex - Driver */
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struct mtx mtx_tx[XGE_FIFO_COUNT];
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/* Mutex - Tx */
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char mtx_name_drv[16];/*Mutex Name - Driver */
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char mtx_name_tx[16][XGE_FIFO_COUNT];
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/* Mutex Name - Tx */
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struct callout timer; /* Timer for polling */
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struct ifmedia media; /* In-kernel representation of a */
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/* single supported media type */
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xge_hal_channel_h fifo_channel[XGE_FIFO_COUNT];
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/* FIFO channels */
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xge_hal_channel_h ring_channel[XGE_RING_COUNT];
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/* Ring channels */
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bus_dma_tag_t dma_tag_tx; /* Tag for dtr dma mapping (Tx) */
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bus_dma_tag_t dma_tag_rx; /* Tag for dtr dma mapping (Rx) */
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bus_dmamap_t extra_dma_map; /* Extra DMA map for Rx */
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xge_msi_info_t msi_info; /* MSI info */
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xge_driver_stats_t driver_stats; /* Driver statistics */
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int initialized; /* Flag: Initialized or not */
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int all_multicast; /* All multicast flag */
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int macaddr_count; /* Multicast address count */
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int in_detach; /* To avoid ioctl during detach */
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int buffer_mode; /* Buffer Mode */
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int rxd_mbuf_cnt; /* Number of buffers used */
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int rxd_mbuf_len[5];/* Buffer lengths */
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int enabled_tso; /* Flag: TSO Enabled */
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int enabled_lro; /* Flag: LRO Enabled */
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int enabled_msi; /* Flag: MSI Enabled */
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int mtu; /* Interface MTU */
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int lro_num; /* Number of LRO sessions */
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struct lro_head lro_active; /* Active LRO sessions */
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struct lro_head lro_free; /* Free LRO sessions */
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} xge_lldev_t;
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/* Rx descriptor private structure */
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typedef struct xge_rx_priv_t {
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mbuf_t *bufferArray;
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xge_dma_mbuf_t dmainfo[5];
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} xge_rx_priv_t;
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/* Tx descriptor private structure */
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typedef struct xge_tx_priv_t {
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mbuf_t buffer;
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bus_dmamap_t dma_map;
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} xge_tx_priv_t;
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/* BAR0 Register */
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typedef struct xge_register_t {
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char option[2];
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u64 offset;
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u64 value;
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}xge_register_t;
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void xge_init_params(xge_hal_device_config_t *, device_t);
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void xge_init(void *);
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void xge_device_init(xge_lldev_t *, xge_hal_channel_reopen_e);
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void xge_device_stop(xge_lldev_t *, xge_hal_channel_reopen_e);
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void xge_stop(xge_lldev_t *);
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void xge_resources_free(device_t, xge_lables_e);
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void xge_callback_link_up(void *);
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void xge_callback_link_down(void *);
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void xge_callback_crit_err(void *, xge_hal_event_e, u64);
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void xge_callback_event(xge_queue_item_t *);
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int xge_ifmedia_change(struct ifnet *);
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void xge_ifmedia_status(struct ifnet *, struct ifmediareq *);
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int xge_ioctl(struct ifnet *, unsigned long, caddr_t);
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int xge_ioctl_stats(xge_lldev_t *, struct ifreq *);
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int xge_ioctl_registers(xge_lldev_t *, struct ifreq *);
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void xge_timer(void *);
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int xge_isr_filter(void *);
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void xge_isr_line(void *);
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void xge_isr_msi(void *);
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void xge_enable_msi(xge_lldev_t *);
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int xge_rx_open(int, xge_lldev_t *, xge_hal_channel_reopen_e);
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int xge_tx_open(xge_lldev_t *, xge_hal_channel_reopen_e);
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void xge_channel_close(xge_lldev_t *, xge_hal_channel_reopen_e);
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int xge_channel_open(xge_lldev_t *, xge_hal_channel_reopen_e);
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xge_hal_status_e xge_rx_compl(xge_hal_channel_h, xge_hal_dtr_h, u8, void *);
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xge_hal_status_e xge_tx_compl(xge_hal_channel_h, xge_hal_dtr_h, u8, void *);
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xge_hal_status_e xge_tx_initial_replenish(xge_hal_channel_h, xge_hal_dtr_h,
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int, void *, xge_hal_channel_reopen_e);
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xge_hal_status_e xge_rx_initial_replenish(xge_hal_channel_h, xge_hal_dtr_h,
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int, void *, xge_hal_channel_reopen_e);
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void xge_rx_term(xge_hal_channel_h, xge_hal_dtr_h, xge_hal_dtr_state_e,
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void *, xge_hal_channel_reopen_e);
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void xge_tx_term(xge_hal_channel_h, xge_hal_dtr_h, xge_hal_dtr_state_e,
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void *, xge_hal_channel_reopen_e);
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void xge_set_mbuf_cflags(mbuf_t);
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void xge_send(struct ifnet *);
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static void inline xge_send_locked(struct ifnet *, int);
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int xge_get_buf(xge_hal_dtr_h, xge_rx_priv_t *, xge_lldev_t *, int);
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int xge_ring_dtr_get(mbuf_t, xge_hal_channel_h, xge_hal_dtr_h, xge_lldev_t *,
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xge_rx_priv_t *);
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int xge_get_buf_3b_5b(xge_hal_dtr_h, xge_rx_priv_t *, xge_lldev_t *);
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void dmamap_cb(void *, bus_dma_segment_t *, int, int);
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void xge_reset(xge_lldev_t *);
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void xge_setmulti(xge_lldev_t *);
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void xge_enable_promisc(xge_lldev_t *);
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void xge_disable_promisc(xge_lldev_t *);
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int xge_change_mtu(xge_lldev_t *, int);
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void xge_buffer_mode_init(xge_lldev_t *, int);
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void xge_initialize(device_t, xge_hal_channel_reopen_e);
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void xge_terminate(device_t, xge_hal_channel_reopen_e);
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int xge_probe(device_t);
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int xge_driver_initialize(void);
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void xge_media_init(device_t);
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void xge_pci_space_save(device_t);
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void xge_pci_space_restore(device_t);
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void xge_msi_info_save(xge_lldev_t *);
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void xge_msi_info_restore(xge_lldev_t *);
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int xge_attach(device_t);
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int xge_interface_setup(device_t);
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int xge_detach(device_t);
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int xge_shutdown(device_t);
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void xge_mutex_init(xge_lldev_t *);
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void xge_mutex_destroy(xge_lldev_t *);
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void xge_print_info(xge_lldev_t *);
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void xge_lro_flush_sessions(xge_lldev_t *);
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void xge_rx_buffer_sizes_set(xge_lldev_t *, int, int);
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void xge_accumulate_large_rx(xge_lldev_t *, struct mbuf *, int,
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xge_rx_priv_t *);
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xge_hal_status_e xge_create_dma_tags(device_t);
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void xge_add_sysctl_handlers(xge_lldev_t *);
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void xge_confirm_changes(xge_lldev_t *, xge_option_e);
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static int xge_lro_accumulate(xge_lldev_t *, struct mbuf *);
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static void xge_lro_flush(xge_lldev_t *, xge_lro_entry_t *);
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#endif // _IF_XGE_H
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