188fbdbc6c
- Make LBC resources management self-contained: introduce explicit LBC resources definition (much like the OCP), provide dedicated rman for LB mem space. - Full configuration of an LB chip select device: program LAW and BR/OR, map into KVA, handle all LB attributes (bus width, machine select, ecc, write protect etc). - Factor out LAW manipulation routines into shared code, adjust OCP area accordingly. - Other LBC fixes and clean-ups. Obtained from: Semihalf
531 lines
12 KiB
C
531 lines
12 KiB
C
/*-
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* Copyright (c) 2006-2008, Juniper Networks, Inc.
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* Copyright (c) 2008 Semihalf, Rafal Czubak
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/ktr.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <machine/bus.h>
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#include <machine/ocpbus.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <powerpc/mpc85xx/lbc.h>
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#include <powerpc/mpc85xx/mpc85xx.h>
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#include <powerpc/mpc85xx/ocpbus.h>
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struct lbc_softc {
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device_t sc_dev;
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struct resource *sc_res;
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bus_space_handle_t sc_bsh;
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bus_space_tag_t sc_bst;
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int sc_rid;
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struct rman sc_rman;
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vm_offset_t sc_kva[LBC_DEV_MAX];
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};
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struct lbc_devinfo {
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int lbc_devtype;
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/* LBC child unit. It also represents resource table entry number */
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int lbc_unit;
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};
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/* Resources for MPC8555CDS system */
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const struct lbc_resource mpc85xx_lbc_resources[] = {
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/* Boot flash bank */
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{
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LBC_DEVTYPE_CFI, 0, 0xff800000, 0x00800000, 16,
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LBCRES_MSEL_GPCM, LBCRES_DECC_DISABLED,
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LBCRES_ATOM_DISABLED, 0
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},
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/* Second flash bank */
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{
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LBC_DEVTYPE_CFI, 1, 0xff000000, 0x00800000, 16,
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LBCRES_MSEL_GPCM, LBCRES_DECC_DISABLED,
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LBCRES_ATOM_DISABLED, 0
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},
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/* DS1553 RTC/NVRAM */
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{
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LBC_DEVTYPE_RTC, 2, 0xf8000000, 0x8000, 8,
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LBCRES_MSEL_GPCM, LBCRES_DECC_DISABLED,
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LBCRES_ATOM_DISABLED, 0
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},
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{0}
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};
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static int lbc_probe(device_t);
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static int lbc_attach(device_t);
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static int lbc_shutdown(device_t);
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static int lbc_get_resource(device_t, device_t, int, int, u_long *,
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u_long *);
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static struct resource *lbc_alloc_resource(device_t, device_t, int, int *,
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u_long, u_long, u_long, u_int);
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static int lbc_print_child(device_t, device_t);
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static int lbc_release_resource(device_t, device_t, int, int,
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struct resource *);
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static int lbc_read_ivar(device_t, device_t, int, uintptr_t *);
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/*
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* Bus interface definition
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*/
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static device_method_t lbc_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, lbc_probe),
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DEVMETHOD(device_attach, lbc_attach),
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DEVMETHOD(device_shutdown, lbc_shutdown),
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/* Bus interface */
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DEVMETHOD(bus_print_child, lbc_print_child),
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DEVMETHOD(bus_read_ivar, lbc_read_ivar),
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DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
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DEVMETHOD(bus_teardown_intr, NULL),
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DEVMETHOD(bus_get_resource, NULL),
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DEVMETHOD(bus_alloc_resource, lbc_alloc_resource),
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DEVMETHOD(bus_release_resource, lbc_release_resource),
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DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
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DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
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{ 0, 0 }
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};
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static driver_t lbc_driver = {
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"lbc",
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lbc_methods,
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sizeof(struct lbc_softc)
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};
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devclass_t lbc_devclass;
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DRIVER_MODULE(lbc, ocpbus, lbc_driver, lbc_devclass, 0, 0);
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static __inline void
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lbc_write_reg(struct lbc_softc *sc, bus_size_t off, uint32_t val)
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{
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bus_space_write_4(sc->sc_bst, sc->sc_bsh, off, val);
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}
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static __inline uint32_t
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lbc_read_reg(struct lbc_softc *sc, bus_size_t off)
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{
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return (bus_space_read_4(sc->sc_bst, sc->sc_bsh, off));
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}
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/*
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* Calculate address mask used by OR(n) registers. Use memory region size to
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* determine mask value. The size must be a power of two and within the range
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* of 32KB - 4GB. Otherwise error code is returned. Value representing
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* 4GB size can be passed as 0xffffffff.
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*/
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static uint32_t
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lbc_address_mask(uint32_t size)
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{
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int n = 15;
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if (size == ~0UL)
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return (0);
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while (n < 32) {
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if (size == (1UL << n))
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break;
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n++;
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}
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if (n == 32)
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return (EINVAL);
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return (0xffff8000 << (n - 15));
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}
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static device_t
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lbc_mk_child(device_t dev, const struct lbc_resource *lbcres)
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{
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struct lbc_devinfo *dinfo;
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device_t child;
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if (lbcres->lbr_unit > LBC_DEV_MAX - 1)
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return (NULL);
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child = device_add_child(dev, NULL, -1);
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if (child == NULL) {
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device_printf(dev, "could not add LBC child device\n");
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return (NULL);
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}
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dinfo = malloc(sizeof(struct lbc_devinfo), M_DEVBUF, M_WAITOK | M_ZERO);
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dinfo->lbc_devtype = lbcres->lbr_devtype;
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dinfo->lbc_unit = lbcres->lbr_unit;
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device_set_ivars(child, dinfo);
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return (child);
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}
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static int
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lbc_init_child(device_t dev, device_t child)
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{
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struct lbc_softc *sc;
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struct lbc_devinfo *dinfo;
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const struct lbc_resource *res;
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u_long start, size;
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uint32_t regbuff;
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int error, unit;
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sc = device_get_softc(dev);
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dinfo = device_get_ivars(child);
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res = mpc85xx_lbc_resources;
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regbuff = 0;
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unit = -1;
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for (; res->lbr_devtype; res++) {
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if (res->lbr_unit != dinfo->lbc_unit)
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continue;
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start = res->lbr_base_addr;
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size = res->lbr_size;
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unit = res->lbr_unit;
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/*
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* Configure LAW for this LBC device and map its physical
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* memory region into KVA
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*/
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error = law_enable(OCP85XX_TGTIF_LBC, start, size);
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if (error)
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return (error);
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sc->sc_kva[unit] = (vm_offset_t)pmap_mapdev(start, size);
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if (sc->sc_kva[unit] == 0) {
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law_disable(OCP85XX_TGTIF_LBC, start, size);
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return (ENOSPC);
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}
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/*
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* Compute and program BR value
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*/
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regbuff |= start;
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switch (res->lbr_port_size) {
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case 8:
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regbuff |= (1 << 11);
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break;
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case 16:
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regbuff |= (2 << 11);
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break;
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case 32:
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regbuff |= (3 << 11);
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break;
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default:
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error = EINVAL;
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goto fail;
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}
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regbuff |= (res->lbr_decc << 9);
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regbuff |= (res->lbr_wp << 8);
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regbuff |= (res->lbr_msel << 5);
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regbuff |= (res->lbr_atom << 2);
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regbuff |= 1;
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lbc_write_reg(sc, LBC85XX_BR(unit), regbuff);
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/*
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* Compute and program OR value
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*/
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regbuff = 0;
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regbuff |= lbc_address_mask(size);
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switch (res->lbr_msel) {
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case LBCRES_MSEL_GPCM:
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/* TODO Add flag support for option registers */
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regbuff |= 0x00000ff7;
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break;
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case LBCRES_MSEL_FCM:
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printf("FCM mode not supported yet!");
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error = ENOSYS;
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goto fail;
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case LBCRES_MSEL_UPMA:
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case LBCRES_MSEL_UPMB:
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case LBCRES_MSEL_UPMC:
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printf("UPM mode not supported yet!");
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error = ENOSYS;
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goto fail;
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}
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lbc_write_reg(sc, LBC85XX_OR(unit), regbuff);
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return (0);
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}
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fail:
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if (unit != -1) {
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law_disable(OCP85XX_TGTIF_LBC, start, size);
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pmap_unmapdev(sc->sc_kva[unit], size);
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return (error);
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} else
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return (ENOENT);
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}
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static int
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lbc_probe(device_t dev)
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{
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device_t parent;
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uintptr_t devtype;
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int error;
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parent = device_get_parent(dev);
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error = BUS_READ_IVAR(parent, dev, OCPBUS_IVAR_DEVTYPE, &devtype);
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if (error)
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return (error);
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if (devtype != OCPBUS_DEVTYPE_LBC)
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return (ENXIO);
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device_set_desc(dev, "Freescale MPC85xx Local Bus Controller");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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lbc_attach(device_t dev)
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{
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struct lbc_softc *sc;
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struct rman *rm;
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const struct lbc_resource *lbcres;
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int error;
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sc = device_get_softc(dev);
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sc->sc_dev = dev;
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sc->sc_rid = 0;
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sc->sc_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->sc_rid,
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RF_ACTIVE);
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if (sc->sc_res == NULL)
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return (ENXIO);
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sc->sc_bst = rman_get_bustag(sc->sc_res);
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sc->sc_bsh = rman_get_bushandle(sc->sc_res);
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rm = &sc->sc_rman;
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rm->rm_type = RMAN_ARRAY;
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rm->rm_descr = "MPC85XX Local Bus Space";
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rm->rm_start = 0UL;
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rm->rm_end = ~0UL;
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error = rman_init(rm);
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if (error)
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goto fail;
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error = rman_manage_region(rm, rm->rm_start, rm->rm_end);
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if (error) {
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rman_fini(rm);
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goto fail;
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}
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/*
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* Initialize configuration register:
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* - enable Local Bus
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* - set data buffer control signal function
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* - disable parity byte select
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* - set ECC parity type
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* - set bus monitor timing and timer prescale
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*/
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lbc_write_reg(sc, LBC85XX_LBCR, 0x00000000);
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/*
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* Initialize clock ratio register:
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* - disable PLL bypass mode
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* - configure LCLK delay cycles for the assertion of LALE
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* - set system clock divider
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*/
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lbc_write_reg(sc, LBC85XX_LCRR, 0x00030008);
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lbcres = mpc85xx_lbc_resources;
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for (; lbcres->lbr_devtype; lbcres++)
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if (!lbc_mk_child(dev, lbcres)) {
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error = ENXIO;
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goto fail;
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}
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return (bus_generic_attach(dev));
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fail:
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bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_rid, sc->sc_res);
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return (error);
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}
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static int
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lbc_shutdown(device_t dev)
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{
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/* TODO */
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return(0);
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}
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static struct resource *
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lbc_alloc_resource(device_t dev, device_t child, int type, int *rid,
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u_long start, u_long end, u_long count, u_int flags)
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{
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struct lbc_softc *sc;
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struct lbc_devinfo *dinfo;
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struct resource *rv;
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struct rman *rm;
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int error;
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sc = device_get_softc(dev);
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dinfo = device_get_ivars(child);
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if (type != SYS_RES_MEMORY && type != SYS_RES_IRQ)
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return (NULL);
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/* We only support default allocations. */
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if (start != 0ul || end != ~0ul)
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return (NULL);
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if (type == SYS_RES_IRQ)
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return (bus_alloc_resource(dev, type, rid, start, end, count,
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flags));
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if (!sc->sc_kva[dinfo->lbc_unit]) {
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error = lbc_init_child(dev, child);
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if (error)
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return (NULL);
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}
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error = lbc_get_resource(dev, child, type, *rid, &start, &count);
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if (error)
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return (NULL);
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rm = &sc->sc_rman;
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end = start + count - 1;
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rv = rman_reserve_resource(rm, start, end, count, flags, child);
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if (rv != NULL) {
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rman_set_bustag(rv, &bs_be_tag);
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rman_set_bushandle(rv, rman_get_start(rv));
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}
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return (rv);
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}
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static int
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lbc_print_child(device_t dev, device_t child)
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{
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u_long size, start;
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int error, retval, rid;
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retval = bus_print_child_header(dev, child);
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rid = 0;
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while (1) {
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error = lbc_get_resource(dev, child, SYS_RES_MEMORY, rid,
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&start, &size);
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if (error)
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break;
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retval += (rid == 0) ? printf(" iomem ") : printf(",");
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retval += printf("%#lx", start);
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if (size > 1)
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retval += printf("-%#lx", start + size - 1);
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rid++;
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}
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retval += bus_print_child_footer(dev, child);
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return (retval);
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}
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static int
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lbc_read_ivar(device_t dev, device_t child, int index, uintptr_t *result)
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{
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struct lbc_devinfo *dinfo;
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if (device_get_parent(child) != dev)
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return (EINVAL);
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dinfo = device_get_ivars(child);
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|
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switch (index) {
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case LBC_IVAR_DEVTYPE:
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*result = dinfo->lbc_devtype;
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return (0);
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default:
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break;
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}
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return (EINVAL);
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|
}
|
|
|
|
static int
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lbc_release_resource(device_t dev, device_t child, int type, int rid,
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struct resource *res)
|
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{
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|
|
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return (rman_release_resource(res));
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}
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|
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static int
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lbc_get_resource(device_t dev, device_t child, int type, int rid,
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u_long *startp, u_long *countp)
|
|
{
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struct lbc_softc *sc;
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struct lbc_devinfo *dinfo;
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const struct lbc_resource *lbcres;
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|
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if (type != SYS_RES_MEMORY)
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return (ENOENT);
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|
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/* Currently all LBC devices have a single RID per type. */
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if (rid != 0)
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return (ENOENT);
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|
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sc = device_get_softc(dev);
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dinfo = device_get_ivars(child);
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|
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if ((dinfo->lbc_unit < 0) || (dinfo->lbc_unit > (LBC_DEV_MAX - 1)))
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return (EINVAL);
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|
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lbcres = mpc85xx_lbc_resources;
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|
|
|
switch (dinfo->lbc_devtype) {
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case LBC_DEVTYPE_CFI:
|
|
case LBC_DEVTYPE_RTC:
|
|
for (; lbcres->lbr_devtype; lbcres++) {
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if (dinfo->lbc_unit == lbcres->lbr_unit) {
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*startp = sc->sc_kva[lbcres->lbr_unit];
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*countp = lbcres->lbr_size;
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|
return (0);
|
|
}
|
|
}
|
|
default:
|
|
return (EDOOFUS);
|
|
}
|
|
return (0);
|
|
}
|