32d59cec8c
Submitted by: bms@ Obtained from: p4 mips branch
93 lines
2.9 KiB
C
93 lines
2.9 KiB
C
/*-
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* Copyright (c) 2007 Bruce M. Simpson.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _SIBA_SIBAVAR_H_
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#define _SIBA_SIBAVAR_H_
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#include <sys/rman.h>
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struct siba_softc {
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device_t sc_dev; /* Device ID */
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struct resource *sc_mem; /* Memory window on nexus */
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bus_space_tag_t sc_bt;
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bus_space_handle_t sc_bh;
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bus_addr_t sc_maddr;
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bus_size_t sc_msize;
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uint8_t sc_ncores;
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};
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struct siba_devinfo {
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struct resource_list sdi_rl;
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/*devhandle_t sdi_devhandle; XXX*/
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/*struct rman sdi_intr_rman;*/
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/* Accessors are needed for ivars below. */
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uint16_t sdi_vid;
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uint16_t sdi_devid;
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uint8_t sdi_rev;
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uint8_t sdi_idx; /* core index on bus */
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uint8_t sdi_irq; /* TODO */
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};
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#define siba_read_2(sc, core, reg) \
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bus_space_read_2((sc)->sc_bt, (sc)->sc_bh, \
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(core * SIBA_CORE_LEN) + (reg))
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#define siba_read_4(sc, core, reg) \
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bus_space_read_4((sc)->sc_bt, (sc)->sc_bh, \
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(core * SIBA_CORE_LEN) + (reg))
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#define siba_write_2(sc, core, reg, val) \
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bus_space_write_2((sc)->sc_bt, (sc)->sc_bh, \
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(core * SIBA_CORE_LEN) + (reg), (val))
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#define siba_write_4(sc, core, reg, val) \
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bus_space_write_4((sc)->sc_bt, (sc)->sc_bh, \
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(core * SIBA_CORE_LEN) + (reg), (val))
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enum siba_device_ivars {
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SIBA_IVAR_VENDOR,
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SIBA_IVAR_DEVICE,
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SIBA_IVAR_REVID,
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SIBA_IVAR_CORE_INDEX
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};
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#define SIBA_ACCESSOR(var, ivar, type) \
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__BUS_ACCESSOR(siba, var, SIBA, ivar, type)
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SIBA_ACCESSOR(vendor, VENDOR, uint16_t)
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SIBA_ACCESSOR(device, DEVICE, uint16_t)
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SIBA_ACCESSOR(revid, REVID, uint8_t)
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SIBA_ACCESSOR(core_index, CORE_INDEX, uint8_t)
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#undef SIBA_ACCESSOR
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#endif /* _SIBA_SIBAVAR_H_ */
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