91 lines
3.1 KiB
ArmAsm
91 lines
3.1 KiB
ArmAsm
/* $NetBSD: cpufunc_asm_ixp12x0.S,v 1.2 2002/08/17 16:36:31 thorpej Exp $ */
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/*
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* Copyright (c) 2002 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Jason R. Thorpe for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include <machine/asm.h>
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__FBSDID("$FreeBSD$");
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/*
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* This function is the same as sa110_context_switch for now, the plan
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* is to make use of the process id register to avoid cache flushes.
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*/
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ENTRY(ixp12x0_context_switch)
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/*
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* CF_CACHE_PURGE_ID will *ALWAYS* be called prior to this.
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* Thus the data cache will contain only kernel data and the
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* instruction cache will contain only kernel code, and all
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* kernel mappings are shared by all processes.
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*/
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/* Write the TTB */
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mcr p15, 0, r0, c2, c0, 0
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/* If we have updated the TTB we must flush the TLB */
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mcr p15, 0, r0, c8, c7, 0 /* flush the I+D tlb */
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/* Make sure that pipeline is emptied */
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mov r0, r0
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mov r0, r0
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RET
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ENTRY(ixp12x0_drain_readbuf)
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mcr p15, 0, r0, c9, c0, 0 /* drain read buffer */
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RET
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/*
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* Information for the IXP12X0 cache clean/purge functions:
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*
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* * Virtual address of the memory region to use
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* * Size of memory region
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*/
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.data
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.global _C_LABEL(ixp12x0_cache_clean_addr)
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_C_LABEL(ixp12x0_cache_clean_addr):
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.word 0xf0000000
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.global _C_LABEL(ixp12x0_cache_clean_size)
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_C_LABEL(ixp12x0_cache_clean_size):
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.word 0x00008000
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.text
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.Lixp12x0_cache_clean_addr:
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.word _C_LABEL(ixp12x0_cache_clean_addr)
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.Lixp12x0_cache_clean_size:
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.word _C_LABEL(ixp12x0_cache_clean_size)
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