a5ebadc632
gigabit ethernet and JMC260 fast ethernet controllers. ATM jme(4) supports all hardware features except RSS and multiple Tx/Rx queue. In these days most ethernet controller vendors take a ply of concealing hardware detailes from open source developers. As contrasted with these vendors JMicron provided all necessary information needed to write a stable driver during driver writing and answered many questions I had. They even helped fixing driver bugs with protocol analyzer. Many thanks to JMicron for their support of FreeBSD. H/W donated by: JMicron
233 lines
6.8 KiB
C
233 lines
6.8 KiB
C
/*-
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* Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _IF_JMEVAR_H
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#define _IF_JMEVAR_H
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#include <sys/queue.h>
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#include <sys/callout.h>
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#include <sys/taskqueue.h>
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/*
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* JMC250 supports upto 1024 descriptors and the number of
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* descriptors should be multiple of 16.
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*/
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#define JME_TX_RING_CNT 384
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#define JME_RX_RING_CNT 256
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/*
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* Tx/Rx descriptor queue base should be 16bytes aligned and
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* should not cross 4G bytes boundary on the 64bits address
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* mode.
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*/
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#define JME_TX_RING_ALIGN 16
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#define JME_RX_RING_ALIGN 16
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#define JME_TSO_MAXSEGSIZE 4096
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#define JME_TSO_MAXSIZE (65535 + sizeof(struct ether_vlan_header))
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#define JME_MAXTXSEGS 32
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#define JME_RX_BUF_ALIGN sizeof(uint64_t)
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#define JME_SSB_ALIGN 16
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#define JME_ADDR_LO(x) ((uint64_t) (x) & 0xFFFFFFFF)
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#define JME_ADDR_HI(x) ((uint64_t) (x) >> 32)
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#define JME_MSI_MESSAGES 8
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#define JME_MSIX_MESSAGES 8
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/* Water mark to kick reclaiming Tx buffers. */
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#define JME_TX_DESC_HIWAT (JME_TX_RING_CNT - (((JME_TX_RING_CNT) * 3) / 10))
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/*
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* JMC250 can send 9K jumbo frame on Tx path and can receive
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* 65535 bytes.
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*/
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#define JME_JUMBO_FRAMELEN 9216
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#define JME_JUMBO_MTU \
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(JME_JUMBO_FRAMELEN - sizeof(struct ether_vlan_header) - \
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ETHER_HDR_LEN - ETHER_CRC_LEN)
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#define JME_MAX_MTU \
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(ETHER_MAX_LEN + sizeof(struct ether_vlan_header) - \
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ETHER_HDR_LEN - ETHER_CRC_LEN)
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/*
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* JMC250 can't handle Tx checksum offload/TSO if frame length
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* is larger than its FIFO size(2K). It's also good idea to not
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* use jumbo frame if hardware is running at half-duplex media.
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* Because the jumbo frame may not fit into the Tx FIFO,
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* collisions make hardware fetch frame from host memory with
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* DMA again which in turn slows down Tx performance
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* significantly.
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*/
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#define JME_TX_FIFO_SIZE 2000
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/*
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* JMC250 has just 4K Rx FIFO. To support jumbo frame that is
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* larger than 4K bytes in length, Rx FIFO threshold should be
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* adjusted to minimize Rx FIFO overrun.
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*/
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#define JME_RX_FIFO_SIZE 4000
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#define JME_DESC_INC(x, y) ((x) = ((x) + 1) % (y))
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#define JME_PROC_MIN 10
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#define JME_PROC_DEFAULT (JME_RX_RING_CNT / 2)
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#define JME_PROC_MAX (JME_RX_RING_CNT - 1)
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struct jme_txdesc {
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struct mbuf *tx_m;
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bus_dmamap_t tx_dmamap;
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int tx_ndesc;
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struct jme_desc *tx_desc;
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};
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struct jme_rxdesc {
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struct mbuf *rx_m;
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bus_dmamap_t rx_dmamap;
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struct jme_desc *rx_desc;
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};
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struct jme_chain_data{
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bus_dma_tag_t jme_ring_tag;
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bus_dma_tag_t jme_buffer_tag;
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bus_dma_tag_t jme_ssb_tag;
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bus_dmamap_t jme_ssb_map;
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bus_dma_tag_t jme_tx_tag;
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struct jme_txdesc jme_txdesc[JME_TX_RING_CNT];
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bus_dma_tag_t jme_rx_tag;
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struct jme_rxdesc jme_rxdesc[JME_RX_RING_CNT];
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bus_dma_tag_t jme_tx_ring_tag;
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bus_dmamap_t jme_tx_ring_map;
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bus_dma_tag_t jme_rx_ring_tag;
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bus_dmamap_t jme_rx_ring_map;
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bus_dmamap_t jme_rx_sparemap;
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int jme_tx_prod;
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int jme_tx_cons;
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int jme_tx_cnt;
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int jme_rx_cons;
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int jme_rxlen;
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struct mbuf *jme_rxhead;
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struct mbuf *jme_rxtail;
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};
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struct jme_ring_data {
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struct jme_desc *jme_tx_ring;
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bus_addr_t jme_tx_ring_paddr;
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struct jme_desc *jme_rx_ring;
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bus_addr_t jme_rx_ring_paddr;
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struct jme_ssb *jme_ssb_block;
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bus_addr_t jme_ssb_block_paddr;
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};
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#define JME_TX_RING_ADDR(sc, i) \
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((sc)->jme_rdata.jme_tx_ring_paddr + sizeof(struct jme_desc) * (i))
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#define JME_RX_RING_ADDR(sc, i) \
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((sc)->jme_rdata.jme_rx_ring_paddr + sizeof(struct jme_desc) * (i))
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#define JME_TX_RING_SIZE \
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(sizeof(struct jme_desc) * JME_TX_RING_CNT)
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#define JME_RX_RING_SIZE \
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(sizeof(struct jme_desc) * JME_RX_RING_CNT)
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#define JME_SSB_SIZE sizeof(struct jme_ssb)
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/*
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* Software state per device.
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*/
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struct jme_softc {
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struct ifnet *jme_ifp;
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device_t jme_dev;
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device_t jme_miibus;
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struct resource *jme_res[1];
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struct resource_spec *jme_res_spec;
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struct resource *jme_irq[JME_MSI_MESSAGES];
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struct resource_spec *jme_irq_spec;
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void *jme_intrhand[JME_MSI_MESSAGES];
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int jme_rev;
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int jme_chip_rev;
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int jme_phyaddr;
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uint8_t jme_eaddr[ETHER_ADDR_LEN];
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uint32_t jme_tx_dma_size;
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uint32_t jme_rx_dma_size;
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int jme_flags;
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#define JME_FLAG_FPGA 0x0001
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#define JME_FLAG_PCIE 0x0002
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#define JME_FLAG_PCIX 0x0003
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#define JME_FLAG_MSI 0x0004
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#define JME_FLAG_MSIX 0x0010
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#define JME_FLAG_PMCAP 0x0020
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#define JME_FLAG_FASTETH 0x0040
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#define JME_FLAG_NOJUMBO 0x0080
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#define JME_FLAG_DETACH 0x4000
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#define JME_FLAG_LINK 0x8000
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struct callout jme_tick_ch;
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struct jme_chain_data jme_cdata;
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struct jme_ring_data jme_rdata;
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int jme_if_flags;
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int jme_watchdog_timer;
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uint32_t jme_txcsr;
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uint32_t jme_rxcsr;
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int jme_process_limit;
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int jme_tx_coal_to;
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int jme_tx_coal_pkt;
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int jme_rx_coal_to;
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int jme_rx_coal_pkt;
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volatile int jme_morework;
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struct task jme_int_task;
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struct task jme_tx_task;
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struct task jme_link_task;
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struct taskqueue *jme_tq;
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struct mtx jme_mtx;
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};
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/* Register access macros. */
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#define CSR_WRITE_4(_sc, reg, val) \
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bus_write_4((_sc)->jme_res[0], (reg), (val))
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#define CSR_READ_4(_sc, reg) \
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bus_read_4((_sc)->jme_res[0], (reg))
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#define JME_LOCK(_sc) mtx_lock(&(_sc)->jme_mtx)
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#define JME_UNLOCK(_sc) mtx_unlock(&(_sc)->jme_mtx)
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#define JME_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->jme_mtx, MA_OWNED)
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#define JME_MAXERR 5
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#define JME_RXCHAIN_RESET(_sc) \
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do { \
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(_sc)->jme_cdata.jme_rxhead = NULL; \
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(_sc)->jme_cdata.jme_rxtail = NULL; \
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(_sc)->jme_cdata.jme_rxlen = 0; \
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} while (0)
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#define JME_TX_TIMEOUT 5
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#define JME_TIMEOUT 1000
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#define JME_PHY_TIMEOUT 1000
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#define JME_EEPROM_TIMEOUT 1000
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#endif
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