Alan Cox cb25117d54 Make a change to the implementation of the direct map to improve performance ... on processors that support 1 GB pages. Specifically, if the end of physical memory is not aligned to a 1 GB page boundary, then map the residual physical memory with multiple 2 MB page mappings rather than a single 1 GB page mapping. When a 1 GB page mapping is used for this residual memory, access to the memory is slower than when multiple 2 MB page mappings are used. (I suspect that the reason for this slowdown is that the TLB is actually being loaded with 4 KB page mappings for the residual memory.) X-MFC after: r214425		2011-03-02 00:24:07 +00:00
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acpica	sysctl(9) cleanup checkpoint: amd64 GENERIC builds cleanly.	2011-01-12 19:54:19 +00:00
amd64	Make a change to the implementation of the direct map to improve performance	2011-03-02 00:24:07 +00:00
compile
conf	Add options NO_ADAPTIVE_SX to the XENHVM kernel configuration, matching	2010-12-13 12:15:46 +00:00
ia32	Clear the padding when returning context to the usermode, for	2011-02-05 15:10:27 +00:00
include	Remove pmap fields that are either unused or not fully implemented.	2011-02-17 15:36:29 +00:00
linux32	For realtime signals fill the sigval value.	2011-02-15 21:46:36 +00:00
pci	number of cleanups in i386 and amd64 pci md code	2009-09-24 07:11:23 +00:00
Makefile	Adjustments to make a tags file a bit more suitable to amd64.	2008-12-01 14:15:10 +00:00