264 lines
8.5 KiB
C
264 lines
8.5 KiB
C
/*-
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* Copyright (c) 1998 - 2008 Søren Schmidt <sos@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification, immediately at the beginning of the file.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_ata.h"
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#include <sys/param.h>
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#include <sys/module.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/ata.h>
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#include <sys/bus.h>
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#include <sys/endian.h>
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#include <sys/malloc.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/sema.h>
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#include <sys/taskqueue.h>
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#include <vm/uma.h>
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#include <machine/stdarg.h>
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#include <machine/resource.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/ata/ata-all.h>
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#include <dev/ata/ata-pci.h>
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#include <ata_if.h>
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/* local prototypes */
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static int ata_ati_chipinit(device_t dev);
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static int ata_ati_dumb_ch_attach(device_t dev);
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static int ata_ati_ixp700_ch_attach(device_t dev);
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static int ata_ati_setmode(device_t dev, int target, int mode);
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/* misc defines */
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#define SII_MEMIO 1 /* must match ata_siliconimage.c's definition */
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#define SII_BUG 0x04 /* must match ata_siliconimage.c's definition */
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#define ATI_SATA SII_MEMIO
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#define ATI_PATA 0x02
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#define ATI_AHCI 0x04
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static int force_ahci = 1;
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TUNABLE_INT("hw.ahci.force", &force_ahci);
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/*
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* ATI chipset support functions
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*/
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static int
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ata_ati_probe(device_t dev)
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{
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struct ata_pci_controller *ctlr = device_get_softc(dev);
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static const struct ata_chip_id const ids[] =
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{{ ATA_ATI_IXP200, 0x00, ATI_PATA, 0, ATA_UDMA5, "IXP200" },
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{ ATA_ATI_IXP300, 0x00, ATI_PATA, 0, ATA_UDMA6, "IXP300" },
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{ ATA_ATI_IXP300_S1, 0x00, ATI_SATA, SII_BUG, ATA_SA150, "IXP300" },
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{ ATA_ATI_IXP400, 0x00, ATI_PATA, 0, ATA_UDMA6, "IXP400" },
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{ ATA_ATI_IXP400_S1, 0x00, ATI_SATA, SII_BUG, ATA_SA150, "IXP400" },
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{ ATA_ATI_IXP400_S2, 0x00, ATI_SATA, SII_BUG, ATA_SA150, "IXP400" },
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{ ATA_ATI_IXP600, 0x00, ATI_PATA, 0, ATA_UDMA6, "IXP600" },
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{ ATA_ATI_IXP600_S1, 0x00, ATI_AHCI, 0, ATA_SA300, "IXP600" },
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{ ATA_ATI_IXP700, 0x00, ATI_PATA, 0, ATA_UDMA6, "IXP700/800" },
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{ ATA_ATI_IXP700_S1, 0x00, ATI_AHCI, 0, ATA_SA300, "IXP700/800" },
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{ ATA_ATI_IXP700_S2, 0x00, ATI_AHCI, 0, ATA_SA300, "IXP700/800" },
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{ ATA_ATI_IXP700_S3, 0x00, ATI_AHCI, 0, ATA_SA300, "IXP700/800" },
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{ ATA_ATI_IXP700_S4, 0x00, ATI_AHCI, 0, ATA_SA300, "IXP700/800" },
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{ ATA_ATI_IXP800_S1, 0x00, ATI_AHCI, 0, ATA_SA300, "IXP800" },
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{ ATA_ATI_IXP800_S2, 0x00, ATI_AHCI, 0, ATA_SA300, "IXP800" },
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{ 0, 0, 0, 0, 0, 0}};
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if (pci_get_vendor(dev) != ATA_ATI_ID)
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return ENXIO;
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if (!(ctlr->chip = ata_match_chip(dev, ids)))
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return ENXIO;
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ata_set_desc(dev);
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switch (ctlr->chip->cfg1) {
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case ATI_PATA:
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ctlr->chipinit = ata_ati_chipinit;
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break;
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case ATI_SATA:
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/*
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* the ATI SATA controller is actually a SiI 3112 controller
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*/
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ctlr->chipinit = ata_sii_chipinit;
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break;
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case ATI_AHCI:
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if (force_ahci == 1 || pci_get_subclass(dev) != PCIS_STORAGE_IDE)
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ctlr->chipinit = ata_ahci_chipinit;
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else
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ctlr->chipinit = ata_ati_chipinit;
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break;
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}
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return (BUS_PROBE_DEFAULT);
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}
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static int
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ata_ati_chipinit(device_t dev)
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{
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struct ata_pci_controller *ctlr = device_get_softc(dev);
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device_t smbdev;
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uint8_t satacfg;
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if (ata_setup_interrupt(dev, ata_generic_intr))
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return ENXIO;
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if (ctlr->chip->cfg1 == ATI_AHCI) {
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ctlr->ch_attach = ata_ati_dumb_ch_attach;
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ctlr->setmode = ata_sata_setmode;
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return (0);
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}
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switch (ctlr->chip->chipid) {
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case ATA_ATI_IXP600:
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/* IXP600 only has 1 PATA channel */
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ctlr->channels = 1;
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break;
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case ATA_ATI_IXP700:
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/*
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* When "combined mode" is enabled, an additional PATA channel is
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* emulated with two SATA ports and appears on this device.
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* This mode can only be detected via SMB controller.
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*/
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smbdev = pci_find_device(ATA_ATI_ID, 0x4385);
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if (smbdev != NULL) {
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satacfg = pci_read_config(smbdev, 0xad, 1);
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if (bootverbose)
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device_printf(dev, "SATA controller %s (%s%s channel)\n",
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(satacfg & 0x01) == 0 ? "disabled" : "enabled",
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(satacfg & 0x08) == 0 ? "" : "combined mode, ",
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(satacfg & 0x10) == 0 ? "primary" : "secondary");
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ctlr->chipset_data = (void *)(uintptr_t)satacfg;
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/*
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* If SATA controller is enabled but combined mode is disabled,
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* we have only one PATA channel. Ignore a non-existent channel.
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*/
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if ((satacfg & 0x09) == 0x01)
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ctlr->ichannels &= ~(1 << ((satacfg & 0x10) >> 4));
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else {
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ctlr->ch_attach = ata_ati_ixp700_ch_attach;
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}
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}
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break;
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}
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ctlr->setmode = ata_ati_setmode;
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return 0;
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}
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static int
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ata_ati_dumb_ch_attach(device_t dev)
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{
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struct ata_channel *ch = device_get_softc(dev);
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if (ata_pci_ch_attach(dev))
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return ENXIO;
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ch->flags |= ATA_SATA;
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return (0);
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}
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static int
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ata_ati_ixp700_ch_attach(device_t dev)
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{
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struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
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struct ata_channel *ch = device_get_softc(dev);
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uint8_t satacfg = (uint8_t)(uintptr_t)ctlr->chipset_data;
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/* Setup the usual register normal pci style. */
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if (ata_pci_ch_attach(dev))
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return ENXIO;
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/* One of channels is PATA, another is SATA. */
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if (ch->unit == ((satacfg & 0x10) >> 4))
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ch->flags |= ATA_SATA;
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return (0);
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}
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static int
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ata_ati_setmode(device_t dev, int target, int mode)
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{
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device_t parent = device_get_parent(dev);
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struct ata_pci_controller *ctlr = device_get_softc(parent);
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struct ata_channel *ch = device_get_softc(dev);
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int devno = (ch->unit << 1) + target;
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int offset = (devno ^ 0x01) << 3;
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int piomode;
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static const uint8_t piotimings[] = { 0x5d, 0x47, 0x34, 0x22, 0x20 };
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static const uint8_t dmatimings[] = { 0x77, 0x21, 0x20 };
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mode = min(mode, ctlr->chip->max_dma);
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if (mode >= ATA_UDMA0) {
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/* Set UDMA mode, enable UDMA, set WDMA2/PIO4 */
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pci_write_config(parent, 0x56,
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(pci_read_config(parent, 0x56, 2) &
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~(0xf << (devno << 2))) |
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((mode & ATA_MODE_MASK) << (devno << 2)), 2);
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pci_write_config(parent, 0x54,
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pci_read_config(parent, 0x54, 1) |
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(0x01 << devno), 1);
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pci_write_config(parent, 0x44,
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(pci_read_config(parent, 0x44, 4) &
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~(0xff << offset)) |
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(dmatimings[2] << offset), 4);
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piomode = ATA_PIO4;
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} else if (mode >= ATA_WDMA0) {
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/* Disable UDMA, set WDMA mode and timings, calculate PIO. */
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pci_write_config(parent, 0x54,
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pci_read_config(parent, 0x54, 1) &
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~(0x01 << devno), 1);
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pci_write_config(parent, 0x44,
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(pci_read_config(parent, 0x44, 4) &
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~(0xff << offset)) |
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(dmatimings[mode & ATA_MODE_MASK] << offset), 4);
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piomode = (mode == ATA_WDMA0) ? ATA_PIO0 :
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(mode == ATA_WDMA1) ? ATA_PIO3 : ATA_PIO4;
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} else {
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/* Disable UDMA, set requested PIO. */
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pci_write_config(parent, 0x54,
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pci_read_config(parent, 0x54, 1) &
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~(0x01 << devno), 1);
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piomode = mode;
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}
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/* Set PIO mode and timings, calculated above. */
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pci_write_config(parent, 0x4a,
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(pci_read_config(parent, 0x4a, 2) &
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~(0xf << (devno << 2))) |
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((piomode - ATA_PIO0) << (devno<<2)),2);
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pci_write_config(parent, 0x40,
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(pci_read_config(parent, 0x40, 4) &
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~(0xff << offset)) |
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(piotimings[ata_mode2idx(piomode)] << offset), 4);
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return (mode);
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}
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ATA_DECLARE_DRIVER(ata_ati);
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MODULE_DEPEND(ata_ati, ata_ahci, 1, 1, 1);
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MODULE_DEPEND(ata_ati, ata_sii, 1, 1, 1);
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