210 lines
7.2 KiB
C
210 lines
7.2 KiB
C
/*
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* Copyright (C) 2000
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* Dr. Duncan McLennan Barclay, dmlb@ragnet.demon.co.uk.
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the author nor the names of any co-contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY DUNCAN BARCLAY AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL DUNCAN BARCLAY OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id$
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*
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*/
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/* $NetBSD: if_rayreg.h,v 1.1 2000/01/23 23:59:22 chopps Exp $ */
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/*
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* Copyright (c) 2000 Christian E. Hopps
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the author nor the names of any co-contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* CCR registers, appearing in the attribute memory space
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*/
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#define RAY_CCR 0xf00 /* CCR register offset */
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#define RAY_COR (RAY_CCR + (0x00 << 1)) /* config option register */
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#define RAY_CCSR (RAY_CCR + (0x01 << 1)) /* config/status register */
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#define RAY_PIN (RAY_CCR + (0x02 << 1)) /* not in hw */
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#define RAY_SOCKETCOPY (RAY_CCR + (0x03 << 1)) /* not used by hw */
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#define RAY_HCSIR (RAY_CCR + (0x05 << 1)) /* HCS intr register */
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#define RAY_ECFIR (RAY_CCR + (0x06 << 1)) /* ECF intr register */
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/*
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* We don't seem to be able to access these in a simple manner
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*/
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#define RAY_AR0 (RAY_CCR + 0x08) /* authorization register 0 (unused) */
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#define RAY_AR1 (RAY_CCR + 0x09) /* authorization register 1 (unused) */
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#define RAY_PMR (RAY_CCR + 0x0a) /* program mode register (unused) */
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#define RAY_TMR (RAY_CCR + 0x0b) /* pc test mode register (unused) */
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#define RAY_FCWR (RAY_CCR + 0x10) /* frequency control word register */
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#define RAY_TMC1 (RAY_CCR + 0x14) /* test mode control 1 (unused) */
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#define RAY_TMC2 (RAY_CCR + 0x15) /* test mode control 1 (unused) */
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#define RAY_TMC3 (RAY_CCR + 0x16) /* test mode control 1 (unused) */
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#define RAY_TMC4 (RAY_CCR + 0x17) /* test mode control 1 (unused) */
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/*
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* COR register bits
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*/
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#define RAY_COR_CFG_NUM 0x01 /* currently ignored and set */
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#define RAY_COR_CFG_MASK 0x3f /* mask for function */
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#define RAY_COR_LEVEL_IRQ 0x40 /* currently ignored and set */
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#define RAY_COR_RESET 0x80 /* soft-reset the card */
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/*
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* CCS register bits
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*/
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/* XXX the linux driver indicates bit 0 is the irq bit */
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#define RAY_CCS_IRQ 0x02 /* interrupt pending */
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#define RAY_CCS_POWER_DOWN 0x04
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/*
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* HCSI register bits
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*
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* the host can only clear this bit.
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*/
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#define RAY_HCSIR_IRQ 0x01 /* indicates an interrupt */
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/*
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* ECFI register values
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*/
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#define RAY_ECSIR_IRQ 0x01 /* interrupt the card */
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/*
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* authorization register 0 values
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* -- used for testing/programming the card (unused)
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*/
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#define RAY_AR0_ON 0x57
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/*
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* authorization register 1 values
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* -- used for testing/programming the card (unused)
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*/
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#define RAY_AR1_ON 0x82
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/*
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* PMR bits -- these are used to program the card (unused)
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*/
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#define RAY_PMR_PC2PM 0x02 /* grant access to firmware flash */
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#define RAY_PMR_PC2CAL 0x10 /* read access to the A/D modem inp */
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#define RAY_PMR_MLSE 0x20 /* read access to the MSLE prom */
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/*
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* TMR bits -- get access to test modes (unused)
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*/
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#define RAY_TMR_TEST 0x08 /* test mode */
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/*
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* FCWR -- frequency control word, values from [0x02,0xA6] map to
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* RF frequency values.
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*/
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/*
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* 48k of memory
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*/
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#define RAY_SRAM_MEM_BASE 0
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#define RAY_SRAM_MEM_SIZE 0xc000
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/*
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* offsets into shared ram
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*/
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#define RAY_SCB_BASE 0x0 /* cfg/status/ctl area */
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#define RAY_STATUS_BASE 0x0100
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#define RAY_HOST_TO_ECF_BASE 0x0200
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#define RAY_ECF_TO_HOST_BASE 0x0300
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#define RAY_CCS_BASE 0x0400
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#define RAY_RCS_BASE 0x0800
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#define RAY_APOINT_TIM_BASE 0x0c00
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#define RAY_SSID_LIST_BASE 0x0d00
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#define RAY_TX_BASE 0x1000
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#define RAY_TX_SIZE 0x7000
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#define RAY_TX_END 0x8000
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#define RAY_RX_BASE 0x8000
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#define RAY_RX_END 0xc000
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#define RAY_RX_MASK 0x3fff
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struct ray_ecf_startup_v4 {
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u_int8_t e_status;
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u_int8_t e_station_addr[ETHER_ADDR_LEN];
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u_int8_t e_prg_cksum;
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u_int8_t e_cis_cksum;
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u_int8_t e_resv0[7];
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u_int8_t e_japan_callsign[12];
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};
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struct ray_ecf_startup_v5 {
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u_int8_t e_status;
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u_int8_t e_station_addr[ETHER_ADDR_LEN];
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u_int8_t e_resv0;
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u_int8_t e_rates[8];
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u_int8_t e_japan_callsign[12];
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u_int8_t e_prg_cksum;
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u_int8_t e_cis_cksum;
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u_int8_t e_fw_build_string;
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u_int8_t e_fw_build;
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u_int8_t e_fw_resv;
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u_int8_t e_asic_version;
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u_int8_t e_tib_size;
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u_int8_t e_resv1[29];
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};
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/*
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* Status word result codes
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*/
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#define RAY_ECFS_RESERVED0 0x01
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#define RAY_ECFS_PROC_SELF_TEST 0x02
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#define RAY_ECFS_PROG_MEM_CHECKSUM 0x04
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#define RAY_ECFS_DATA_MEM_TEST 0x08
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#define RAY_ECFS_RX_CALIBRATION 0x10
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#define RAY_ECFS_FW_VERSION_COMPAT 0x20
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#define RAY_ECFS_RERSERVED1 0x40
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#define RAY_ECFS_TEST_COMPLETE 0x80
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#define RAY_ECFS_CARD_OK RAY_ECFS_TEST_COMPLETE
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/*
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* Firmware build codes
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*/
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#define RAY_ECFS_BUILD_4 0x55
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#define RAY_ECFS_BUILD_5 0x5
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