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value instead of blindly resetting it to 0. However, it seems page select bits of some 88E1116 PHY is initialized to invalid one such that restoring page select bits after programming broke MII register access. The correct solution would be reset page select bits to 0 in PHY attach stage but it would require more testing. Since we're in BETA stage such a change would be dangerous so just back it out. This change should fix nfe(4) breakage on NVIDIA MCP55. Reported by: Ryan Rogers < webmaster <> doghouserepair dot com > Sam Fourman Jr. < sfourman <> gmail dot com > Tested by: Ryan Rogers < webmaster <> doghouserepair dot com > Sam Fourman Jr. < sfourman <> gmail dot com > Approved by: re (kib) |
||
|---|---|---|
| .. | ||
| acphy.c | ||
| acphyreg.h | ||
| amphy.c | ||
| amphyreg.h | ||
| atphy.c | ||
| atphyreg.h | ||
| axphy.c | ||
| axphyreg.h | ||
| bmtphy.c | ||
| bmtphyreg.h | ||
| brgphy.c | ||
| brgphyreg.h | ||
| ciphy.c | ||
| ciphyreg.h | ||
| e1000phy.c | ||
| e1000phyreg.h | ||
| exphy.c | ||
| gentbi.c | ||
| icsphy.c | ||
| icsphyreg.h | ||
| inphy.c | ||
| inphyreg.h | ||
| ip1000phy.c | ||
| ip1000phyreg.h | ||
| jmphy.c | ||
| jmphyreg.h | ||
| lxtphy.c | ||
| lxtphyreg.h | ||
| mii_physubr.c | ||
| mii.c | ||
| mii.h | ||
| miibus_if.m | ||
| miidevs | ||
| miivar.h | ||
| mlphy.c | ||
| nsgphy.c | ||
| nsgphyreg.h | ||
| nsphy.c | ||
| nsphyreg.h | ||
| nsphyter.c | ||
| nsphyterreg.h | ||
| pnaphy.c | ||
| qsphy.c | ||
| qsphyreg.h | ||
| rgephy.c | ||
| rgephyreg.h | ||
| rlphy.c | ||
| rlswitch.c | ||
| ruephy.c | ||
| ruephyreg.h | ||
| smcphy.c | ||
| tdkphy.c | ||
| tdkphyreg.h | ||
| tlphy.c | ||
| tlphyreg.h | ||
| truephy.c | ||
| truephyreg.h | ||
| ukphy_subr.c | ||
| ukphy.c | ||
| xmphy.c | ||
| xmphyreg.h | ||