c390729786
* Add the siba bus phy/mac/bandwidth clock definitions (TGSLOW*) * Add the PHY-N register gateway (BWN_PHY_N()) * Add the PHY-N TX phystat1 register - we need to actually fill out more of the PHY encoding information when we assemble a frame. * Various ancillary stuff Nothing uses this yet, but I do have CCK/OFDM somewhat working in 2GHz mode on a PHY-N device. Obtained from: b43 (definitions)