Andrew Thompson cefd33c787 Hook up the five gpio pins on the Avila board to the gpio framework. There are ... actually 16 I/O lines but the other ones are used for system devices and interrupts. The IXP4XX platform can set interrupts on these pins for high/low/rising/falling/transitional but this is not implemented yet. The Cambria has the same interface but as all the pins are assigned to system functions the gpio header is toggled via a PLD on the i2c bus and is not supported by this commit.		2010-11-07 20:33:39 +00:00
..
arm	Adjust the order of operations in spinlock_enter() and spinlock_exit() to	2010-11-05 13:42:58 +00:00
at91	Remove a device_printf() accidentally left in r213894.	2010-10-15 15:16:36 +00:00
compile
conf	Hook up the five gpio pins on the Avila board to the gpio framework. There are	2010-11-07 20:33:39 +00:00
econa	Convert the PHY drivers to honor the mii_flags passed down and convert	2010-10-15 14:52:11 +00:00
include	Add basic cpu_sleep() support for Marvell SoCs. This drops my SheevaPlug's	2010-09-18 16:57:05 +00:00
mv	Set of legacy mode SATA enchancements:	2010-10-18 11:30:13 +00:00
s3c2xx0	Allow external interrupts.	2010-07-24 23:41:09 +00:00
sa11x0	The NetBSD Foundation has granted permission to remove clauses 3 and 4.	2010-02-16 21:59:17 +00:00
xscale	Hook up the five gpio pins on the Avila board to the gpio framework. There are	2010-11-07 20:33:39 +00:00