4948f4b8d5
Executive is a library that can be used by standalone applications and kernels to abstract access to Octeon SoC and board-specific hardware and facilities. The FreeBSD port to Octeon will be updated to use this where possible.
284 lines
9.0 KiB
C
284 lines
9.0 KiB
C
/***********************license start***************
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* Copyright (c) 2003-2009 Cavium Networks (support@cavium.com). All rights
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* reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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*
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* * Neither the name of Cavium Networks nor the names of
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* its contributors may be used to endorse or promote products
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* derived from this software without specific prior written
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* permission.
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*
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* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
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* AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS
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* OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH
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* RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY
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* REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT
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* DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES
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* OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR
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* PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET
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* POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT
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* OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
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*
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*
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* For any questions regarding licensing please contact marketing@caviumnetworks.com
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*
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***********************license end**************************************/
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/**
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* @file
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* Small utility functions and macros to ease programming of Octeon.
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*
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* <hr>$Revision: 38306 $<hr>
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*/
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#ifndef __CVMX_UTILS_H__
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#define __CVMX_UTILS_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifndef TRUE
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#define FALSE 0
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#define TRUE (!(FALSE))
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#endif
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/*
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* The macros cvmx_likely and cvmx_unlikely use the
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* __builtin_expect GCC operation to control branch
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* probabilities for a conditional. For example, an "if"
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* statement in the code that will almost always be
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* executed should be written as "if (cvmx_likely(...))".
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* If the "else" section of an if statement is more
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* probable, use "if (cvmx_unlikey(...))".
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*/
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#define cvmx_likely(x) __builtin_expect(!!(x), 1)
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#define cvmx_unlikely(x) __builtin_expect(!!(x), 0)
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#if CVMX_ENABLE_DEBUG_PRINTS
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#ifdef CVMX_BUILD_FOR_LINUX_KERNEL
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#define cvmx_dprintf printk
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#else
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#define cvmx_dprintf printf
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#endif
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#else
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static inline void cvmx_dprintf(const char *format, ...) __attribute__ ((format(printf, 1, 2)));
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static inline void cvmx_dprintf(const char *format, ...)
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{
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/* Prints are disbled, do nothing */
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}
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#endif
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#define CAST64(v) ((long long)(long)(v))
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#define CASTPTR(type, v) ((type *)(long)(v))
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#define CVMX_MAX_CORES (16)
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#define CVMX_CACHE_LINE_SIZE (128) // In bytes
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#define CVMX_CACHE_LINE_MASK (CVMX_CACHE_LINE_SIZE - 1) // In bytes
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#define CVMX_CACHE_LINE_ALIGNED __attribute__ ((aligned (CVMX_CACHE_LINE_SIZE)))
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/**
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* This macro spins on a field waiting for it to reach a value. It
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* is common in code to need to wait for a specific field in a CSR
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* to match a specific value. Conceptually this macro expands to:
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*
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* 1) read csr at "address" with a csr typedef of "type"
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* 2) Check if ("type".s."field" "op" "value")
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* 3) If #2 isn't true loop to #1 unless too much time has passed.
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*/
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#define CVMX_WAIT_FOR_FIELD64(address, type, field, op, value, timeout_usec)\
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({int result; \
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do { \
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uint64_t done = cvmx_get_cycle() + (uint64_t)timeout_usec * \
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cvmx_sysinfo_get()->cpu_clock_hz / 1000000; \
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type c; \
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while (1) \
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{ \
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c.u64 = cvmx_read_csr(address); \
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if ((c.s.field) op (value)) { \
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result = 0; \
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break; \
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} else if (cvmx_get_cycle() > done) { \
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result = -1; \
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break; \
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} else \
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cvmx_wait(100); \
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} \
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} while (0); \
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result;})
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/**
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* Builds a bit mask given the required size in bits.
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*
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* @param bits Number of bits in the mask
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* @return The mask
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*/
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static inline uint64_t cvmx_build_mask(uint64_t bits)
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{
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return ~((~0x0ull) << bits);
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}
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/**
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* Builds a memory address for I/O based on the Major and Sub DID.
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*
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* @param major_did 5 bit major did
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* @param sub_did 3 bit sub did
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* @return I/O base address
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*/
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static inline uint64_t cvmx_build_io_address(uint64_t major_did, uint64_t sub_did)
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{
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return ((0x1ull << 48) | (major_did << 43) | (sub_did << 40));
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}
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/**
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* Perform mask and shift to place the supplied value into
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* the supplied bit rage.
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*
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* Example: cvmx_build_bits(39,24,value)
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* <pre>
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* 6 5 4 3 3 2 1
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* 3 5 7 9 1 3 5 7 0
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* +-------+-------+-------+-------+-------+-------+-------+------+
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* 000000000000000000000000___________value000000000000000000000000
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* </pre>
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*
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* @param high_bit Highest bit value can occupy (inclusive) 0-63
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* @param low_bit Lowest bit value can occupy inclusive 0-high_bit
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* @param value Value to use
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* @return Value masked and shifted
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*/
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static inline uint64_t cvmx_build_bits(uint64_t high_bit, uint64_t low_bit, uint64_t value)
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{
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return ((value & cvmx_build_mask(high_bit - low_bit + 1)) << low_bit);
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}
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/**
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* Return the number of cores available in the chip
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*
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* @return
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*/
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static inline uint32_t cvmx_octeon_num_cores(void)
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{
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uint32_t ciu_fuse = (uint32_t)cvmx_read_csr(CVMX_CIU_FUSE) & 0xffff;
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return cvmx_pop(ciu_fuse);
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}
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/**
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* Return true if Octeon is CN38XX pass 1
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*
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* @return
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*/
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static inline int cvmx_octeon_is_pass1(void)
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{
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return OCTEON_IS_MODEL(OCTEON_CN38XX_PASS1);
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}
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/**
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* Return true if Octeon is CN36XX
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*
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* @return
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*/
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static inline int cvmx_octeon_model_CN36XX(void)
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{
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return(OCTEON_IS_MODEL(OCTEON_CN38XX)
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&& !OCTEON_IS_MODEL(OCTEON_CN38XX_PASS1)
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&&cvmx_fuse_read(264));
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}
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/**
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* @deprecated
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* Determine if Octeon supports the DFA state machines. This function is
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* deprecated, use octeon_has_feature(OCTEON_FEATURE_DFA) instead.
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*
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* @return Non zero if DFA is supported
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*/
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static inline int cvmx_octeon_dfa_present(void) __attribute__((deprecated));
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static inline int cvmx_octeon_dfa_present(void)
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{
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return octeon_has_feature(OCTEON_FEATURE_DFA);
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}
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/**
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* @deprecated
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* Determine if Octeon supports ZIP. This function is deprecated, use
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* octeon_has_feature(OCTEON_FEATURE_ZIP) instead.
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*
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* @return Non zero if DFA is supported
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*/
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static inline int cvmx_octeon_zip_present(void) __attribute__((deprecated));
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static inline int cvmx_octeon_zip_present(void)
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{
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return octeon_has_feature(OCTEON_FEATURE_ZIP);
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}
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/**
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* @deprecated
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* Determine if Octeon supports Crypto acceleration. This function is
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* deprecated, use octeon_has_feature(OCTEON_FEATURE_CRYPTO) instead.
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*
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* @return Non zero if DFA is supported
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*/
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static inline int cvmx_octeon_crypto_present(void) __attribute__((deprecated));
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static inline int cvmx_octeon_crypto_present(void)
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{
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return octeon_has_feature(OCTEON_FEATURE_CRYPTO);
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}
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/**
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* @deprecated
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* This function is a trival wrapper around cvmx_read64_uint64(). Use
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* cvmx_read64_uint64() instead as this function is deprecated.
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*
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* @param address
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*
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* @return
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*/
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static inline uint64_t cvmx_read64(uint64_t address) __attribute__((deprecated));
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static inline uint64_t cvmx_read64(uint64_t address)
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{
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return cvmx_read64_uint64(address);
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}
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/**
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* @deprecated
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* This function is a trival wrapper around cvmx_write64_uint64(). Use
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* cvmx_write64_uint64() instead as this function is deprecated.
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*
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* @param address Location to write ro
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* @param value Value to write
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*
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* @return
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*/
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static inline void cvmx_write64(uint64_t address, uint64_t value) __attribute__((deprecated));
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static inline void cvmx_write64(uint64_t address, uint64_t value)
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{
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cvmx_write64_uint64(address, value);
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* __CVMX_UTILS_H__ */
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