62efea1e92
ioccom.h defines only implementation detail, and should therefore only be included from the #include which defines the ioctl tags, in other words: never include it from *.c
271 lines
8.4 KiB
C
271 lines
8.4 KiB
C
/*
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* Copyright (c) 1997, 1999 Hellmuth Michaelis. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*---------------------------------------------------------------------------
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*
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* i4b_drn_ngo.c - Dr. Neuhaus Niccy GO@ and SAGEM Cybermod
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* --------------------------------------------------------
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*
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* $Id: i4b_drn_ngo.c,v 1.3 1999/12/13 21:25:26 hm Exp $
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*
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* $FreeBSD$
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*
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* last edit-date: [Mon Dec 13 21:59:30 1999]
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*
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*---------------------------------------------------------------------------*/
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#include "isic.h"
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#include "opt_i4b.h"
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#if (NISIC > 0) && defined(DRN_NGO)
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#include <sys/socket.h>
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#include <machine/clock.h>
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#include <net/if.h>
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#include <machine/i4b_debug.h>
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#include <machine/i4b_ioctl.h>
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#include <i4b/include/i4b_global.h>
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#include <i4b/layer1/i4b_l1.h>
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#include <i4b/layer1/i4b_isac.h>
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#include <i4b/layer1/i4b_hscx.h>
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/*---------------------------------------------------------------------------*
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* Niccy GO@ definitions
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*
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* the card uses 2 i/o addressranges each using 2 bytes
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*
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* addressrange 0:
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* offset 0 - ISAC dataregister
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* offset 1 - HSCX dataregister
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* addressrange 1:
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* offset 0 - ISAC addressregister
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* offset 1 - HSCX addressregister
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*
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* to access an ISAC/HSCX register, you have to write the register
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* number into the ISAC or HSCX addressregister and then read/write
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* data for the ISAC/HSCX register into/from the corresponding
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* dataregister.
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*
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* Thanks to Klaus Muehle of Dr. Neuhaus Telekommunikation for giving
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* out this information!
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*
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*---------------------------------------------------------------------------*/
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#define NICCY_PORT_MIN 0x200
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#define NICCY_PORT_MAX 0x3e0
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#define HSCX_ABIT 0x1000 /* flag, HSCX A is meant */
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#define HSCX_BBIT 0x2000 /* flag, HSCX B is meant */
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#define HSCX_BOFF 0x40
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#define ADDR_OFF 2 /* address register range offset */
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#define ISAC_DATA 0
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#define HSCX_DATA 1
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#define ISAC_ADDR 0
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#define HSCX_ADDR 1
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/*---------------------------------------------------------------------------*
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* Dr. Neuhaus Niccy GO@ read fifo routine
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*---------------------------------------------------------------------------*/
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static void
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drnngo_read_fifo(struct l1_softc *sc, int what, void *buf, size_t size)
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{
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bus_space_tag_t tdata, tadr;
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bus_space_handle_t hdata, hadr;
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tdata = rman_get_bustag(sc->sc_resources.io_base[0]);
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hdata = rman_get_bushandle(sc->sc_resources.io_base[0]);
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tadr = rman_get_bustag(sc->sc_resources.io_base[1]);
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hadr = rman_get_bushandle(sc->sc_resources.io_base[1]);
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switch(what)
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{
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case ISIC_WHAT_ISAC:
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bus_space_write_1 (tadr ,hadr, ISAC_ADDR,0x0);
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bus_space_read_multi_1(tdata,hdata,ISAC_DATA,buf,size);
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break;
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case ISIC_WHAT_HSCXA:
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bus_space_write_1 (tadr ,hadr ,HSCX_ADDR,0x0);
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bus_space_read_multi_1(tdata,hdata,HSCX_DATA,buf,size);
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break;
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case ISIC_WHAT_HSCXB:
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bus_space_write_1 (tadr ,hadr ,HSCX_ADDR,HSCX_BOFF);
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bus_space_read_multi_1(tdata,hdata,HSCX_DATA,buf,size);
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break;
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}
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}
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/*---------------------------------------------------------------------------*
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* Dr. Neuhaus Niccy GO@ write fifo routine
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*---------------------------------------------------------------------------*/
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static void
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drnngo_write_fifo(struct l1_softc *sc, int what, void *buf, size_t size)
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{
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bus_space_tag_t tdata, tadr;
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bus_space_handle_t hdata, hadr;
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tdata = rman_get_bustag(sc->sc_resources.io_base[0]);
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hdata = rman_get_bushandle(sc->sc_resources.io_base[0]);
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tadr = rman_get_bustag(sc->sc_resources.io_base[1]);
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hadr = rman_get_bushandle(sc->sc_resources.io_base[1]);
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switch(what)
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{
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case ISIC_WHAT_ISAC:
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bus_space_write_1 (tadr ,hadr, ISAC_ADDR,0x0);
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bus_space_write_multi_1(tdata,hdata,ISAC_DATA,buf,size);
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break;
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case ISIC_WHAT_HSCXA:
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bus_space_write_1 (tadr ,hadr ,HSCX_ADDR,0x0);
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bus_space_write_multi_1(tdata,hdata,HSCX_DATA,buf,size);
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break;
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case ISIC_WHAT_HSCXB:
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bus_space_write_1 (tadr ,hadr ,HSCX_ADDR,HSCX_BOFF);
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bus_space_write_multi_1(tdata,hdata,HSCX_DATA,buf,size);
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break;
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}
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}
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/*---------------------------------------------------------------------------*
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* Dr. Neuhaus Niccy GO@ write register routine
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*---------------------------------------------------------------------------*/
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static void
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drnngo_write_reg(struct l1_softc *sc, int what, bus_size_t reg, u_int8_t data)
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{
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bus_space_tag_t tdata, tadr;
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bus_space_handle_t hdata, hadr;
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tdata = rman_get_bustag(sc->sc_resources.io_base[0]);
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hdata = rman_get_bushandle(sc->sc_resources.io_base[0]);
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tadr = rman_get_bustag(sc->sc_resources.io_base[1]);
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hadr = rman_get_bushandle(sc->sc_resources.io_base[1]);
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switch(what)
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{
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case ISIC_WHAT_ISAC:
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bus_space_write_1(tadr ,hadr, ISAC_ADDR,reg);
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bus_space_write_1(tdata,hdata,ISAC_DATA,data);
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break;
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case ISIC_WHAT_HSCXA:
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bus_space_write_1(tadr ,hadr ,HSCX_ADDR,reg);
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bus_space_write_1(tdata,hdata,HSCX_DATA,data);
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break;
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case ISIC_WHAT_HSCXB:
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bus_space_write_1(tadr ,hadr ,HSCX_ADDR,reg+HSCX_BOFF);
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bus_space_write_1(tdata,hdata,HSCX_DATA,data);
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break;
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}
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}
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/*---------------------------------------------------------------------------*
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* Dr. Neuhaus Niccy GO@ read register routine
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*---------------------------------------------------------------------------*/
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static u_int8_t
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drnngo_read_reg(struct l1_softc *sc, int what, bus_size_t reg)
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{
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bus_space_tag_t tdata, tadr;
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bus_space_handle_t hdata, hadr;
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tdata = rman_get_bustag(sc->sc_resources.io_base[0]);
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hdata = rman_get_bushandle(sc->sc_resources.io_base[0]);
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tadr = rman_get_bustag(sc->sc_resources.io_base[1]);
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hadr = rman_get_bushandle(sc->sc_resources.io_base[1]);
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switch(what)
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{
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case ISIC_WHAT_ISAC:
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bus_space_write_1(tadr ,hadr, ISAC_ADDR,reg);
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return bus_space_read_1(tdata,hdata,ISAC_DATA);
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case ISIC_WHAT_HSCXA:
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bus_space_write_1(tadr ,hadr ,HSCX_ADDR,reg);
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return bus_space_read_1(tdata,hdata,HSCX_DATA);
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case ISIC_WHAT_HSCXB:
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bus_space_write_1(tadr ,hadr ,HSCX_ADDR,reg+HSCX_BOFF);
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return bus_space_read_1(tdata,hdata,HSCX_DATA);
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default:
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return 0;
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}
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}
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/*---------------------------------------------------------------------------*
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* probe for ISA PnP cards
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*---------------------------------------------------------------------------*/
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int
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isic_attach_drnngo(device_t dev)
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{
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int unit = device_get_unit(dev);
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struct l1_softc *sc = &l1_sc[unit];
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sc->sc_resources.io_rid[1] = 1;
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/*
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* this card needs a second io_base,
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* free resources if we don't get it
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*/
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if(!(sc->sc_resources.io_base[1] =
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bus_alloc_resource(dev, SYS_RES_IOPORT,
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&sc->sc_resources.io_rid[1],
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0UL, ~0UL, 1, RF_ACTIVE)))
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{
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printf("isic%d: Failed to get second io base.\n", unit);
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isic_detach_common(dev);
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return ENXIO;
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}
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/* setup ISAC access routines */
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sc->clearirq = NULL;
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sc->readreg = drnngo_read_reg;
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sc->writereg = drnngo_write_reg;
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sc->readfifo = drnngo_read_fifo;
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sc->writefifo = drnngo_write_fifo;
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/* setup card type */
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sc->sc_cardtyp = CARD_TYPEP_DRNNGO;
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/* setup IOM bus type */
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sc->sc_bustyp = BUS_TYPE_IOM2;
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sc->sc_ipac = 0;
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sc->sc_bfifolen = HSCX_FIFO_LEN;
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return (0);
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}
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#endif /* (NISIC > 0) && defined(DRN_NGO) */
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