19c749625f
ISDN4BSD is the work of our brand-new comitter: Hellmuth Michaelis, who has done a tremendous amount of work to bring us this far. There are still some outstanding issues and files to bring into the tree, and for now it will be needed to pick up all the extra docs from the isdn4bsd release. It is probably also a very good idea to subscribe to the isdn@freebsd.org mailing list before you try this out. These files correspond to release "beta Version 0.70.00 / December 1998" from Hellmuth.
439 lines
12 KiB
C
439 lines
12 KiB
C
/*
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* Copyright (c) 1998 Martijn Plak. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the author nor the names of any co-contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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* 4. Altered versions must be plainly marked as such, and must not be
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* misrepresented as being the original software and/or documentation.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*---------------------------------------------------------------------------
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*
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* isdn4bsd layer1 driver for Dynalink IS64PH isdn TA
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* ==================================================
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*
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* $Id: i4b_dynalink.c,v 1.8 1998/12/17 04:55:38 hm Exp $
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*
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* last edit-date: [Thu Dec 17 05:50:39 1998]
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*
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* written by Martijn Plak <tigrfhur@xs4all.nl>
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*
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* -mp 11 jun 1998 first try, code borrowed from Creatix driver
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* -mp 18 jun 1998 cleaned up code
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* -hm FreeBSD PnP
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* -mp 17 dec 1998 made it compile again
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*
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*---------------------------------------------------------------------------*/
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/* NOTES:
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This driver was written for the Dynalink IS64PH ISDN TA, based on two
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Siemens chips (HSCX 21525 and ISAC 2186). It is sold in the Netherlands.
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model numbers found on (my) card:
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IS64PH, TAS100H-N, P/N:89590555, TA200S100045521
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chips:
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Siemens PSB 21525N, HSCX TE V2.1
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Siemens PSB 2186N, ISAC-S TE V1.1
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95MS14, PNP
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plug-and-play info:
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device id "ASU1688"
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vendor id 0x88167506
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serial 0x00000044
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i/o port 4 byte alignment, 4 bytes requested,
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10 bit i/o decoding, 0x100-0x3f8 (?)
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irq 3,4,5,9,10,11,12,15, high true, edge sensitive
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At the moment I'm writing this Dynalink is replacing this card with
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one based on a single Siemens chip (IPAC). It will apparently be sold
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under the same model name.
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This driver might also work for Asuscom cards.
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*/
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#ifdef __FreeBSD__
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#include "isic.h"
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#include "opt_i4b.h"
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#include "pnp.h"
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#else
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#define NISIC 1
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#define NPNP 1
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#endif
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#if (NISIC > 0) && (NPNP > 0) && defined(DYNALINK)
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/* HEADERS
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*/
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#include <sys/socket.h>
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#include <net/if.h>
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#ifdef __FreeBSD__
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#if __FreeBSD__ >= 3
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#include <sys/ioccom.h>
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#else
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#include <sys/ioctl.h>
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#endif
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#include <machine/clock.h>
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#include <i386/isa/isa_device.h>
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#include <i386/isa/pnp.h>
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#else
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#include <machine/bus.h>
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#include <sys/device.h>
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#endif
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#ifdef __FreeBSD__
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#include <machine/i4b_debug.h>
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#include <machine/i4b_ioctl.h>
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#else
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#include <i4b/i4b_debug.h>
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#include <i4b/i4b_ioctl.h>
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#endif
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#include <i4b/include/i4b_global.h>
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#include <i4b/include/i4b_l1l2.h>
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#include <i4b/include/i4b_mbuf.h>
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#include <i4b/layer1/i4b_l1.h>
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#include <i4b/layer1/i4b_isac.h>
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#include <i4b/layer1/i4b_hscx.h>
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#ifdef __FreeBSD__
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static void dynalink_read_fifo(void *buf, const void *base, size_t len);
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static void dynalink_write_fifo(void *base, const void *buf, size_t len);
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static void dynalink_write_reg(u_char *base, u_int offset, u_int v);
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static u_char dynalink_read_reg(u_char *base, u_int offset);
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extern struct isa_driver isicdriver;
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#else
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static void dynalink_read_fifo(struct isic_softc *sc, int what, void *buf, size_t size);
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static void dynalink_write_fifo(struct isic_softc *sc, int what, const void *buf, size_t size);
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static void dynalink_write_reg(struct isic_softc *sc, int what, bus_size_t offs, u_int8_t data);
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static u_int8_t dynalink_read_reg(struct isic_softc *sc, int what, bus_size_t offs);
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void isic_attach_Dyn(struct isic_softc *sc);
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#endif
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/* io address mapping */
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#define ISAC 0
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#define HSCX 1
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#define ADDR 2
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/* ADDR bits */
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#define ADDRMASK 0x7F
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#define RESET 0x80
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/* HSCX register offsets */
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#define HSCXA 0x00
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#define HSCXB 0x40
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#ifdef __FreeBSD__
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/* base address juggling */
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#define HSCXB_HACK 0x400
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#define IOBASE(addr) (((int)addr)&0x3FC)
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#define IOADDR(addr) (((int)addr)&0x3FF)
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#define IS_HSCXB_HACK(addr) ((((int)addr)&HSCXB_HACK)?HSCXB:HSCXA)
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/* ISIC probe and attach
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*/
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int
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isic_probe_Dyn(struct isa_device *dev, unsigned int iobase2)
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{
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struct isic_softc *sc = &isic_sc[dev->id_unit];
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if(dev->id_unit >= ISIC_MAXUNIT)
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{
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printf("isic%d: Error, unit %d >= ISIC_MAXUNIT for Dynalink IS64PH.\n",
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dev->id_unit, dev->id_unit);
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return(0);
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}
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sc->sc_unit = dev->id_unit;
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/* check IRQ validity */
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switch(ffs(dev->id_irq) - 1)
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{
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case 3:
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case 4:
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case 5:
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case 9:
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case 10:
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case 11:
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case 12:
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case 15:
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break;
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default:
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printf("isic%d: Error, invalid IRQ [%d] specified for Dynalink IS64PH.\n",
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dev->id_unit, ffs(dev->id_irq)-1);
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return(0);
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break;
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}
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sc->sc_irq = dev->id_irq;
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/* check if memory addr specified */
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if(dev->id_maddr)
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{
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printf("isic%d: Error, mem addr 0x%lx specified for Dynalink IS64PH.\n",
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dev->id_unit, (u_long)dev->id_maddr);
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return (0);
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}
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dev->id_msize = 0;
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/* check if we got an iobase */
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if ( (dev->id_iobase < 0x100) ||
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(dev->id_iobase > 0x3f8) ||
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(dev->id_iobase & 3) )
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{
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printf("isic%d: Error, invalid iobase 0x%x specified for Dynalink!\n", dev->id_unit, dev->id_iobase);
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return(0);
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}
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sc->sc_port = dev->id_iobase;
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/* setup access routines */
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sc->clearirq = NULL;
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sc->readreg = dynalink_read_reg;
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sc->writereg = dynalink_write_reg;
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sc->readfifo = dynalink_read_fifo;
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sc->writefifo = dynalink_write_fifo;
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/* setup card type */
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sc->sc_cardtyp = CARD_TYPEP_DYNALINK;
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/* setup IOM bus type */
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sc->sc_bustyp = BUS_TYPE_IOM2;
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sc->sc_ipac = 0;
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sc->sc_bfifolen = HSCX_FIFO_LEN;
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/* setup ISAC and HSCX base addr */
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ISAC_BASE = (caddr_t) sc->sc_port;
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HSCX_A_BASE = (caddr_t) sc->sc_port + 1;
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HSCX_B_BASE = (caddr_t) sc->sc_port + 1 + HSCXB_HACK;
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/* Read HSCX A/B VSTR. Expected value is 0x05 (V2.1). */
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if( ((HSCX_READ(0, H_VSTR) & 0xf) != 0x5) ||
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((HSCX_READ(1, H_VSTR) & 0xf) != 0x5) )
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{
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printf("isic%d: HSCX VSTR test failed for Dynalink\n",
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dev->id_unit);
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printf("isic%d: HSC0: VSTR: %#x\n",
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dev->id_unit, HSCX_READ(0, H_VSTR));
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printf("isic%d: HSC1: VSTR: %#x\n",
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dev->id_unit, HSCX_READ(1, H_VSTR));
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return (0);
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}
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return (1);
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}
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int
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isic_attach_Dyn(struct isa_device *dev, unsigned int iobase2)
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{
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outb((dev->id_iobase)+ADDR, RESET);
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DELAY(SEC_DELAY / 10);
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outb((dev->id_iobase)+ADDR, 0);
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DELAY(SEC_DELAY / 10);
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return(1);
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}
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#else
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void isic_attach_Dyn(struct isic_softc *sc)
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{
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/* setup access routines */
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sc->clearirq = NULL;
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sc->readreg = dynalink_read_reg;
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sc->writereg = dynalink_write_reg;
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sc->readfifo = dynalink_read_fifo;
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sc->writefifo = dynalink_write_fifo;
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/* setup card type */
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sc->sc_cardtyp = CARD_TYPEP_DYNALINK;
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/* setup IOM bus type */
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sc->sc_bustyp = BUS_TYPE_IOM2;
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sc->sc_ipac = 0;
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sc->sc_bfifolen = HSCX_FIFO_LEN;
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/* Read HSCX A/B VSTR. Expected value is 0x05 (V2.1). */
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if( ((HSCX_READ(0, H_VSTR) & 0xf) != 0x5) || ((HSCX_READ(1, H_VSTR) & 0xf) != 0x5) )
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{
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printf("%s: HSCX VSTR test failed for Dynalink PnP\n",
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sc->sc_dev.dv_xname);
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printf("%s: HSC0: VSTR: %#x\n",
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sc->sc_dev.dv_xname, HSCX_READ(0, H_VSTR));
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printf("%s: HSC1: VSTR: %#x\n",
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sc->sc_dev.dv_xname, HSCX_READ(1, H_VSTR));
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return;
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}
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bus_space_write_1(sc->sc_maps[0].t, sc->sc_maps[0].h, ADDR, RESET);
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DELAY(SEC_DELAY / 10);
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bus_space_write_1(sc->sc_maps[0].t, sc->sc_maps[0].h, ADDR, 0);
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DELAY(SEC_DELAY / 10);
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}
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#endif /* ISIC>0 && NPNP>0 && defined(DYNALINK) */
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/* LOW-LEVEL DEVICE ACCESS
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NOTE: The isdn4bsd code expects the two HSCX channels at different
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base addresses. I'm faking this, and remap them to the same address
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in the low-level routines. Search for HSCXB_HACK and IS_HSCXB_HACK.
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REM: this is only true for the FreeBSD version of I4B!
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*/
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#ifdef __FreeBSD__
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static void
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dynalink_read_fifo(void *buf, const void *base, size_t len)
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{
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outb(IOBASE(base)+ADDR, 0+IS_HSCXB_HACK(base));
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insb(IOADDR(base), (u_char *)buf, (u_int)len);
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}
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#else
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static void
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dynalink_read_fifo(struct isic_softc *sc, int what, void *buf, size_t size)
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{
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bus_space_tag_t t = sc->sc_maps[0].t;
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bus_space_handle_t h = sc->sc_maps[0].h;
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switch (what) {
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case ISIC_WHAT_ISAC:
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bus_space_write_1(t, h, ADDR, 0);
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bus_space_read_multi_1(t, h, ISAC, buf, size);
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break;
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case ISIC_WHAT_HSCXA:
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bus_space_write_1(t, h, ADDR, HSCXA);
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bus_space_read_multi_1(t, h, HSCX, buf, size);
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break;
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case ISIC_WHAT_HSCXB:
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bus_space_write_1(t, h, ADDR, HSCXB);
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bus_space_read_multi_1(t, h, HSCX, buf, size);
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break;
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}
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}
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#endif
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#ifdef __FreeBSD__
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static void
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dynalink_write_fifo(void *base, const void *buf, size_t len)
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{
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outb(IOBASE(base)+ADDR, 0+IS_HSCXB_HACK(base));
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outsb(IOADDR(base), (u_char *)buf, (u_int)len);
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}
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#else
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static void dynalink_write_fifo(struct isic_softc *sc, int what, const void *buf, size_t size)
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{
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bus_space_tag_t t = sc->sc_maps[0].t;
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bus_space_handle_t h = sc->sc_maps[0].h;
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switch (what) {
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case ISIC_WHAT_ISAC:
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bus_space_write_1(t, h, ADDR, 0);
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bus_space_write_multi_1(t, h, ISAC, (u_int8_t*)buf, size);
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break;
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case ISIC_WHAT_HSCXA:
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bus_space_write_1(t, h, ADDR, HSCXA);
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bus_space_write_multi_1(t, h, HSCX, (u_int8_t*)buf, size);
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break;
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case ISIC_WHAT_HSCXB:
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bus_space_write_1(t, h, ADDR, HSCXB);
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bus_space_write_multi_1(t, h, HSCX, (u_int8_t*)buf, size);
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break;
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}
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}
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#endif
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#ifdef __FreeBSD__
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static void
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dynalink_write_reg(u_char *base, u_int offset, u_int v)
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{
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outb(IOBASE(base)+ADDR, (offset+IS_HSCXB_HACK(base))&ADDRMASK);
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outb(IOADDR(base), (u_char)v);
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}
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#else
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static void dynalink_write_reg(struct isic_softc *sc, int what, bus_size_t offs, u_int8_t data)
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{
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bus_space_tag_t t = sc->sc_maps[0].t;
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bus_space_handle_t h = sc->sc_maps[0].h;
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switch (what) {
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case ISIC_WHAT_ISAC:
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bus_space_write_1(t, h, ADDR, offs);
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bus_space_write_1(t, h, ISAC, data);
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break;
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case ISIC_WHAT_HSCXA:
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bus_space_write_1(t, h, ADDR, HSCXA+offs);
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bus_space_write_1(t, h, HSCX, data);
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break;
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case ISIC_WHAT_HSCXB:
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bus_space_write_1(t, h, ADDR, HSCXB+offs);
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bus_space_write_1(t, h, HSCX, data);
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break;
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}
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}
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#endif
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#ifdef __FreeBSD__
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static u_char
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dynalink_read_reg(u_char *base, u_int offset)
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{
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outb(IOBASE(base)+ADDR, (offset+IS_HSCXB_HACK(base))&ADDRMASK);
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return (inb(IOADDR(base)));
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}
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#else
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static u_int8_t dynalink_read_reg(struct isic_softc *sc, int what, bus_size_t offs)
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{
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bus_space_tag_t t = sc->sc_maps[0].t;
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bus_space_handle_t h = sc->sc_maps[0].h;
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switch (what) {
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case ISIC_WHAT_ISAC:
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bus_space_write_1(t, h, ADDR, offs);
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return bus_space_read_1(t, h, ISAC);
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case ISIC_WHAT_HSCXA:
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bus_space_write_1(t, h, ADDR, HSCXA+offs);
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return bus_space_read_1(t, h, HSCX);
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case ISIC_WHAT_HSCXB:
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bus_space_write_1(t, h, ADDR, HSCXB+offs);
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return bus_space_read_1(t, h, HSCX);
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}
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return 0;
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}
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#endif
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#endif /* (NISIC > 0) && (NPNP > 0) && defined(DYNALINK) */
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