19c749625f
ISDN4BSD is the work of our brand-new comitter: Hellmuth Michaelis, who has done a tremendous amount of work to bring us this far. There are still some outstanding issues and files to bring into the tree, and for now it will be needed to pick up all the extra docs from the isdn4bsd release. It is probably also a very good idea to subscribe to the isdn@freebsd.org mailing list before you try this out. These files correspond to release "beta Version 0.70.00 / December 1998" from Hellmuth.
393 lines
11 KiB
C
393 lines
11 KiB
C
/*
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* Copyright (c) 1998 German Tischler. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the author nor the names of any co-contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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* 4. Altered versions must be plainly marked as such, and must not be
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* misrepresented as being the original software and/or documentation.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*---------------------------------------------------------------------------
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*
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* Card format:
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*
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* iobase + 0 : reset on (0x03)
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* iobase + 1 : reset off (0x0)
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* iobase + 2 : isac read/write
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* iobase + 3 : hscx read/write ( offset 0-0x3f hscx0 ,
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* offset 0x40-0x7f hscx1 )
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* iobase + 4 : offset for indirect adressing
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*
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*---------------------------------------------------------------------------
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*
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* isic - I4B Siemens ISDN Chipset Driver for SWS cards
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* ====================================================
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*
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* EXPERIMENTAL !!!!
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* =================
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*
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* $Id: i4b_sws.c,v 1.12 1998/12/18 09:32:45 hm Exp $
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*
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* last edit-date: [Sun Dec 13 10:49:25 1998]
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*
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* -hm adding driver to i4b
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* -hm adjustments for FreeBSD < 2.2.6, no PnP support yet
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*
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*---------------------------------------------------------------------------*/
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#if defined(__FreeBSD__)
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#include "isic.h"
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#include "opt_i4b.h"
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#else
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#define NISIC 1
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#endif
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#if defined (SEDLBAUER) && NISIC > 0
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#define SWS_RESON 0 /* reset on */
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#define SWS_RESOFF 1 /* reset off */
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#define SWS_ISAC 2 /* ISAC */
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#define SWS_HSCX0 3 /* HSCX0 */
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#define SWS_RW 4 /* indirect access register */
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#define SWS_HSCX1 5 /* this is for fakeing that we mean hscx1, though */
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/* access is done through hscx0 */
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#define SWS_REGS 8 /* we use an area of 8 bytes for io */
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#define SWS_BASE(X) ((unsigned int)X&~(SWS_REGS-1))
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#define SWS_PART(X) ((unsigned int)X& (SWS_REGS-1))
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#define SWS_ADDR(X) ((SWS_PART(X) == SWS_ISAC) ? (SWS_BASE(X)+SWS_ISAC) : (SWS_BASE(X)+SWS_HSCX0) )
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#define SWS_REG(X,Y) ((SWS_PART(X) != SWS_HSCX1) ? Y : (Y+0x40) )
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#define SWS_IDO(X) (SWS_BASE(X)+SWS_RW)
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#include <sys/param.h>
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#if defined(__FreeBSD__) && __FreeBSD__ >= 3
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#include <sys/ioccom.h>
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#else
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#include <sys/ioctl.h>
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#endif
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#ifdef __FreeBSD__
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#include <machine/clock.h>
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#include <i386/isa/isa_device.h>
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#else
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#include <machine/bus.h>
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#include <sys/device.h>
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#endif
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#include <sys/socket.h>
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#include <net/if.h>
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#ifdef __FreeBSD__
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#include <machine/i4b_debug.h>
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#include <machine/i4b_ioctl.h>
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#else
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#include <i4b/i4b_debug.h>
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#include <i4b/i4b_ioctl.h>
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#endif
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#include <i4b/layer1/i4b_l1.h>
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#include <i4b/layer1/i4b_isac.h>
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#include <i4b/layer1/i4b_hscx.h>
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#include <i4b/include/i4b_global.h>
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#include <i4b/include/i4b_l1l2.h>
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#include <i4b/include/i4b_mbuf.h>
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#ifndef __FreeBSD__
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static u_int8_t sws_read_reg __P((struct isic_softc *sc, int what, bus_size_t offs));
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static void sws_write_reg __P((struct isic_softc *sc, int what, bus_size_t offs, u_int8_t data));
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static void sws_read_fifo __P((struct isic_softc *sc, int what, void *buf, size_t size));
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static void sws_write_fifo __P((struct isic_softc *sc, int what, const void *data, size_t size));
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void isic_attach_sws __P((struct isic_softc *sc));
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#endif
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/*---------------------------------------------------------------------------*
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* SWS P&P ISAC get fifo routine
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*---------------------------------------------------------------------------*/
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#ifdef __FreeBSD__
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static void
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sws_read_fifo(void *buf, const void *base, size_t len)
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{
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outb(SWS_IDO(base),SWS_REG(base,0));
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insb(SWS_ADDR(base),buf,len);
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}
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#else
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static void
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sws_read_fifo(struct isic_softc *sc, int what, void *buf, size_t size)
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{
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bus_space_tag_t t = sc->sc_maps[0].t;
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bus_space_handle_t h = sc->sc_maps[0].h;
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switch (what) {
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case ISIC_WHAT_ISAC:
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bus_space_write_1(t, h, SWS_RW, 0);
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bus_space_read_multi_1(t, h, SWS_ISAC, buf, size);
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break;
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case ISIC_WHAT_HSCXA:
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bus_space_write_1(t, h, SWS_RW, 0);
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bus_space_read_multi_1(t, h, SWS_HSCX0, buf, size);
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break;
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case ISIC_WHAT_HSCXB:
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bus_space_write_1(t, h, SWS_RW, 0x40);
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bus_space_read_multi_1(t, h, SWS_HSCX0, buf, size);
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break;
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}
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}
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#endif
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/*---------------------------------------------------------------------------*
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* SWS P&P ISAC put fifo routine
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*---------------------------------------------------------------------------*/
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#ifdef __FreeBSD__
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static void
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sws_write_fifo(void *base, const void *buf, size_t len)
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{
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outb (SWS_IDO(base),SWS_REG(base,0));
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outsb(SWS_ADDR(base),buf,len);
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}
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#else
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static void
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sws_write_fifo(struct isic_softc *sc, int what, const void *buf, size_t size)
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{
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bus_space_tag_t t = sc->sc_maps[0].t;
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bus_space_handle_t h = sc->sc_maps[0].h;
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switch (what) {
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case ISIC_WHAT_ISAC:
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bus_space_write_1(t, h, SWS_RW, 0);
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bus_space_write_multi_1(t, h, SWS_ISAC, (u_int8_t*)buf, size);
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break;
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case ISIC_WHAT_HSCXA:
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bus_space_write_1(t, h, SWS_RW, 0);
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bus_space_write_multi_1(t, h, SWS_HSCX0, (u_int8_t*)buf, size);
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break;
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case ISIC_WHAT_HSCXB:
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bus_space_write_1(t, h, SWS_RW, 0x40);
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bus_space_write_multi_1(t, h, SWS_HSCX0, (u_int8_t*)buf, size);
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break;
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}
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}
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#endif
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/*---------------------------------------------------------------------------*
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* SWS P&P ISAC put register routine
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*---------------------------------------------------------------------------*/
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#ifdef __FreeBSD__
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static void
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sws_write_reg(u_char *base, u_int offset, u_int v)
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{
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outb(SWS_IDO(base),SWS_REG(base,offset));
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outb(SWS_ADDR(base),v);
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}
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#else
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static void
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sws_write_reg(struct isic_softc *sc, int what, bus_size_t offs, u_int8_t data)
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{
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bus_space_tag_t t = sc->sc_maps[0].t;
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bus_space_handle_t h = sc->sc_maps[0].h;
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switch (what) {
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case ISIC_WHAT_ISAC:
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bus_space_write_1(t, h, SWS_RW, offs);
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bus_space_write_1(t, h, SWS_ISAC, data);
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break;
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case ISIC_WHAT_HSCXA:
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bus_space_write_1(t, h, SWS_RW, offs);
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bus_space_write_1(t, h, SWS_HSCX0, data);
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break;
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case ISIC_WHAT_HSCXB:
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bus_space_write_1(t, h, SWS_RW, 0x40+offs);
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bus_space_write_1(t, h, SWS_HSCX0, data);
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break;
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}
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}
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#endif
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/*---------------------------------------------------------------------------*
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* SWS P&P ISAC get register routine
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*---------------------------------------------------------------------------*/
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#ifdef __FreeBSD__
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static u_char
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sws_read_reg(u_char *base, u_int offset)
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{
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outb(SWS_IDO(base),SWS_REG(base,offset));
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return inb(SWS_ADDR(base));
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}
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#else
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static u_int8_t
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sws_read_reg(struct isic_softc *sc, int what, bus_size_t offs)
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{
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bus_space_tag_t t = sc->sc_maps[0].t;
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bus_space_handle_t h = sc->sc_maps[0].h;
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switch (what) {
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case ISIC_WHAT_ISAC:
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bus_space_write_1(t, h, SWS_RW, offs);
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return bus_space_read_1(t, h, SWS_ISAC);
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case ISIC_WHAT_HSCXA:
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bus_space_write_1(t, h, SWS_RW, offs);
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return bus_space_read_1(t, h, SWS_HSCX0);
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case ISIC_WHAT_HSCXB:
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bus_space_write_1(t, h, SWS_RW, 0x40+offs);
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return bus_space_read_1(t, h, SWS_HSCX0);
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}
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return 0;
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}
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#endif
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#ifdef __FreeBSD__
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/* attach callback routine */
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int
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isic_attach_sws(struct isa_device *dev)
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{
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struct isic_softc *sc = &isic_sc[dev->id_unit];
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/* fill in isic_softc structure */
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sc->readreg = sws_read_reg;
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sc->writereg = sws_write_reg;
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sc->readfifo = sws_read_fifo;
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sc->writefifo = sws_write_fifo;
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sc->clearirq = NULL;
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sc->sc_unit = dev->id_unit;
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sc->sc_irq = dev->id_irq;
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sc->sc_port = dev->id_iobase;
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sc->sc_cardtyp = CARD_TYPEP_SWS;
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sc->sc_bustyp = BUS_TYPE_IOM2;
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sc->sc_ipac = 0;
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sc->sc_bfifolen = HSCX_FIFO_LEN;
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dev->id_msize = 0;
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ISAC_BASE = (caddr_t) (((u_int) sc->sc_port) + SWS_ISAC);
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HSCX_A_BASE = (caddr_t) (((u_int) sc->sc_port) + SWS_HSCX0);
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HSCX_B_BASE = (caddr_t) (((u_int) sc->sc_port) + SWS_HSCX1);
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/*
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* Read HSCX A/B VSTR. Expected value for the SWS PnP card is
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* 0x05 ( = version 2.1 ) in the least significant bits.
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*/
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if( ((HSCX_READ(0, H_VSTR) & 0xf) != 0x5) ||
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((HSCX_READ(1, H_VSTR) & 0xf) != 0x5) )
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{
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printf("isic%d: HSCX VSTR test failed for SWS PnP\n",
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dev->id_unit);
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printf("isic%d: HSC0: VSTR: %#x\n",
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dev->id_unit, HSCX_READ(0, H_VSTR));
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printf("isic%d: HSC1: VSTR: %#x\n",
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dev->id_unit, HSCX_READ(1, H_VSTR));
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return (0);
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}
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/* reset card */
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outb( ((u_int) sc->sc_port) + SWS_RESON , 0x3);
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DELAY(SEC_DELAY / 5);
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outb( ((u_int) sc->sc_port) + SWS_RESOFF, 0);
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DELAY(SEC_DELAY / 5);
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return(1);
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}
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#else /* !__FreeBSD__ */
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void
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isic_attach_sws(struct isic_softc *sc)
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{
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/* setup access routines */
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sc->readreg = sws_read_reg;
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sc->writereg = sws_write_reg;
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sc->readfifo = sws_read_fifo;
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sc->writefifo = sws_write_fifo;
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/* setup card type */
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sc->sc_cardtyp = CARD_TYPEP_SWS;
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/* setup IOM bus type */
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sc->sc_bustyp = BUS_TYPE_IOM2;
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sc->sc_ipac = 0;
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sc->sc_bfifolen = HSCX_FIFO_LEN;
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/*
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* Read HSCX A/B VSTR. Expected value for the SWS PnP card is
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* 0x05 ( = version 2.1 ) in the least significant bits.
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*/
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if( ((HSCX_READ(0, H_VSTR) & 0xf) != 0x5) ||
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((HSCX_READ(1, H_VSTR) & 0xf) != 0x5) )
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{
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printf("%s: HSCX VSTR test failed for SWS PnP\n",
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sc->sc_dev.dv_xname);
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printf("%s: HSC0: VSTR: %#x\n",
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sc->sc_dev.dv_xname, HSCX_READ(0, H_VSTR));
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printf("%s: HSC1: VSTR: %#x\n",
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sc->sc_dev.dv_xname, HSCX_READ(1, H_VSTR));
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return;
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}
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/* reset card */
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{
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bus_space_tag_t t = sc->sc_maps[0].t;
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bus_space_handle_t h = sc->sc_maps[0].h;
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bus_space_write_1(t, h, SWS_RESON, 0x3);
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DELAY(SEC_DELAY / 5);
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bus_space_write_1(t, h, SWS_RESOFF, 0);
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DELAY(SEC_DELAY / 5);
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}
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}
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#endif /* !__FreeBSD__ */
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#endif /* defined(SEDLBAUER) && NISIC > 0 */
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