slightly more tricky than on x86 as although the PCC is 64-bits, it is not
a simple 64-bit counter like the TSC. Instead, the upper 32-bits have
PAL-defined behavior and the lower 32-bits run as a free-running 32-bit
counter. To handle this, we detect overflows by maintaining a small amount
of per-cpu state and use this to simulate the upper 32-bits of the counter
providing a full 64-bit counter to the consumers of cpu_ticks().
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